Datasheet MC10113FN, MC10113L, MC10113P Datasheet (Motorola)

Page 1

SEMICONDUCTOR TECHNICAL DATA
   
The MC10113 is a quad Exclusive OR gate, with an enable common to all four gates. The outputs may be wire–ORed together to perform a 4–bit comparison function (A = B). The enable is active low.
PD= 175 mW typ/pkg (No Load) tpd= 2.5 ns typ
tr, tf= 2.0 ns typ (20% to 80%)
LOGIC DIAGRAM
4 5
2
TRUTH TABLE
10 11
12 13
6 7
3
14
15
V
= PIN 1
CC1
V
= PIN 16
CC2 VEE= PIN 8
IN E OUTPUT
L L L L
L H L H H L L H H H L L X X H L

L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
DIP
PIN ASSIGNMENT
16
IN IN IN IN
1
15
2
14
3
13
4
12
5
11
6
10
7 8
Book (DL122/D).
9
V
CC2
D
OUT
C
OUT
D
IN
D
IN
C
IN
C
IN
ENABLE
V
CC1
A
OUT
B
OUT
A A B B
V
EE
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
T ables on page 6–11 of the Motorola MECL Data
3/93
Motorola, Inc. 1996
3–48
REV 5
Page 2
MC10113
Under
ELECTRICAL CHARACTERISTICS
Test Limits
Pin
Characteristic Symbol
Power Supply Drain Current I Input Current I
Output Voltage Logic 1 V
Output Voltage Logic 0 V
Threshold Voltage Logic 1 V
Threshold Voltage Logic 0 V
Switching Times (50 Load) Min Typ Max ns Propagation Delay t
Rise Time (20 to 80%) t Fall Time (20 to 80%) t
* Individually test each input applying VIH or VIL to input under test.
inH
I
inL
OH
OL
OHA
OLA
4+2+
t
4–2–
t
9+2–
t
9–2+
2+ 2–
E
Under
Test
8 46 42 46 mAdc
4,7,10,13 5,6,1 1,12
9
* 0.5 0.5 0.3 µAdc
2
3 14 15
2
3 14 15
2
3 14 15
2
3 14 15
2
2
2
2
2 1.1 4.2 1.1 2.5 3.9 1.1 4.4
2 1.1 4.2 1.1 2.5 3.9 1.1 4.4
–30°C +25°C +85°C
Min Max Min Typ Max Min Max
–1.060 –1.060 –1.060 –1.060
–1.890 –1.890 –1.890 –1.890
–1.080 –1.080 –1.080 –1.080
1.1
1.1
1.3
1.3
425 350 870
–0.890 –0.890 –0.890 –0.890
–1.675 –1.675 –1.675 –1.675
–1.655 –1.655 –1.655 –1.655
4.7
4.7
5.2
5.2
–0.960 –0.960 –0.960 –0.960
–1.850 –1.850 –1.850 –1.850
–0.980 –0.980 –0.980 –0.980
1.3
1.3
1.5
1.5
2.6
2.6
3.4
3.4
265 220 545
–0.810 –0.810 –0.810 –0.810
–1.650 –1.650 –1.650 –1.650
–1.630 –1.630 –1.630 –1.630
4.5
4.5
5.0
5.0
–0.890 –0.890 –0.890 –0.890
–1.825 –1.825 –1.825 –1.825
–0.910 –0.910 –0.910 –0.910
1.3
1.3
1.5
1.5
–0.700 –0.700 –0.700 –0.700
–1.615 –1.615 –1.615 –1.615
–1.595 –1.595 –1.595 –1.595
265 220 545
5.0
5.0
5.5
5.5
Unit
µAdc
Vdc
Vdc
Vdc
Vdc
DL122 — Rev 6
3–49 MOTOROLAMECL Data
Page 3
MC10113
Und
(VCC)
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)
@ Test Temperature V
–30°C –0.890 –1.890 –1.205 –1.500 –5.2 +25°C –0.810 –1.850 –1.105 –1.475 –5.2 +85°C –0.700 –1.825 –1.035 –1.440 –5.2
Pin
Characteristic Symbol
Power Supply Drain Current I Input Current I
Output Voltage Logic 1 V
Output Voltage Logic 0 V
Threshold Voltage Logic 1 V
Threshold Voltage Logic 0 V
Switching Times (50 Load) +1.11V Pulse In Pulse Out –3.2 V +2.0 V Propagation Delay t
Rise Time (20 to 80%) t Fall Time (20 to 80%) t
* Individually test each input applying VIH or VIL to input under test. Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner.
inH
I
inL OH
OL
OHA
OLA
4+2+
t
4–2–
t
9+2–
t
9–2+
2+ 2–
E
Test
8 8 1, 16
4,7,10,13 5,6,1 1,12
9
* * 8 1, 16
2
3 14 15
2
3 14 15
2
3 14 15
2
3 14 15
2
2
2
2
2 4 2 8 1, 16
2 4 2 8 1, 16
IHmaxVILminVIHAmin
er
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
V
IHmaxVILminVIHAmin
* *
9
4
7 11 13
4
4
4
7 11 13
4
6 10 12
4
4
9
9
V
ILAmax
V
ILAmax
11 13
V
EE
V
EE
8 8 8
8 8 8 8
8 8 8 8
8 8 8 8
5 7
2 2 2 2
8 8 8 8
8 8 8 8
Gnd
1, 16 1, 16 1, 16
1, 16 1, 16 1, 16 1, 16
1, 16 1, 16 1, 16 1, 16
1, 16 1, 16 1, 16 1, 16
1, 16 1, 16 1, 16 1, 16
1, 16 1, 16 1, 16 1, 16
MOTOROLA MECL Data
3–50
DL122 — Rev 6
Page 4
OUTLINE DIMENSIONS
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 775–02
ISSUE C
MC10113
–L–
20 1
Z
C
G
G1
0.010 (0.250) N
S
T
–N–
L–M
S
Y BRK
–M–
W
V
A
0.007 (0.180) N
0.007 (0.180) N
R
E
0.004 (0.100)
J
PLANE
SEATING
–T–
VIEW S
S
0.007 (0.180) N
B
0.007 (0.180) N
U
M
S
L–M
T
M
S
S
L–M
T
S
D
Z
D
X
0.010 (0.250) N
G1
S
S
L–M
T
S
VIEW D–D
M
M
S
L–M
T
L–M
T
S
S
S
0.007 (0.180) N
H
M
S
L–M
T
S
K1
K
0.007 (0.180) N
F
M
S
L–M
T
S
VIEW S
DL122 — Rev 6
NOTES:
1. DATUMS –L–, –M–, AND –N– DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE.
2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DA TUM –T–, SEATING PLANE.
3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE.
4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635).
3–51 MOTOROLAMECL Data
DIM MIN MAX MIN MAX
A 0.385 0.395 9.78 10.03 B 0.385 0.395 9.78 10.03 C 0.165 0.180 4.20 4.57 E 0.090 0.110 2.29 2.79 F 0.013 0.019 0.33 0.48 G 0.050 BSC 1.27 BSC H 0.026 0.032 0.66 0.81 J 0.020 ––– 0.51 ––– K 0.025 ––– 0.64 ––– R 0.350 0.356 8.89 9.04 U 0.350 0.356 8.89 9.04 V 0.042 0.048 1.07 1.21 W 0.042 0.048 1.07 1.21 X 0.042 0.056 1.07 1.42 Y ––– 0.020 ––– 0.50 Z 2 10 2 10
____
G1 0.310 0.330 7.88 8.38 K1 0.040 ––– 1.02 –––
MILLIMETERSINCHES
Page 5
MC10113
–T–
SEATING PLANE
18
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
–A–
16 9
–B–
18
C
N
E
F
G
16 PLD
0.25 (0.010) T
M
S
A
–A–
916
B
F
C
S
–T–
H
G
D
16 PL
0.25 (0.010) T
K
M
A
CASE 620–10
ISSUE V
L
K
16 PLJ
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
SEATING PLANE
J
M
M
0.25 (0.010) T
M
L
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY.
DIM MIN MAX MIN MAX
A 0.750 0.785 19.05 19.93 B 0.240 0.295 6.10 7.49 C ––– 0.200 ––– 5.08 D 0.015 0.020 0.39 0.50 E 0.050 BSC 1.27 BSC F 0.055 0.065 1.40 1.65 G 0.100 BSC 2.54 BSC H 0.008 0.015 0.21 0.38 K 0.125 0.170 3.18 4.31
S
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
L 0.300 BSC 7.62 BSC M 0 15 0 15
____
N 0.020 0.040 0.51 1.01
Y14.5M, 1982.
FORMED PARALLEL.
DIM MIN MAX MIN MAX
A 0.740 0.770 18.80 19.55 B 0.250 0.270 6.35 6.85 C 0.145 0.175 3.69 4.44 D 0.015 0.021 0.39 0.53 F 0.040 0.70 1.02 1.77 G 0.100 BSC 2.54 BSC H 0.050 BSC 1.27 BSC J 0.008 0.015 0.21 0.38 K 0.110 0.130 2.80 3.30 L 0.295 0.305 7.50 7.74 M 0 10 0 10 S 0.020 0.040 0.51 1.01
MILLIMETERSINCHES
MILLIMETERSINCHES
____
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MOTOROLA MECL Data
3–52
*MC10113/D*
MC10113/D
DL122 — Rev 6
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