Datasheet MC100LVE111 Datasheet (Motorola)

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SEMICONDUCTOR TECHNICAL DATA

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The MC100LVE111 is a low skew 1-to-9 differential driver, designed
with clock distribution in mind. The MC100LVE111’s function and
performance are similar to the popular MC100E111, with the added
feature of low voltage operation. It accepts one signal input, which can be
either differential or single-ended if the VBB output is used. The signal is
fanned out to 9 identical differential outputs.

• 200ps Part-to-Part Skew

• 50ps Output-to-Output Skew

• Differential Design

• V

Output

BB

• Voltage and Temperature Compensated Outputs

• Low Voltage V

• 75kΩ Input Pulldown Resistors

Range of –3.0 to –3.8V

EE



LOW-VOLTAGE

1:9 DIFFERENTIAL

ECL/PECL CLOCK DRIVER

The LVE111 is specifically designed, modeled and produced with low
skew as the key goal. Optimal design and layout serve to minimize gate to
gate skew within a device, and empirical modeling is used to
determineprocess control limits that ensure consistent tpd distributions
from lot to lot. The net result is a dependable, guaranteed low skew
device.

To ensure that the tight skew specification is met it is necessary that
both sides of the differential output are terminated into 50Ω, even if only
one side is being used. In most applications, all nine differential pairs will
be used and therefore terminated. In the case where fewer than nine
pairs are used, it is necessary to terminate at least the output pairs on the
same package side as the pair(s) being used on that side, in order to
maintain minimum skew. Failure to do this will result in small degradations
of propagation delay (on the order of 10–20ps) of the output(s) being
used which, while not being catastrophic to most designs, will mean a
loss of skew margin.

The MC100L VE1 11, as with most other ECL devices, can be operated from a positive VCC supply in PECL mode. This allows
the L VE111 to be used for high performance clock distribution in +3.3V systems. Designers can take advantage of the LVE111’s
performance to distribute low skew clocks across the backplane or the board. In a PECL environment, series or Thevenin line
terminations are typically used as they require no additional power supplies. For systems incorporating GTL, parallel termination
offers the lowest power by taking advantage of the 1.2V supply as a terminating voltage. For more information on using PECL,
designers should refer to Motorola Application Note AN1406/D.

FN SUFFIX

PLASTIC PACKAGE

CASE 776-02

12/94

 Motorola, Inc. 1996

4–1

REV 1

MC100LVE111

PIN NAMES

Pins

IN, IN
Q0, Q0–Q8, Q
V

BB

Function

Differential Input Pair
Differential Outputs

8

VBB Output

Q0Q0Q1V

25 24 23 22 21 20 19

V

26

EE

27

NC

28

IN

V

1

CC

2

IN

3

V

BB
NC

4

Pinout: 28-Lead PLCC

567891011

Q

Q

8

8

CCOQ1Q2Q2

(Top View)

Q

V

7

CCOQ7

Q

18

3

Q

17

3

Q

16

4

15

V

CCO

14

Q

4

13

Q

5

12

Q

5

Q

Q

6

6

LOGIC SYMBOL

Q

0

Q

0

Q

1

Q

1

Q

2

Q

2

Q

3

Q

3
IN
IN

V

BB

Q

4

Q

4

Q

5

Q

5

Q

6

Q

6

Q

7

Q

7

Q

8

Q

8

MOTOROLA ECLinPS and ECLinPS Lite

4–2

DL140 — Rev 3

MC100LVE111

ECL DC CHARACTERISTICS

–40°C 0°C 25°C 85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit

V

OH

V

OL

V

IH

V

IL

V

BB

V

EE

I

IH

I

EE

PECL DC CHARACTERISTICS

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit

V

OH

V

OL

V

IH

V

IL

V

BB

V

CC

I

IH

I

EE

1. These values are for VCC = 3.3V. Level Specifications will vary 1:1 with VCC.

Output HIGH Voltage –1.025 –0.955 –0.880 –1.025 –0.955 –0.880 –1.025 –0.955 –0.880 –1.025 –0.955 –0.880 V
Output LOW Voltage –1.810 –1.705 –1.620 –1.810 –1.705 –1.620 –1.810 –1.705 –1.620 –1.810 –1.705 –1.620 V
Input HIGH Voltage –1.165 –0.880 –1.165 –0.880 –1.165 –0.880 –1.165 –0.880 V
Input LOW Voltage –1.810 –1.475 –1.810 –1.475 –1.810 –1.475 –1.810 –1.475 V
Output Reference

Voltage
Power Supply Voltage –3.0 –3.8 –3.0 –3.8 –3.0 –3.8 –3.0 –3.8 V
Input HIGH Current 150 150 150 150 µA
Power Supply Current 55 66 55 66 55 66 65 78 mA

Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Output Reference Volt-

1

age
Power Supply Voltage 3.0 3.8 3.0 3.8 3.0 3.8 3.0 3.8 V
Input HIGH Current 150 150 150 150 µA
Power Supply Current 55 66 55 66 55 66 65 78 mA

–1.38 –1.26 –1.38 –1.26 –1.38 –1.26 –1.38 –1.26 V

–40°C 0°C 25°C 85°C

1

2.275 2.345 2.420 2.275 2.345 2.420 2.275 2.345 2.420 2.275 2.345 2.420 V

1

1.490 1.595 1.680 1.490 1.595 1.680 1.490 1.595 1.680 1.490 1.595 1.680 V

1

2.135 2.420 2.135 2.420 2.135 2.420 2.135 2.420 V

1

1.490 1.825 1.490 1.825 1.490 1.825 1.490 1.825 V

1.92 2.04 1.92 2.04 1.92 2.04 1.92 2.04 V

AC CHARACTERISTICS (VEE = VEE (min) to VEE (max); VCC = V

–40°C 0°C 25°C 85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit Condition

t

PLH

t

PHL

t

skew

V

PP

V

CMR

tr/t

Propagation Delay to Output

IN (differential)
IN (single-ended)

Within-Device Skew
Part-to-Part Skew (Diff)

Minimum Input Swing 500 500 500 500 mV Note 4
Common Mode Range –1.5 –0.4 –1.5 –0.4 –1.5 –0.4 –1.5 –0.4 V Note 5
Output Rise/Fall Time 200 600 200 600 200 600 200 600 ps 20%–80%

f

400
350

650
700

50

250

435
385

625
675

50

200

CCO

440
390

= GND)

630
680

50

200

445
395

635
685

50

200

ps

Note 1
Note 2

ps Note 3

1. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the
differential output signals. See

Definitions and T esting of ECLinPS AC Parameters

in Chapter 1 (page 1–12) of the Motorola High Performance

ECL Data Book (DL140/D).

2. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal. See

Definitions and T esting of ECLinPS AC Parameters

in Chapter 1 (page 1–12) of the Motorola High Performance ECL Data Book (DL140/D).

3. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device.

4. VPP(min) is defined as the minimum input differential voltage which will cause no increase in the propagation delay . The VPP(min) is AC limited
for the E111 as a differential input as low as 50 mV will still produce full ECL levels at the output.

5. V

is defined as the range within which the VIH level may vary, with the device still meeting the propagation delay specification. The VIL level

CMR

must be such that the peak to peak voltage is less than 1.0 V and greater than or equal to VPP(min).

DL140 — Rev 3

4–3 MOTOROLAECLinPS and ECLinPS Lite

MC100LVE111

-L­LEADS

ACTUAL

28

-N-

Y BRK

-M-

OUTLINE DIMENSIONS

FN SUFFIX

PLASTIC PACKAGE

CASE 776-02

ISSUE D

S

S

0.18 (0.007)MTSN

B

D

W

Z1

0.18 (0.007)MTSN

U

–P

–P

S

–M

L

S

S

S

–M

L

28 1

-P-

Z

C

G

G1

0.25 (0.010) T L N

S

D

V

0.18 (0.007)MTL N

A

0.18 (0.007)MTL N

R

E

0.10 (0.004)

J

PLANE

SEATING

-T-

DETAIL S

S

SS

S

–M –P

MILLIMETERS INCHES
MIN MINMAX MAX

DIM

12.32

G1
K1
Z1

A
B
C
E
F
G
H
J
K
R
U
V
W
X
Y
Z

12.57

12.57

4.57

2.79

0.48

0.81
—
—

11.58

11.58

1.21

1.21

1.42

0.50

10

10.92
—

10

0.485

0.485

0.165

0.090

0.013

0.026

0.020

0.025

0.450

0.450

0.042

0.042

0.042
—
2

°

0.410

0.040
2

°

12.32

4.20

2.29

0.33

1.27 BSC 0.050 BSC

0.66

0.51

0.64

11.43

11.43

1.07

1.07

1.07
—
2

°

10.42

1.02
2

°

0.495

0.495

0.180

0.110

0.019

0.032

0.456

0.456

0.048

0.048

0.056

0.020
10

°

0.430
10

°

X

VIEW D-D

S

SS

S

–M –P

S

SS

S

–M –P

K1

K

DETAIL S

NOTES:

1. DUE TO SPACE LIMITATION, CASE 776-02 SHALL
BE REPRESENTED BY A GENERAL (SMALLER)
CASE OUTLINE DRAWING RATHER THAN
SHOWING ALL 28 LEADS.

2. DATUMS -L-, -M-, -N-, AND -P- DETERMINED

—
—

°

—

°

WHERE TOP OF LEAD SHOULDER EXIT PLASTIC
BODY AT MOLD PARTING LINE.

3. DIM G1, TRUE POSITION TO BE MEASURED AT
DATUM -T-, SEATING PLANE.

4. DIM R AND U DO NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE MOLD PROTRUSION
IS 0.25 (0.010) PER SIDE.

5. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

6. CONTROLLING DIMENSION: INCH.

7. 776-01 IS OBSOLETE, NEW STANDARD 776-02.

G1

SS

S

0.25 (0.010)MTN L

0.18 (0.007)MTL N

H

0.18 (0.007)

0.18 (0.007)MTL N

F

0.18 (0.007)MTN L

–P –M

S

–M –P

M

S

–P –M

TN L

S

–M –P

S

–P –M

S

S

SS

S

SS

S

SS

S

SS

MOTOROLA ECLinPS and ECLinPS Lite

4–4

DL140 — Rev 3

MC100LVE111

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MC100LVE111/D

DL140 — Rev 3

◊

4–5 MOTOROLAECLinPS and ECLinPS Lite

*MC100LVE111/D*