Datasheet MC100EPT25D, MC100EPT25DT, MC100EPT25DTR2 Datasheet (MOTOROLA)

MC100EPT25

Differential LVECL/ECL to
LVTTL Translator

The MC100EPT25 is a Differential LVECL/ECL to LVTTL
translator. This device requires +3.3V, –3.3V to –5.2V, and ground.
The small outline 8–lead SOIC package and the single gate of the
EPT25 make it ideal for applications which require the translation of a
clock or data signal.

The VBB output allows the EPT25 to also be used in a single–ended
input mode. In this mode the VBB output is tied to the D input for a
non–inverting buffer or the D
VBB pin should be bypassed to ground via a 0.01mF capacitator.

• 1.1ns Typical Propagation Delay

• 275MHz Fmax (Clock bit stream, not pseudo–random)

• Differential LVECL/ECL inputs

• Small Outline SOIC Package

• 24mA TTL outputs

• Flow Through Pinouts

• Internal Input Resistors: Pulldown on D, Pulldown and Pullup on D

• Q Output will default LOW with inputs open or at GND

• ESD Protection: >4000V HBM, >200V MM

• V

BB

Output

• New Differential Input Common Mode Range

• Moisture Sensitivity Level 1, Indefinite T ime Out of Drypack.

For Additional Information, See Application Note AND8003/D

• Flammability Rating: UL–94 code V–0 @ 1/8”,

Oxygen Index 28 to 34

• T ransistor Count = 111 devices

1

V

EE

2

D

input for an inverting buffer . If used, the

V

CC

LVTTL

78Q

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MARKING

DIAGRAMS*

8

SO–8

8

1

8

1

*For additional information, see Application Note
AND8002/D

PIN

Q
D, D
V

CC
V

BB

GND Ground

V

EE

D SUFFIX

CASE 751

TSSOP–8

DT SUFFIX

CASE 948R

A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week

PIN DESCRIPTION

FUNCTION

LVTTL Output

Differential LVECL Input Pair

Positive Supply

Output Reference Voltage

Negative Supply

HPT25

ALYW
1
8

HR25

ALYW
1

3

LVECL

VBB

Figure 1. 8–Lead Pinout (Top View) and Logic Diagram

 Semiconductor Components Industries, LLC, 2000

May, 2000 – Rev. 1

45

6

NCD

GND

1 Publication Order Number:

MC100EPT25D SO–8 98 Units / Rail
MC100EPT25DR2 SO–8 2500 / Reel

MC100EPT25DT TSSOP–8 98 Units / Rail
MC100EPT25DTR2 TSSOP–8 2500 / Reel

ORDERING INFORMATION

Device Package Shipping

MC100EPT25/D

MC100EPT25

MAXIMUM RATINGS*

Symbol Parameter Value Unit

V

CC

V

EE

V

I

I

out

I

BB

T

A

T

stg

θ

JA

θ

JC

T

sol

* Maximum Ratings are those values beyond which damage to the device may occur.

{

Use for inputs of same package only.

DC CHARACTERISTICS, ECL/LVECL (VCC = +3.3V; VEE = –5.5V to –3.0V, GND = 0V)

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

IEE

V

IH

V

IL

V

BB

V

IHCMR

I

IH

I

IL

NOTE: 100EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The

1. (VCC = +3.3V, GND = 0V, VEE = –3.3V), all other pins floating.

2. All loading with 500 ohms to GND, CL = 20pF.

3. V

4. Input and output parameters vary 1:1 with VCC.

Power Supply Current
(Note 1.)

Input HIGH Voltage Single Ended
(Note 4.)

Input LOW Voltage Single Ended
(Note 4.)

Output Voltage Reference –1550 –1450 –1350 –1550 –1450 –1350 –1550 –1450 –1350 mV
Input HIGH Voltage Common Mode

Range (Note 3.)
Input HIGH Current 150 150 150 µA
Input LOW Current D

circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.

min varies 1:1 with VEE, max varies 1:1 with VCC.

IHCMR

Power Supply (Referenced to GND, VEE = –3.3V) 0 to 3.8 VDC
Power Supply (Referenced to GND, VCC = +3.3V) –6.0 to 0 VDC
Input Voltage (VI not more positive than GND) 0 to 3.8 VDC
Output Current Continuous

VBB Sink/Source Current
Operating Temperature Range –40 to +85 °C
Storage Temperature –65 to +150 °C
Thermal Resistance (Junction–to–Ambient) Still Air

Thermal Resistance (Junction–to–Case) 41 to 44 ± 5% °C/W
Solder Temperature (<2 to 3 Seconds: 245°C desired) 265 °C

{

–40°C 25°C 85°C

8.0 16 25 8.0 16 25 8.0 16 25 mA

–1165 –880 –1165 –880 –1165 –880 mV

–1810 –1625 –1810 –1625 –1810 –1625 mV

VEE+2.0 0.0 VEE+2.0 0.0 VEE+2.0 0.0 V

D

0.5

–150

Surge

500lfpm

0.5

–150

50

100

± 0.5 mA

190
130

0.5

–150

mA

°C/W

µA

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MC100EPT25

TTL OUTPUT DC CHARACTERISTICS (VCC = 3.3V ± 0.3V; GND = 0V; VEE = –3.3V ± 0.3V; TA = –40°C to 85°C)

Symbol Characteristic Min Typ Max Unit

I

CCH

I

CCL

V

OH

V

OL

I

OS

NOTE: 100EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The

5. All loading with 500 ohms to GND, CL = 20pF.

AC CHARACTERISTICS (VCC = 3.3V ± 0.3V; GND = 0V)

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

f

max

t

PLH

t

PHL

t

SK+ +

t

SK– –

t

SKPP

t

JITTER

V

PP

t

r

t

f

6. Skews are measured between outputs under identical conditions.

7. 200mV input guarantees full logic swing at the output.

Power Supply Current (Outputs set to HIGH) 6.0 10 14 mA
Power Supply Current (Outputs set to LOW) 7.0 12 17 mA
Output HIGH Voltage (IOH = –3.0mA) (Note 5.) 2.2 V
Output LOW Voltage (IOL = 24mA) (Note 5.) 0.5 V
Output Short Circuit Current –130 –60 mA

circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.

–40°C 25°C 85°C

Maximum Toggle Frequency 275 275 275 MHz

,

Propagation Delay to
Output Differential

Output–to–Output Skew++
Output–to–Output Skew– –
Part–to–Pa rt Skew (Note 6.)

Cycle–to–Cycle Jitter TBD TBD TBD ps
Input Voltage Swing

(Differential) (Note 7.)
Output Rise/Fall Times Q, Q

(0.8V – 2.0V)

800 1200 1800 800 1100 1600 800 1100 1600 ns

60
25

500

100 800 1200 100 800 1200 100 800 1200 mV

450
900

600

1160

750

1400

450
900

60
25

500

600

1100

750

1400

450
900

60
25

500

600

1100

750

1400

ps

ps

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MC100EPT25

P ACKAGE DIMENSIONS

SO–8

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751–06

ISSUE T

C

A

A1

D

58

0.25MB

E

1

B

e

H

4

M

h

X 45

_

q

C

A

SEATING
PLANE

0.10

L

B

SS

A0.25MCB

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.

2. DIMENSIONS ARE IN MILLIMETER.

3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.

5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.

MILLIMETERS

DIM MIN MAX

A 1.35 1.75

A1 0.10 0.25

B 0.35 0.49
C 0.19 0.25
D 4.80 5.00
E

3.80 4.00

1.27 BSCe

H 5.80 6.20
h

0.25 0.50

L 0.40 1.25

0 7

q

__

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4

–T–

L

0.10 (0.004)

SEATING
PLANE

MC100EPT25

P ACKAGE DIMENSIONS

TSSOP–8

DT SUFFIX

PLASTIC TSSOP PACKAGE

CASE 948R–02

ISSUE A

8x REFK

S

U0.15 (0.006) T

2X L/2

85

0.10 (0.004) V

M

B

PIN 1

IDENT

S

U0.15 (0.006) T

1

–U–

4

A

–V–

S

U

T

S

0.25 (0.010)

M

F

DETAIL E

C

D

G

DETAIL E

–W–

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS. MOLD
FLASH OR GATE BURRS SHALL NOT EXCEED

0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT
EXCEED 0.25 (0.010) PER SIDE.

5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.

6. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE –W–.

DIM MIN MAX MIN MAX

A 2.90 3.10 0.114 0.122
B 2.90 3.10 0.114 0.122
C 0.80 1.10 0.031 0.043
D 0.05 0.15 0.002 0.006
F 0.40 0.70 0.016 0.028
G 0.65 BSC 0.026 BSC
K 0.25 0.40 0.010 0.016
L 4.90 BSC 0.193 BSC
M 0 6 0 6

____

INCHESMILLIMETERS

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Notes

MC100EPT25

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6

Notes

MC100EPT25

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MC100EPT25

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MC100EPT25/D