Datasheet MC100LVEL91, MC100LVEL91DW, MC100EL91, MC100EL91DW, MC100EL91DWR2 Datasheet (Motorola)

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SEMICONDUCTOR TECHNICAL DATA

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The MC100LVEL/EL91 is a triple PECL to ECL translator. The
MC100L VEL91 receives low voltage PECL signals and translates them to
differential ECL output signals. The MC100EL91 receives standard
voltage PECL signals and translates them to differential ECL output
signals.

• MC100LVEL91 Supports Low Voltage Operation

• MC100LVEL91 Has 620ps Typical Propagation Delays

• MC100EL91 Supports Standard Voltage Operation

• MC100EL91 Has 670ps Typical Propagation Delays

• Fully Dif ferential Design

• 20–lead SOIC Packaging

A VBB output is provided for interfacing with single ended PECL signals
at the input. If a single ended input is to be used the VBB output should be
connected to the D
When used the VBB output should be bypassed to ground via a 0.01µF
capacitor. The VBB output is designed to act as the switching reference
for the EL/LVEL91 under single ended input switching conditions, as a
result this pin can only source/sink up to 0.5mA of current.

To accomplish the level translation the EL/LVEL91 requires three
power rails. The VCC supply should be connected to the positive supply ,
and the VEE pin should be connected to the negative power supply. The
GND pins are connected to the system ground plain. Both VEE and V
should be bypassed to ground via 0.01µF capacitors.

Under open input conditions, the D
the D input will be pulled to GND. This condition will force the Q output to
a low, ensuring stability.

input. The active signal would then drive the D input.

CC

input will be biased at VCC/2 and

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

20–LEAD PLASTIC SOIC WIDE PACKAGE

PIN NAMES

Pins

Dn
Qn
PECL_V

BB

DW SUFFIX

CASE 751D–04

Function

PECL/LVPECL Inputs
ECL/LVECL Outputs
PECL Reference Voltage Output

VCCQ0

ECL ECL ECL

PECL PECL PECL

CC

Figure 1. 20–Lead Pinout (Top View) and Logic Diagram

8/97

 Motorola, Inc. 1997

1920

21

D0

Q1 Q1 Q2 Q2 V

GND GND

Q0

1718 16 15 14 13 12

56789

43

D1

D0 D2V

D1

PECL_VBB

4–1

PECL_VBB

D2

CC

11

10

V

EE

REV 1

MC100LVEL91 MC100EL91

LVPECL INPUT DC CHARACTERISTICS

–40°C 0°C 25°C 85°C

Symbol Characteristic Min Max Min Max Min Typ Max Min Max Unit Condition

V

CC

I

IH

I

IL

V

IH

V

IL

V

BB

I

GND

1. DC levels vary 1:1 with VCC.

PECL INPUT DC CHARACTERISTICS

Symbol Characteristic Min Max Min Max Min Typ Max Min Max Unit Condition

V

CC

I

IH

I

IL

V

IH

V

IL

V

BB

I

GND

2. DC levels vary 1:1 with VCC.

Power Supply Voltage 3.0 3.6 3.0 3.6 3.0 3.3 3.6 3.0 3.6 V
Input HIGH Current 150 150 150 150 µA
Input LOW Current 0.5 0.5 0.5 0.5 µA
Input HIGH Voltage

(Note 1.)
Input LOW Voltage

(Note 1.)
Reference Output

(Note 1.)
Power Supply Curremt 10 10 6.0 10 10 mA

Power Supply Voltage 4.75 5.25 4.75 5.25 4.75 5.0 5.25 4.75 5.25 V
Input HIGH Current 150 150 150 150 µA
Input LOW Current 0.5 0.5 0.5 0.5 µA
Input HIGH Voltage

(Note 2.)
Input LOW Voltage

(Note 2.)
Reference Output

(Note 2.)
Power Supply Curremt 11 11 6.0 11 11 mA

2.135 2.420 2.135 2.420 2.135 2.420 2.135 2.420 V VCC = 3.3V

1.49 1.825 1.49 1.825 1.49 1.825 1.49 1.825 V VCC = 3.3V

1.92 2.04 1.92 2.04 1.92 2.04 1.92 2.04 V VCC = 3.3V

–40°C 0°C 25°C 85°C

3.835 4.120 3.835 4.12 3.835 4.12 3.835 4.120 V VCC = 5.0V

3.19 3.525 3.19 3.525 3.19 3.525 3.19 3.525 V VCC = 5.0V

3.62 3.74 3.62 3.74 3.62 3.74 3.62 3.75 V VCC = 5.0V

ECL/LVECL OUTPUT DC CHARACTERISTICS

–40°C 0°C 25°C 85°C

Symbol Characteristic Min Max Min Max Min Typ Max Min Max Unit Condition

V

EE

V

OH

V

OL

I

EE

MOTOROLA ECLinPS and ECLinPS Lite

Power Supply EL91
Voltage LVEL91

Output HIGH Voltage
Output LOW Volrage
Power Supply EL91

Current LVEL91

–4.2

–5.5
–3.8

28
27

–4.2
–3.0

–3.0

–1085 –880 –1025 –880 –1025 –955 –880 –1025 –880
–1830 –1555 –1810 –1620 –1810 –1705 –1620 –1810 –1620

–5.5
–3.8

28
27

4–2

–4.2
–3.0

–4.5
–3.3

22
21

–5.5
–3.8

28
27

–4.2
–3.0

–5.5
–3.8

3029mA

V

mV
mV

DL140 — Rev 3

MC100LVEL91 MC100EL91

MC100L VEL91
AC CHARACTERISTICS (VEE = –3.0V to –3.8V; VCC = 3.0V to 3.6V)

–40°C 0°C 25°C 85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit

t

PLH

t

PHL

t

SKEW

V

PP

V

CMR

t

r

t

f

3. Skews are valid across specified voltage range, part–to–part skew is for a given temperature.

4. Duty cycle skew is the difference between a TPLH and TPHL propagation delay through a device.

5. Minimum input swing for which AC parameters guaranteed. The device has a DC gain of ≈40.

6. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within

the specified range and the peak–to–peak voltage lies between VPPmin and 1V .

Propagation Delay Diff
D to Q S.E.

Skew

Output–to–Output (Note 3.)

Part–to–Part (Diff) (Note 3.)

Duty Cycle (Diff) (Note 4.)

Minimum Input Swing
(Note 5.)

Common Mode Range
(Note 6.) VPP < 500mV

VPP ≥ 500mV

Output Rise/Fall Times Q
(20% – 80%)

490

590

690

510

610

710

520

620

720

560

660

760

440

590

740

460

610

760

470

620

770

510

660

ps

810

ps

4025100

200

4025100

200

4025100

200

4025100

200

200 200 200 200 mV

V

1.3

1.5

VCC–0.2

–0.2

V

CC

1.2

1.4

VCC–0.2

–0.2

V

CC

1.2

1.4

VCC–0.2

–0.2

V

CC

1.2

1.4

VCC–0.2

–0.2

V

CC

320 400 580 320 400 580 320 400 580 320 400 580 ps

MC100EL91
AC CHARACTERISTICS (VEE = –4.20V to –5.5V; VCC = 4.75V to 5.25V)

–40°C 0°C 25°C 85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit

t

PLH

t

PHL

t

SKEW

V

PP

V

CMR

t

r

t

f

7. Skews are valid across specified voltage range, part–to–part skew is for a given temperature.

8. Duty cycle skew is the difference between a TPLH and TPHL propagation delay through a device.

9. Minimum input swing for which AC parameters guaranteed. The device has a DC gain of ≈40.

10.The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within

the specified range and the peak–to–peak voltage lies between VPPmin and 1V .

11.The MC100EL91 design has different propagation delays compared to the MC100L VEL91 due to dif ferences in the translation structure.

Propagation Delay D to Q
(Note 11.) Diff

S.E.

Skew

Output–to–Output (Note 7.)

Part–to–Part (Diff) (Note 7.)

Duty Cycle (Diff) (Note 8.)

Minimum Input Swing
(Note 9.)

Common Mode Range
(Note 10.) VPP < 500mV

VPP ≥ 500mV

Output Rise/Fall Times Q
(20% – 80%)

540

640

740

560

660

760

570

670

770

610

710

490

640

790

510

660

810

520

670

820

560

710

810
860

ps

ps

4025100

200

4025100

200

4025100

200

4025100

200

200 200 200 200 mV

V

1.3

1.5

VCC–0.2

–0.2

V

CC

1.2

1.4

VCC–0.2

–0.2

V

CC

1.2

1.4

VCC–0.2

–0.2

V

CC

1.2

1.4

VCC–0.2

–0.2

V

CC

320 400 580 320 400 580 320 400 580 320 400 580 ps

DL140 — Rev 3

4–3 MOTOROLAECLinPS and ECLinPS Lite

MC100LVEL91 MC100EL91

–A

–

1120

–B

P 10 PL

–

110

D

20 PL

0.010 (0.25) T A B

M

G 18 PL

S S

C

K

–T

SEATING

–

PLANE

OUTLINE DIMENSIONS

DW SUFFIX

PLASTIC SOIC PACKAGE

CASE 751D–04

ISSUE E

J

F

M M

B

M

0.010 (0.25)

R X 45°

NOTES:

1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.

5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D DIMENSION
AT MAXIMUM MATERIAL CONDITION.

MILLIMETERS INCHES

MIN MINMAX MAX

DIM

12.65

A

7.40

B

2.35

C

0.35

D

0.50

F

1.27 BSC 0.050 BSC

G

0.25

J

0.10

K

0

M

°

P

10.05

R

0.25

12.95

7.60

2.65

0.49

0.90

0.32

0.25
7

10.55

0.75

0.499

0.510

0.292

0.299

0.093

0.104

0.014

0.019

0.020

0.035

0.010

0.012

0.004

0.009

0

7

°

°

°

0.395

0.010

0.415

0.029

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MOTOROLA ECLinPS and ECLinPS Lite

4–4

◊

MC100L VEL91/D

DL140 — Rev 3