Datasheets MB1507 Datasheet

September 1995 Edition 4.0a

DA TA SHEET

MB1507

SERIAL INPUT PLL FREQUENCY SYNTHESIZER

WITH 2.0GH

The Fujitsu MB1507 is a single chip serial input PLL frequency synthesizer designed for Broadcast Satelite tuner and cellular telephone applications. It contains a 2.0 GH analog switch to speed up lock up time. It operates supply voltage of 5.0V typ. and dissipates 18mA typ. of current realized through the use of Fujitsu’s unique U-ESBIC Bi-CMOS technology .

dual modulus prescaler which enables pulse swallow function, and an

Z

PRESCALER

Z

• High operating frequency: f

IN MAX

=2.0GHZ (P

IN MIN

=–4dBm)

• Pulse swallow function: 128/129 or 256/257

• Low supply current: I

=18mA typ.

CC

• Serial input 19-bit programmable divider consisting of:

Binary 8-bit swallow counter: 0 to 255 Binary 11-bit programmable counter: 16 to 2047

• Serial input 15-bit programmable reference divider consisting of:

Binary 14-bit programmable reference counter: 8 to 16383 1-bit switch counter (SW) Sets divide ratio of prescaler

• On-chip analog switch achieves fast lock up time

• 2types of phase detector output

On-chip charge pump (Bipolar type) Output for external charge pump

• Wide operating temperature: –40°C to +85°C

• 16-pin Plastic Flat Package (Suffix: –PF)

ABSOLUTE MAXIMUM RATINGS (see NOTE)

Rating

Power Supply Voltage

Output Voltage Open-drain Voltage Output Current Storage Temperature NOTE: Permanent device damage may occur if the above Absolute Maximum Ratings

are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Symbol Value

V V V V I

OUT

T

CC P OUT OOP

STG

–0.5 to +7.0

to 10.0

V

CC

–0.5 to VCC +0.5

–0.5 to 8.0

+10

–55 to +125

Unit

V V V V

mA

°C

PLASTIC PACKAGE

FPT-16P-M06

PIN ASSIGNMENT

1

IN

OSC

This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.

2

OUT

3

V

P

4

V

CC

D

GND

O

LD f

IN

TOP VIEW

5 6 7 89

16OSC

ØR

15

ØP

14

f

OUT

13

BISW

12

FC

11

LE

10

Data Clock

Copyright 1995 FUJITSU LIMITED and FUJITJU MICROELECTRONICS, INC.

1

MB1507

OSC

IN

OSC

OUT

V

P

V

CC

D

O

1

CRYSTAL OSCILLATOR

2

3

4

5

MB1507 BLOCK DIAGRAM

16-BIT SHIFT REGISTER

15-BIT LATCH

PROGRAMMABLE REFERENCE DIVIDER

BINARY 14-BIT REFERENCE COUNTER

S

W

16

14

13

12

15

R

P

f

OUT

BISW

FC

PHASE COMPARATOR

MONITOR FREQUENCY CHANGING CIRCUIT

ANALOG

CHARGE PUMP

f

r

SWITCH

D

LE

O

GND

LD

f

6

7

20-BIT SHIFT REGISTER

CONTROL 1-BIT LATCH

11

10

LE

Data

9

Clock

19-BIT LATCH

8-BIT LATCH 11-BIT LATCH

8

IN

PRESCALER

PROGRAMMABLE DIVIDER

BINARY 8-BIT SWALLOW COUNTER

BINARY 11-BIT PROGRAMMABLE COUNTER

f

p

CONTROL CIRCUIT

2

PIN DESCRIPTION

MB1507

Pin No.

1 2

3

4

5

Pin Name

OSC

IN

OSC

OUT

V

P

V

CC

D

O

7

8

f

IN

Clock9

10 Data I

I/O

Oscillator input.

I

Oscillator output.

O

A crystal is placed between OSC

Power supply input for charge pump and analog switch.

–

Power supply voltage input.

–

Charge pump output.

O

The characteristics of charge pump is reversed depending upon FC input.

Ground.

–6 GND

and OSC

IN

Description

.

OUT

Phase comparator output. Normally the output level is high level. While the phase difference of f

OLD

and fp exists, the output be-

r

comes low level.

Prescaler input.

I

The connection with VCO should be AC connection. Clock input for 20-bit shift register and 16-bit shift register.

I

On rising edge of the clock shifts one bit of data into the shift registers. Binary serial data input.

The last bit of the data is a control bit which specified destination of shift registers. When this bit is high level and LE is high level, the data stored in shift register is transferred to 15-bit latch. When this bit is low level and LE is high level, the data is transferred to 19-bit latch.

12

14

15 16

BISW

f

OUT

ØR

Load enable input (with pull up resistor).

I11 LE

When LE is high or open, the data stored in shift register is transferred into latch depending upon the control bit. At the time, internal charge pump output to be connected to BISW pin because internal analog switch becomes ON state.

Phase select input of phase comparator (with pull up resistor).

IFC

When FC is low level, the characteristics of charge pump, phase comparator is reversed. FC pin input signal controls f

pin (test pin) output level, fr or fp.

out

Analog switch output.

O13

Usually BISW pin is set high-impedance state. When internal analog switch is ON (LE pin is high level), this pin outputs internal charge pump output.

Monitor pin of phase comparator input.

pin outputs programmable reference divider output (fr) or programmable divider output (fp) de-

f

out

O

pending upon FC pin input level. FC=H: It is the same as f FC=L: It is the same as f

OØP

Outputs for external charge pump.

O

The characteristics are reversed according to FC input.

output level.

r

output level.

p

∅P pin is N-channel open drain output.

3

MB1507

FUNCTIONAL DESCRIPTIONS

SERIAL DATA INPUT

Serial data input is achieved by three inputs, such as Data pin, Clock pin and LE pin. Serial data input controls 15–bit programmable reference divider and 19–bit programmable divider, respectively. Binary serial data is input to Data pin. On rising edge of clock shifts one bit of serial data into the internal shift registers and when load enable pin is high level or open, stored data is transferred into latch depending upon the control bit. Control data ”H” data is transferred into 15–bit latch. Control data ”L” data is transferred into 19–bit latch.

THE DIVIDE RATIO SETTING

f

=[(MxN)+A]xf

VCO

f

: Output frequency of external voltage controlled oscillator (VCO)

VCO

M: Preset modulus of external dual modulus prescaler (128 or 256) N: Preset divide ratio of binary 11-bit programmable counter (16 to 2047)

A: Preset divide ratio of binary 8-bit swallow counter (0 f

: Output frequency of the external reference frequency oscillator

OSC

R: Preset divide ratio of binary 14-bit programmable reference counter (8 to 16383)

OSC

÷R

≤A≤255, A<N)

PROGRAMMABLE REFERENCE DIVIDER

Programmable reference divider consists of 16-bit shift register , 15-bit latch and 14-bit reference counter. Serial 16-bit data format is shown below.

Control bit LSB

CS SS

S

1234

Divide ratio of programmable reference counter setting bit

S 5

Divide ratio of prescaler setting bit

S

6

7

8

9

S10S

MSB

SS13S14S

11 12

W

14-BIT PROGRAMMABLE REFERENCE COUNTER DIVIDE RA TIO

Divide

Ratio

R 8

9

SSS

S

14 13 12 11S10S9S8S7S6S5S43

00000000001000

SS

2

S 1

10010000000000

• ••••••••••••••

16383

11111111111111

NOTES: Divide ratio less than 8 is prohibited.

Divide ratio: 8 to 16383 SW: This bit selects divide ratio of prescaler.

SW=H :128/129

SW=L :256/257 S1 to S14: These bits select divide ratio of programmable reference divider. C: Control bit (sets as high level). Data is input from MSB side.

4

PROGRAMMABLE DIVIDER

Programmable divider consists of 20-bit shift register , 19-bit latch, 8-bit swallow counter and 11-bit programmable counter. Serial 20-bit data format is shown below.

Control bit LSB MSB

S

1234

5

6

7

8

S10S

9

11 12

SS13S14SCS SS

15S16S17S18

S

19

MB1507

Divide ratio of swallow counter

setting bit

8-BIT SWALLOW COUNTER DIVIDE RATIO

Divide

Ratio

A

0

1

• •••••••

255

NOTE: Divide ratio: 0 to 255

S7S6S5S

S 8

0

0000000

0

SS

43

•

1111111

1

2

S 1

1000000

11-BIT PROGRAMMABLE COUNTER DIVIDE RATIO

Divide

Ratio

N

16

17

SSS

S

19 18 17 16S15S14S13S12S11S10S9

00000010000

Divide ratio of programmable counter

setting bit

10001000000

• •••••••••••

2047

NOTES: Divide ratio less than 16 is prohibited.

11111111111

Divide ratio: 16 to 2047 S1 to S8: Swallow counter divide ratio setting bit. (0 to 255) S9 to S19: Programmable counter divide ratio setting bit. (16 to 2047) C: Control bit (sets to low level). Data is input from MSB side.

5

MB1507

Data

Clock

LE

t

, t2, t3, t4, t

1

S19=MSB

*(SW) (S14)

SERIAL DATA INPUT TIMING

≥1µs

5

S18 S11

t

1

S10

(S7) (S6)

t

2

S1=LSB

t

3

(S1)

C: CONTROL BIT

(C: CONTROL BIT)

t

4

t

5

NOTES: Parenthesis data is used for setting divide ratio of programmable reference divider.

On rising edge of clock shifts one bit of data into the shift register.

PHASE CHARACTERISTICS

VCO POLARITY

FC pin is provided to change phase polarity of phase comparator. Characteristics of internal charge pump output level (D

(ØR, ØP) are reversed depending upon FC pin input level. Also, monitor pin (f

) output level of phase comparator is controlled by FC pin input level.

out

FC=H or open FC=L

DOØR ØP f

fr>f

fr=f

fr<f

p

HLL(fr)LHZ(fp)

ZLZ ZLZ(fp)

LHZ(fr)HLL(fp)

Note: Z=(High impedance)

Depending upon VCO polarity, FC pin should be set accordingly: When VCO polarity are like , FC should be set High or open circuit; When VCO polarity are like , FC should be set Low.

1 2

), phase comparator output level

O

D

O

ØR ØP

out

)

(f

r

f

out

VCO OUTPUT FREQUENCY

1

2

VCO INPUT VOLTAGE

6

PHASE DETECTOR OUTPUT WAVEFORM (FC=High)

f

r

f

P

LD

MB1507

H

D

O

fr>f

p

fr=f

Z

L

p

fr<f

p

fr<f

p

fr<f

p

NOTES: Phase difference detection range: –2π to +2π

Spike appearance depends on charge pump characteristics. Also, the spike is output in order to diminish dead band. When f

or fr<fp, spike might not appear depending upon charge pump characteristics.

r>fp

ANALOG SWITCH

ON/OFF of analog switch is controlled by LE input signal. When the analog switch is ON, internal charge pump output (DO) is connected to BISW pin. When the analog switch is OFF, BI-SW pin is set to high-impedance state.

LE H(Changing the divide ratio of internal prescaler) L(Normal operating mode)

When an analog switch is inserted between LP1 and LP2, faster lock up time is achieved to reduce LPF time constant during PLL channel switching.

D

O

CHARGE PUMP LPF-1 LPF-2 V

Analog Switch

ON

OFF

CO

(CONTROL SIGNAL LE)

ANALOG SW

BISW

7

MB1507

RECOMMENDED OPERATING CONDITIONS

Value

Parameter Symbol

Min Typ Max

Unit

Power Supply Voltage

Input Voltage

Operating Temperature

V

CC

V

P

V

I

T

A

4.5

CC

GND

–40

5.0 5.5

— 8.0

—

V

CC

85

V

VV

V

°C

HANDLING PRECAUTIONS

This device should be transported and stored in anti-static containers.

•

• This is a static-sensitive device; take proper anti-ESD precautions. Ensure that personnel and equipment are properly grounded. Cover

workbenches with grounded conductive mats.

• Always turn the power supply off before inserting or removing the device from its socket.

• Protect leads with a conductive sheet when handling or transporting PC boards with devices.

8

ELECTRICAL CHARACTERISTICS

Parameter Symbol

Condition

Value

Min Typ Max

MB1507

Unit

Power Supply Current

Operating Frequency

Input Sensitivity

High-level Input Voltage

Low-level Input Voltage

High-level Input Current

Low-level Input Current

Input Current

High-level Output Current

Low-level Output Current

High Impedance Cutoff Current

f

in

OSC

f

in

OSC

Except f and OSC

Data Clock

OSC

LE, FC

Except D and OSC

,ØP

D

O

I

CC

f

in

O

OUT

f

OSC

P

fin

V

OSC

V

IH

IN

V

I

OSC

I

V

I

OFF

IL

IH

IL

LE

OH

OL

IN

Note 1

Note 2

— 50Ω

—

VCC=5V

VP=VCC to 8V V

=GND to 8V

OOP

—

10

—

–4

0.5

V

x0.7

CC

—

4.4

—

——

18.0

—

12

—

— —

—

1.0

–1.0

"50

–60

—

2000

20

6

——

VCCx0.3

—

0.4

1.1

mA

MHz

dBm

V

PP

V

µA

µA µA

V

µA

I

OH

Output Current

Except D and OSC

Analog Switch On Resistance

NOTE 1:f NOTE 2: AC coupling. Minimum operating frequency is measured with a capacitor 1000PF.

=2.0GHz, f

in

=12MHz X’tal VCC=5V. Inputs are grounded and outputs are open.

OSC

O OUT

I

OL

R

ON

—

–1.0

1.0

—

25

—

mA

Ω

9

MB1507

TEST CIRCUIT (Prescaler Input Sensitivity)

VCC=5V Vp=6V

P•G

50

0.1µF

1000pF

X’tal

Ω

87654321

MB1507

9 10111213141516

Oscilloscope

10

TYPICAL APPLICATION EXAMPLE

V

(6V)

PX

10k

Charge Pump Selection

12k

10k

(Internal or external)

MB1507

OUTPUT

LPF VCO

FROM CONTROLLER

ØR ØP f

OUT

BISW FC LE Data Clock

16 15 14 13 12 11 10 9

MB1507

12345678

OSC

X’tal

OSC

IN

OUT

V

p

CC

D

GND LD f

O

in

1000p

6V 5V

C

1

C

2

33k

0.1µ

0.01

47k 47k

100k

µ

V

(5V)

CC

LOCK DETECTOR

10k

V

, VPX: 8V max.

p

C

, C2: Depends on crystal oscillator

1

LE,FC : With pull up resistor ØP : Open drain output

11

MB1507

PACKAGE DIMENSIONS

16-LEAD PLASTIC FLAT PACKAGE

(Case No. : FPT-16P-M06)

+0.25

(10.15 )

–0.20

±.004

.018 (0.45

±0.10)

.050(1.27)

TYP

.400

INDEX

+.010 –.008

“B”

(7.80

.209

±.012

(5.30

±0.30)

Ø.005(0.13)

.307

±.016 ±0.40)

M

.089(2.25)MAX

(MOUNTING HEIGHT)

.002(0.05)MIN

(STAND OFF HEIGHT)

.268

+.016 –.008

.006

+0.40

(6.80 )

–0.20

.020

±.008

(0.50

±0.20)

+.002

(0.15 )

–.001

+0.05 –0.02

.350(8.89) REF

1991 FUJITSU LIMITED F16015S-2C

.004(0.10)

“A”

Details of “A” part

.016(0.40)

.008(0.20)

.007(0.18)

MAX

.027(0.68)

MAX

Details of “B” part

.006(0.15)

.008(0.20)

.007(0.18)

MAX

.027(0.68)

MAX

Dimensions in inches (millimeters)

12

MB1507

semiconductor applications. Complete Information sufficient for construction purposes is not necessarily given.

The information contained in this document has been carefully checked and is believed to be reliable. However, Fujitsu assumes no responsibility for inaccuracies.

The Information contained in this document does not convey any license under the copyrights, patent rights or trademarks claimed and owned by Fujitsu.

Fujitsu reserves the right to change products or specifications without notice. No part of this publication may be copied or reproduced in any form or by any means, or

transferred to any third party without prior written consent of Fujitsu.

13

MB1507

For further information please contact:

Japan

FUJITSU LIMITED Electronic Devices International Operations Department KAWASAKI PLANT, 1015 Kamikodanaka, Nakahara–ku, Kawasaki–shi, Kanagawa 211, Japan Tel: (044) 754–3753 FAX: (044) 754–3332

North and South America

FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, USA Tel: (408) 922–9000 FAX: (408) 432–9044/9045

Europe

FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10, 63303 Dreieich-Buchschlag, Germany Tel: (06103) 690-0 FAX: (06103) 690-122

Asia Pacific

FUJITSU MICROELECTRONICS ASIA PTE LIMITED No.51 Bras Basah Road, Plaza By The Park, #06-04 to #06-07 Singapore 0718 Tel: 336-1600 FAX: 336-1609

9501  FUJITSU LIMITED Printed in Japan

14