The Fujitsu MB1504/MB1504H/MB1504L, utilizing BI-CMOS technology, is a single chip
serial input PLL frequency synthesizer with pulse-swallow function.
The MB1504 series contains a 520MHz two modulus prescaler that can select either 32/33
or 64/65 divide ratio; control signal generator; 16-bit shift register; 15-bit latch;
programmable reference divider (binary 14-bit programmable reference counter); 1-bit
switch counter; phase comparator with phase inverse function; charge pump; crystal
oscillator; 19-bit shift register; 18-bit latch; and a programmable divider (binary 7-bit
swallow counter and binary 11-bit programmable counter).
The MB1504 operates from a low supply voltage (3V typ) and consumes low power (30mW
at 520MHz).
MB1504 Product Line
D
MB1504
MB1504H
MB1504L
V
VoltageV
P
8V max
10V max
8V max
VoltageLock up Time
OOP
8.5V max
10.0V max
8.5V max
Middle speed
High speed
Low speed
O
Width
Middle
Low
High
Output
High-level
Output Current
Middle
High
Low
Low-level
Output Current
Middle
Low
High
PLASTIC PACKAGE
DIP-16P-M04
FEA TURES
•
High operating frequency: f
IN MAX
=520MHz (V
IN MIN
=0.20V
• On-chip prescaler
• Low power supply voltage: 2.7V to 5.5V (3.0V typ)
• Low power supply consumption: 30mW (3.0V , 520MHz operation)
• Serial input 18-bit programmable divider consisting of:
–Binary 7-bit swallow counter (Divide ratio: 0 to 127)
–Binary 11-bit programmable counter (Divide ratio: 16 to 2047)
• Serial input 15-bit programmable reference divider consisting of:
–Binary 14-bit programmable reference counter (Divide ratio: 8 to 16383)
–1-bit switch counter (SW) Sets divide ratio of prescaler
• 2 types of phase detector output
–On-chip charge pump (Bipolar type)
–Output for external charge pump
• Wide operating temperature: T
=–40C to +85C
A
P-P
)
PLASTIC PACKAGE
FPT-16P-M06
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to this high impedance circuit.
Copyright 1994 by FUJITSU LIMIED
1
Page 2
MB1504
MB1504H
MB1504L
PIN ASSIGNMENT
OSC
1
IN
2
OUT
3
V
P
4
V
CC
D
GND
O
LD
f
in
( TOP VIEW )
5
6
7
89
16OSC
ØR
15
ØP
14
f
P
13
f
r
12
FC
11
LE
10
Data
Clock
ABSOLUTE MAXIMUM RATINGS (see NOTE)
Rating
Power Supply Voltage
Output Voltage
Open-drain Output
Output Current
Storage Temperature
NOTE:Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted
to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
SymbolValue
V
CC
V
PH
VP,V
PL
V
OUT
V
OOPH
V
OOP,VOOPL
I
OUT
T
STG
Condition
—
MB1504H
MB1504/1504L
—
MB1504H
MB1504/1504L
—
—
–0.5 to +7.0
V
CC
VCC to 10.0
–0.5 to V
–0.5 to 11.0
–0.5 to 9.0
–55 to +125
to 12.0
CC
+10
+0.5
Unit
V
V
V
V
mA
°C
2
Page 3
MB1504/MB1504H/MB1504L BLOCK DIAGRAM
MB1504
MB1504H
MB1504L
OSC
OSC
V
CC
GND
LE
OUT
f
4
6
11
1
IN
2
8
IN
Crystal
Oscillator
Circuit
Prescaler
Circuit
16-Bit Shift Register
16-Bit Shift Register
15-Bit Latch
15-Bit Latch
Programmable
Reference Divider
Binary 14-Bit
Reference Counter
19-Bit Shift Register
19-Bit Shift Register
18-Bit Latch
7-Bit Latch11-Bit Latch
1-bit
SW
Phase
Comparator
Charge
Pump
13
12
16
14
15
f
r
FC
7
LD
ØR
ØP
3
V
P
5
D
O
f
P
Data
Clock
10
Programmable Divider
Control
1-Bit Latch
9
Binary 7-Bit
Swallow Counter
Control Circuit
Binary 11-Bit
Programmable Counter
3
Page 4
MB1504
MB1504H
MB1504L
PIN DESCRIPTIONS
Pin No.Pin NameDescriptions
1
2
3
4
5
6GND
7
8
10Data
OSC
OSC
V
V
D
LD
f
Clock9
IN
P
CC
O
IN
OUT
I/O
Oscillator input
I
Oscillator output
O
A crystal is placed between OSC
Power supply input for charge pump
—
Power supply voltage input
—
Charge pump output
O
The phase characteristics can be inversed depending upon the FC input.
Ground
—
Phase comparator output
This pin outputs high when the phase is locked. While the phase difference of f
O
level goes low.
Prescaler input
I
The connection with an external VCO should be an AC connection.
Clock input for 19-bit shift register and 16-bit shift register
I
Each rising edge of the clock shifts one bit of data into the shift registers.
Serial data of binary code input
The last bit of the data is a control bit. The last data bit specifies which latch is activated.
I
When the last bit is high level and LE is high-level, data is transferred to the 15-bit latch.
When the last bit is low level and LE is high level, data is transferred to the 18-bit latch.
and OSC
IN
OUT
.
and fp exists, the output
r
11LE
12
13
14
15
16
FC
f
ØP
ØR
Load enable input (with internal pull up resistor)
When LE is high level (or open), data stored in the shift register is transferred to the latch depending on the
I
control data.
Phase selecting input of phase comparator (with internal pull up resistor)
O
When FC is low level, the charge pump and phase detector characteristics can be inversed.
f
r
P
Monitor pin of phase comparator input
O
It is the same as the programmable reference divider output.
Monitor pin of phase comparator input
O
It is the same as the programmable divider output.
Outputs for external charge pump
O
O
The phase characteristics can be inversed depending on the FC input.
The ØP pin is an N-channel open-drain output.
4
Page 5
MB1504
MB1504H
MB1504L
FUNCTIONAL DESCRIPTIONS
SERIAL DATA INPUT
Serial data input is input using the Data pin, Clock pin and LE pin. The 15-bit programmable reference divider and 18-bit programmable divider are
controlled, respectively.
On rising edge of the clock, one bit of the data shifts into the internal shift registers.
When load enable (LE) is high level (or open), data stored in the shift registers is transferred to the 15-bit latch or 18-bit latch depending upon the control bit
level.
Control data “H” : Data is transferred into the 15-bit latch.
Control data “L” : Data is transferred into the 18-bit latch.
PROGRAMMABLE REFERENCE DIVIDER
The programmable reference divider consists of a 16-bit shift register, 15-bit latch and 14-bit reference counter . Serial 16-bit data format is shown below .
Data input
Control bit
LSB
Divide ratio of prescaler setting bit
MSB
First data inputLast data input
S
S
S
7
S
8
SSS
S
1234
Divide ratio of programmable reference counter setting bits
14-BIT PROGRAMMABLE REFERENCE COUNTER DIVIDE RATIO
Divide
ratio
R
8
9
SSS
S
14131211S10S9S8S7S6S5S43
00000000001000
5
6
•••••••••••••••
163831111
Divide ratio less than 8 is prohibited
Divide ratio R: 8 to 16383
SW: Divide ratio of prescaler setting bit
S
1
C: Control bit (control bit is set to high)
SW=“H”: 32
SW=“L”: 64
to S14: Divide ratio of programmable reference counter setting bits (8 to 16383)
1111111111
S
9
S10S
1112
SS13S
SS
14
2
SWC
S
1
10010000000000
5
Page 6
MB1504
MB1504H
MB1504L
FUNCTIONAL DESCRIPTIONS
PROGRAMMABLE DIVIDER
The programmable divider consists of a 19-bit shift register, 18-bit latch, 7-bit swallow counter and 11-bit programmable counter.
Serial 19-bit data format is shown below.
Last data input
SSS
C
1234
7-BIT SWALLOW COUNTER DIVIDE RATIO
Divide
ratio
A
0
1
S7S6S5S
0000000
Control bit
LSBMSB
S
Divide ratio of swallow counter
setting bits
43
S
5
SS
••••••••
631111110
Divide ratio A : 0 to 63
S
6
2
Data input
S
S
S
S10S
7
8
S
1
1000000
9
11-BIT PROGRAMMABLE COUNTER DIVIDE RATIO
Divide
ratio
N
16
17
1112
Divide ratio of programmable counter
SSS
S
18171615S14S13S12S11S10S9S8
00000010000
••••••••••••
20471
Divide ratio less than 16 is prohibited
Divide ratio N : 16 to 2047
SS13S14S
setting bits
First data input
15S16S17S18
1111111
10001000000
111
S8 to S18:Divide ratio of programmable counter setting bits (16 to 2047)
S
to S7:Divide ratio of swallow counter setting bits (0 to 127)
1
C: Control bit (control bit is set to low)
Data is input from the MSB.
6
Page 7
SERIAL DATA INPUT TIMING
MB1504
MB1504H
MB1504L
Data
S18=MSB
*(SW)(S14)
S17
S10
(S8) (S7)
S9
Clock
LE
t
1
– t
≥ 1µs
t
1
5
On the rising edge of the clock, one bit of the data shifts into the shift registers.
Data in ( ) is used for setting the divide ratio of the programmable reference divider.
t
2
PHASE CHARACTERISTICS
VCO CHARACTERISTICS
The FC pin (pin 12) is provided to inverse the phase comparator characteristics.
The characteristics of the internal charge pump output (D
outputs (ØR,
ØP) can be inversed depending upon the FC input data. Outputs
are shown below.
), and phase detector
O
t
3
S1=LSB
(S1)
C: Control bit
(C: Control bit)
t
4
t
5
1
FC=H (or open)FC=L
O
Z
ØRØP
L
L
L
Z
fr>f
fr<f
fr=f
D
p
p
p
ØRØPD
O
HLLLHZ
L
HZH
ZLZ
Note:Z=(High impedance)
Depending upon VCO characteristics, FC pin should be set accordingly:
When VCO characteristics are like, FC should be set high or open circuit;
When VCO characteristics are like, FC should be set Low.
1
2
VCO OUTPUT FREQUENCY
2
VCO INPUT VOLTAGE
7
Page 8
MB1504
MB1504H
MB1504L
RECOMMENDED OPERATING CONDITIONS
ParameterSymbol
V
CC
—
MinTypMax
2.7
Value
3.05.5
Unit
V
Power Supply Voltage
Open-drain Output
Input Voltage
Operating Temperature
V
VP, V
V
OOP
V
PH
OOPH
, V
V
IN
T
A
PL
OOPL
MB1504H
MB1504
MB1504L
MB1504H
MB1504
MB1504L
—
—
V
CC
V
CC
V
CC
V
CC
GND
–40
—
—
—
—
—
—
10.0
8.5
10.0
8.5
V
CC
+85
V
V
V
°C
HANDLING PRECAUTIONS
• This device should be transported and stored in anti-static containers.
• This is a static-sensitive device; take proper anti-ESD precautions. Ensure that personnel and equipment are properly grounded. Cover work-
benches with grounded conductive mats.
• Always turn the power supply off before inserting or removing the device from its socket.
• Protect leads with a conductive sheet when handling or transporting PC boards with devices.
8
Page 9
ELECTRICAL CHARACTERISTICS
(VCC=2.7 to 5.5V, TA=–40 to +85°C)
MB1504
MB1504H
MB1504L
ParameterSymbol
Power Supply Current
Operating Frequency
Input Sensitivity
High-level Input Voltage
Low-level Input Voltage
High-level Input Current
Low-level Input Current
Input Current
High-level Output Voltage
Low-level Output Voltage
N-channel Open-drain
Cutoff Current
Pin NameCondition
V
CC
f
IN
OSC
f
IN
OSC
Except
f
and
IN
OSC
Data,
Clock
OSC
LE, FC
Except
D
and
O
OSC
ØP
IN
IN
IN
IN
OUT
I
CC
f
IN
f
OSC
PfIN1
PfIN2–46
V
IN
V
IH
V
IL
I
IH
I
IL
I
IN
I
LE
V
OH
V
OL
I
OFF
*1
*2
V
=2.7 to 4.0V
CC
=4.0 to 5.5V
V
CC
V
=3.0V
CC
V
≤ V
CC
—
—
P
—
—
—
—
—
≤ 8V
Value
MinTypMax
—16
10
—
–10
10mA
—
12
—
520
20
6
Unit
MHz
MHz
dBm
—dBm
0.5
0.7xV
——
——
——
——
——
2.4
——
——
——
——
CC
1.0
–1.0
±50
–60
——
0.3xV
0.4
1.1
CC
V
P-P
V
V
µA
µA
µA
µA
V
V
µA
High-level Output Current
Low-level Output CurrentI
Input Sensitivity vs. Input Frequency (Supply Voltage Dependence)
10
Guaranteed
(dBm)
fIN
Operating Area
V
0
CC
VCC=2.7V to 4.0V
–10
=4.0 to 5.5V
MB1504
MB1504H
MB1504L
–20
VCC=2.7V
Input Sensitivity P
–30
VCC=4.0V
VCC=5.5V
0.30.40.50.60.70.80.91.01.11.2
Input Frequency fIN (GHz)
Input Sensitivity vs. Input Frequency (Temperature Dependence)
10
(dBm)
fIN
Guaranteed
Operating Area
V
0
VCC=2.7V to 4.0V
–10
–20
=4.0 to 5.5V
CC
TA=–40°C
TA=+25°C
TA=+85°C
T
=+25°C
A
PG
V
0.1µ
1000pF
50Ω
87654321
910111213141516
V
X’tal
Oscilloscope
P
CC
Input Sensitivity P
–30
0.30.40.50.60.70.80.91.01.11.2
Input Frequency f
(GHz)
IN
V
=3.0V
CC
1000pF
PG
50Ω
87654321
910111213141516
0.1µ
V
CC
X’tal
Oscilloscope
V
P
13
Page 14
MB1504
MB1504H
MB1504L
INPUT IMPEDANCE
TEST CIRCUIT
DO Pin Output Current (IOH, IOL) Measurement
V
OSC
IN
f
IN
CC
MB1504
V
P
D
O
I
OL
I
OH
14
Page 15
Lock up Time Measurement
MB1504
MB1504H
MB1504L
f
LPF Circuit
IN
1kΩ4kΩ4kΩ
V
=3V, VP=8V
CC
f
=Low unlock condition Step to Lock condition (533MHz)
VCO
f
=High unlock condition Step to Lock condition (518MHz)
VCO
MB1504LPFVCO
12.8MHz
1kΩ
10µF
Phase Characteristics Measurement
D
Controller
(Divide ratio
setting)
0.1
O
Oscilloscope (10M
µF1µF
Ω, 10pF)
to VCO
V
CC
OSC
⋅ G
P
P
⋅ G
V
CC
∆f=fr–fp
Energy (En)=V
IN
f
IN
=3V, VP=3V
2
t
MB1504
V
P
D
O
fr
fp
10kΩ
10kΩ
Oscilloscope
Ω, 10pF)
(10M
15
Page 16
MB1504
MB1504H
MB1504L
TYPICAL APPLICATION EXAMPLE
V
(6V)
PX
10k
Ω
Charge Pump Selection
12kΩ
12kΩ
10kΩ
(Internal or external)
OUTPUT
LPFVCO
FROM
CONTROLLER
ØRØPf
16151413121 1109
12345678
X’tal
C
1
OSC
C
OUT
2
OSC
IN
P
V
p
6V3V
0.1µF
f
r
MB1504
V
CC
FCLEDataClock
D
GNDLDf
O
IN
1000pF
Ω
33k
0.01µF
47kΩ47kΩ
V
(3V)
CC
100kΩ
10k
LOCK DET.
Ω
Vp, VPX: 8V max.
C
, C2: Depends on crystal oscillator
1
LE,FC : With internal pull up resistor
ØP: Open drain output
16
Page 17
PACKAGE DIMENSIONS
16-LEAD PLASTIC DUAL IN-LINE PACKAGE
(Case No.: DIP-16P-M04)
MB1504
MB1504H
MB1504L
+.008
.770
–.012
INDEX-1
INDEX-2
+.012
.039
–0
+0.30
(0.99 )
–0
.050(1.27)
MAX
.100(2.54)
1991 FUJITSU LIMITED D16033S-2C
(19.55 )
TYP
+0.20
–0.30
.060
(1.52 )
+.012
–0
+0.30
–0
.018
(0.46
(6.20
.020(0.51)MIN
±.003
±0.08)
.244
±.010
±0.25)
.300(7.62)
TYP
.172(4.36)MAX
.118(3.00)MIN
.010
(0.25
15
°MAX
±.002
±0.05)
Dimensions in
inches (millimeters)
17
Page 18
MB1504
MB1504H
MB1504L
PACKAGE DIMENSIONS
16-LEAD PLASTIC FLAT PACKAGE
(Case No.: FPT-16P-M06)
.050(1.27)
TYP
.400
+.010
–.008
INDEX
+0.25
(10.15 )
–0.20
“B”
±.004
.018
(0.45±0.10)
.209
±.012
(5.30
±0.30)
Ø.005(0.13)
.307
(7.80
±.016
±0.40)
M
.089(2.25)MAX
(MOUNTING HEIGHT)
.002(0.05)MIN
(STAND OFF HEIGHT)
.268
+.016
–.008
.006
(6.80 )
.020
±.008
(0.50
±0.20)
+.002
(0.15 )
–.001
+0.40
–0.20
+0.05
–0.02
.004(0.10)
.350(8.89) REF
1991 FUJITSU LIMITED F16015S-2C
“A”
Details of “A” part
.016(0.40)
.008(0.20)
.007(0.18)
MAX
.027(0.68)
MAX
Details of “B” part
.006(0.15)
.008(0.20)
.007(0.18)
MAX
.027(0.68)
MAX
Dimensions in
inches (millimeters)
18
Page 19
For further information please contact:
Japan
FUJITSU LIMITED
Electronic Devices
International Operations Department
KAWASAKI PLANT, 1015 Kamikodanaka,
Nakahara–ku, Kawasaki–shi,
Kanagawa 211, Japan
Tel: (044) 754–3753
FAX: (044) 754–3332
North and South America
FUJITSU MICROELECTRONICS, INC.
Semiconductor Division
3545 North First Street
San Jose, CA 95134-1804, USA
Tel: (408) 922–9000
FAX: (408) 432–9044/9045