Page 1
General Description
The MAX5954 hot-plug controller is designed for PCI
Express™ applications. The device provides hot-plug
control for 12V, 3.3V, and 3.3V auxiliary supplies of a single PCI Express (PCI-E) slot. The MAX5954’s logic
inputs/outputs allow interfacing directly with the system
hot-plug management controller or through an SMBus™
with an external I/O expander. Integrated debounced
attention switch and present-detect signals are included
to simplify system design.
The MAX5954 drives two external n-channel MOSFETs
to control the 12V and 3.3V main outputs. The 3.3V auxiliary output is controlled through an internal 0.3Ω
n-channel MOSFET. An internal charge pump provides
gate drive for the 12V output while the gate drive of the
3.3V output is driven by the 12V input supply. The 3.3V
auxiliary output is completely independent from the
main outputs with its own charge pump.
At power-up, the MAX5954 keeps all of the external
MOSFETs off until the supplies rise above their respective undervoltage-lockout (UVLO) thresholds. The
device keeps the internal MOSFET off only until the auxiliary input supply rises above its UVLO threshold. Upon
a turn-on command, the MAX5954 enhances the external and internal MOSFETs slowly with a constant gate
current to limit the power-supply inrush current. The
MAX5954 actively limits the current of all outputs at all
times and shuts down if an overcurrent condition persists for longer than a programmable overcurrent timeout. Thermal-protection circuitry also shuts down all
outputs if the die temperature exceeds +150°C. After an
overcurrent or overtemperature fault condition, the
MAX5954L latches off while the MAX5954A automatically restarts after a restart time delay. The device is available in a 36-pin (6mm × 6mm) thin QFN package and
operates over the -40°C to +85°C temperature range.
Applications
Servers
Desktop Mobile Server Platforms
Workstations
Embedded Devices
Features
♦ PCI Express Compliant
♦ Hot Swaps 12V, 3.3V, and 3.3V Auxiliary for a
Single PCI-E Slot
♦ Integrated Power MOSFET for Auxiliary Supply
Rail
♦ Controls dI/dt and dV/dt
♦ Active Current Limiting Protects Against
Overcurrent/Short-Circuit Conditions
♦ Programmable Current-Limit Timeout
♦ PWRGD Signal Output with Programmable
Power-On Reset (POR) (160ms Default)
♦ Latched FAULT Signal Output after Overcurrent
or Overtemperature Fault
♦ Attention Switch Input/Output with 4.4ms
Debounce
♦ Present-Detect Input
♦ Forced-On Input Facilitates Testing
♦ Thermal Shutdown
♦ Allows Control through SMBus with an I/O
Expander
MAX5954
Single PCI Express, Hot-Plug
Controller
________________________________________________________________ Maxim Integrated Products 1
19-3914; Rev 1; 1/06
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
N.C.
N.C.
3.3VAUXIN
PWRGD
FAULT
3.3G
N.C.
28
29
30
31
32
33
34
35
36
18
17
16
15
14
13
12
11
10
THIN QFN
MAX5954
TOP VIEW
+
3.3VAUXO
N.C.
T2T1N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
OUTPUT
INPUT
GND
PGND
PORADJ
TIM
12VIN
N.C.
ON
AUXON
12S+
12G
3.3S+
3.3S-
PRES-DET
12S-
FON
27 26 25 24 23 22
21 20 19
123
456789
Pin Configuration
Ordering Information
PART
TEMP RANGE
PIN-
PKG
CODE
MAX5954AETX+
T3666-3
MAX5954LETX+
T3666-3
Typical Application Circuit appears at end of data sheet.
SMBus is a trademark of Intel Corp.
PCI Express is a trademark of PCI-SIG Corp.
+Denotes lead free package.
PACKAGE
-40°C to +85°C
-40°C to +85°C
36 Thin QFN
36 Thin QFN
Page 2
MAX5954
Single PCI Express, Hot-Plug
Controller
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND, unless otherwise noted.)
12VIN......................................................................-0.3V to +14V
12G............................................................-0.3V to (V
12VIN
+ 6V)
12S, 12S-, 3.3G ......................................-0.3V to (V
12VIN
+ 0.3V)
3.3VAUXIN, ON,
FAULT ..........................................-0.3V to +6V
PWRGD ....................................................................-0.3V to +6V
PGND ....................................................................-0.3V to +0.3V
All Other Pins to GND......................-0.3V to (V
3.3VAUXIN
+ 0.3V)
Continuous Power Dissipation (TA= +70°C)
36-Pin Thin QFN (derate 26.3mW/°C above +70°C).....2.105W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ELECTRICAL CHARACTERISTICS
(V
12VIN
= V
12S-
= V
12S+
= 12V, V
3.3S+
= V
3.3S-
= V
3.3VAUXIN
= VON= V
AUXON
= V
FON
= 3.3V, PWRGD = FAULT = PORADJ = TIM =
OUTPUT = 12G = 3.3G = OPEN, INPUT = PRES-DET = PGND = GND, T
A
= -40°C to +85°C, unless otherwise noted. Typical values
are at T
A
= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
12V SUPPLY
12V Supply Voltage Range V
12VIN
V
V
12UVLO
Hysteresis
V
12VIN Supply Current I
12VIN
V
12VIN
= 13.2V
1mA
12VIN CONTROL
12VIN Current-Limit
Threshold (V
12S+
- V
12S-
)
V
12ILIM
mV
12G Gate Charge Current
V
12G
= GND 4 5 6 µA
Normal turn-off, ON = GND, V
12G
= 2V
µA
I
12G_DIS
O utp ut shor t- ci r cui t cond i ti on, str ong g ate p ul l d ow n
to r eg ul ati on, V
1 2V IN
- V
1 2S _
≥ 1V , V
1 2G_
= 5V
mA
12G Gate High Voltage
(V
12G
- V
12VIN
)
V
12GH
I
12G
= 1µA
V
12G Threshold Voltage For
PWRGD Assertion
V
PGTH12
Referred to V
12VIN
, I
12G_
= 1µA (Note 2)
4
V
12S- Input Bias Current 1µA
12S+ Input Bias Current
µA
3.3V SUPPLY
3.3V Supply Voltage Range V
3.3S+
V
3.3S+ rising
V
Undervoltage Lockout
(Note 3)
Hysteresis
mV
12VIN Undervoltage Lockout
V
12VIN
rising
10.8 12 13.2
9.5 10 10.5
0.1
0.5
49 54 59
I
12G_CHG
50 150 250
12G Gate Discharge Current
50 120 180
4.8 5.3 5.8
3.0
4.8
3.0 3.3 3.6
2.52 2.65 2.78
20 60
30
Page 3
MAX5954
Single PCI Express, Hot-Plug
Controller
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(V
12VIN
= V
12S-
= V
12S+
= 12V, V
3.3S+
= V
3.3S-
= V
3.3VAUXIN
= VON= V
AUXON
= V
FON
= 3.3V, PWRGD = FAULT = PORADJ = TIM =
OUTPUT = 12G = 3.3G = OPEN, INPUT = PRES-DET = PGND = GND, T
A
= -40°C to +85°C, unless otherwise noted. Typical values
are at T
A
= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
3.3V CONTROL
3.3V Current-Limit Threshold
(V
3.3S+
- V
3.3S-
)
V
3.3ILIM
mV
3.3G Gate Charge Current
V
3.3G
= GND 4 5 6 µA
ON = GND, V
3.3G
= 2V
µA
I
3.3G_DIS
O utp ut shor t- ci r cui t cond i ti on, str ong g ate p ul l d ow n
to r eg ul ati on, V
3 .3 S +
- V
3 .3 S
≥ 1V , V
3 .3 G
= 5V
mA
3.3G Gate High Voltage
(V
3.3G
- V
3.3S+
)
V
3.3G_H
Sourcing 1µA
V
3.3G Threshold Voltage For
PWRGD Assertion
V
PGTH3.3
Referred to V
3.3VAUXIN
, I
3.3G
= 1µA (Note 2)
V
3.3S- Input Bias Current 1µA
3.3S+ Input Bias Current
µA
3.3V AUXILIARY SUPPLY
3.3VAUXIN Supply Voltage
Range
V
3.3VAUXIN rising
V
3.3VAUXIN Undervoltage
Lockout
Hysteresis
mV
3.3VAUXIN Supply Current V
3.3VAUXIN
= 3.6V
3mA
3.3VAUXIN to 3.3VAUXO
Maximum Dropout
I
3.3VAUXO
= 375mA
mV
3.3VAUXO Current-Limit
Threshold
3.3VAUXO shorted to GND
mA
3.3VAUXO Threshold For
PWRGD Assertion
(V
3.3VAUXIN
- V
3.3VAUXO
)
(Note 3)
mV
LOGIC SIGNALS
Rising edge
V
Input-Logic Threshold
(ON, FON, AUXON,
PRES-DET, INPUT)
Hysteresis
mV
Input Bias Current
(ON, AUXON, INPUT)
1µA
FON, PRES-DET Internal
Pullup
kΩ
ON, AUXON High-to-Low
Deglitch Time
4µs
3.3G Gate Discharge Current
I
3.3G CHG
V
3.3VAUXIN
V
3 .3 V A U X U V L O
V
PGTH3.3AUX
17 20 23
50 150 250
100 150 220
4.5 5.5 6.8
-3.0 +4 +4.5
20 60
30
1.5
3.0 3.3 3.6
2.52 2.65 2.78
225
376 470 564
400
1.0 2.0
25
25 50 75
Page 4
MAX5954
Single PCI Express, Hot-Plug
Controller
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
12VIN
= V
12S-
= V
12S+
= 12V, V
3.3S+
= V
3.3S-
= V
3.3VAUXIN
= VON= V
AUXON
= V
FON
= 3.3V, PWRGD = FAULT = PORADJ = TIM =
OUTPUT = 12G = 3.3G = OPEN, INPUT = PRES-DET = PGND = GND, T
A
= -40°C to +85°C, unless otherwise noted. Typical values
are at T
A
= +25°C.) (Note 1)
PARAMETER
CONDITIONS
UNITS
PRES-DET High-to-Low
Deglitch Time
t
DEG
357ms
PORADJ = open
R
PORADJ
= 20kΩ
R
PORADJ
= 100kΩ
PWRGD Power-On Reset
Time (Note 2)
t
POR_HL
R
PORADJ
= 200kΩ
ms
PWRGD Low-to-High Deglitch
Time
t
POR_LH
4µs
Sinking 2mA
PWRGD, FAULT Output Low
Voltage
Sinking 30mA
V
PWRGD, FAULT Output-High
Leakage Current
V
PWRGD
= V
FAULT
= 5.5V 1 µA
TIM = open
R
TIM
= 15kΩ
R
TIM
= 120kΩ
FAULT Timeout t
FAULT
R
TIM
= 300kΩ
ms
FAULT Timeout During
Startup
t
SU
2 x t
FAULT
ms
Autorestart Delay Time t
RESTART
ms
Fault Reset Minimum Pulse
Width
t
RESET
(Note 4)
µs
Thermal-Shutdown Threshold
T
SD
TJ rising
°C
Thermal-Shutdown Threshold
Hysteresis
°C
OUTPUT Debounce Time t
DBC
ms
OUTPUT High Voltage Sourcing 2mA
V
3.3VAUXIN
- 0.3
V
OUTPUT Low Voltage Sinking 2mA
V
Note 1: 100% production tested at TA= +25°C. Parameters over temperature are guaranteed by design.
Note 2: PWRGD asserts a time t
POR_HL
after V
PGTH12
, V
PGTH3.3
, and V
PGTH3.3AUX
conditions are met.
Note 3: The UVLO for the 3.3V supply is sensed at 3.3S+.
Note 4: This is the time that ON or AUXON must stay low when resetting a fault condition.
SYMBOL
MIN TYP MAX
90 160 250
35 55 75
145 265 380
5.5 11 17.0
1.4 2.6 3.8
12 22 32
2.6 4.4 6.2
64 x t
+150
570
59
FAULT
100
20
V
0.1
0.7
3.3 V AU X IN
0.4
Page 5
MAX5954
Single PCI Express, Hot-Plug
Controller
_______________________________________________________________________________________ 5
12VIN INPUT SUPPLY CURRENT
vs. TEMPERATURE
MAX5954 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
603510-15
0.491
0.492
0.493
0.494
0.495
0.496
0.497
0.498
0.499
0.500
0.501
0.502
0.503
0.504
0.505
0.490
-40 85
3.3VAUXIN SUPPLY CURRENT
vs. TEMPERATURE
MAX5954 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
603510-15
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
-40 85
ON AND AUXON LOW-TO-HIGH THRESHOLD
VOLTAGE vs. TEMPERATURE
MAX5954 toc03
TEMPERATURE (°C)
THRESHOLD VOLTAGE (V)
603510-15
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
1.0
-40 85
3.3VAUXO OUTPUT VOLTAGE vs. CURRENT
MAX5954 toc04
OUTPUT CURRENT (A)
OUTPUT VOLTAGE (V)
0.50.40.30.20.1
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
00.6
12G AND 3.3G GATE CHARGE
CURRENT vs. TEMPERATURE
MAX5954 toc05
TEMPERATURE (°C)
GATE CHARGE CURRENT (µA)
603510-15
4.90
4.95
5.00
5.05
5.10
5.15
5.20
5.25
5.30
5.35
4.85
-40 85
12G
3.3G
12G AND 3.3G GATE DISCHARGE
CURRENT vs. TEMPERATURE
MAX5954 toc06
TEMPERATURE (°C)
GATE DISCHARGE CURRENT (µA)
603510-15
150
155
160
165
170
145
-40 85
3.3G
12G
3.3VAUX INTERNAL SWITCH
MAXIMUM DROPOUT vs. TEMPERATURE
MAX5954 toc07
TEMPERATURE (°C)
DROPOUT VOLTAGE (V)
603510-15
0.02
0.04
0.06
0.08
0.10
0.12
0.14
0.16
0.18
0.20
0
-40 85
AUXILIARY OUTPUT CURRENT = 375mA
12V AND 3.3V CURRENT-LIMIT THRESHOLD
VOLTAGE vs. TEMPERATURE
MAX5954 toc08
TEMPERATURE (°C)
CURRENT-LIMIT THRESHOLD VOLTAGE (mV)
603510-15
10
20
30
40
50
60
0
-40 85
12V CURRENT-SENSE
THRESHOLD
3.3V CURRENT-SENSE
THRESHOLD
AUXILIARY CURRENT LIMIT
vs. TEMPERATURE
MAX5954 toc09
TEMPERATURE (°C)
AUXILIARY CURRENT LIMIT (A)
603510-15
0.455
0.460
0.465
0.470
0.475
0.480
0.485
0.490
0.495
0.500
0.450
-40 85
Typical Operating Characteristics
(V
12VIN
= V
12S+
= 12V, V
3.3VAUXIN
= V
3.3S+
= VON= V
AUXON
= V
INPUT
= 3.3V, PRES-DET = GND, FON = PORADJ = TIM = float,
FAULT = 10kΩ to 3.3VAUXIN, PWRGD = 10kΩ to 3.3VAUXO, T
A
= +25°C, unless otherwise noted, see the Typical Application
Circuit.)
Page 6
MAX5954
Single PCI Express, Hot-Plug
Controller
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(V
12VIN
= V
12S+
= 12V, V
3.3VAUXIN
= V
3.3S+
= VON= V
AUXON
= V
INPUT
= 3.3V, PRES-DET = GND, FON = PORADJ = TIM = float,
FAULT = 10kΩ to 3.3VAUXIN, PWRGD = 10kΩ to 3.3VAUXO, T
A
= +25°C, unless otherwise noted, see the Typical Application
Circuit.)
12VIN UNDERVOLTAGE-LOCKOUT
THRESHOLD vs. TEMPERATURE
MAX5954 toc10
TEMPERATURE (°C)
UVLO THRESHOLD (V)
6035-15 10
9.85
9.90
9.95
10.00
10.05
10.10
10.15
10.20
9.80
-40 85
3.3VAUXIN UNDERVOLTAGE-LOCKOUT
THRESHOLD vs. TEMPERATURE
MAX5954 toc11
TEMPERATURE (°C)
UVLO THRESHOLD (V)
603510-15
2.62
2.64
2.66
2.68
2.70
2.60
-40 85
12V TURN-ON/OFF TIME
MAX5954 toc12
12G
20V/div
PWRGD
5V/div
ON
5V/div
12V OUTPUT
10V/div
40ms/div
3.3V TURN-ON/OFF TIME
MAX5954 toc13
3.3G
10V/div
PWRGD
5V/div
ON
5V/div
3.3V OUTPUT
5V/div
40ms/div
3.3V AUXILIARY TURN-ON/OFF TIME
MAX5954 toc14
40ms/div
3.3AUXO
OUTPUT VOLTAGE
2V/div
AUXON
2V/div
PWRGD
2V/div
12V POWER-UP
MAX5954 toc15
12V OUTPUT
10V/div
PWRGD
5V/div
12VIN, 12V INPUT
10V/div
12G
20V/div
40ms/div
Page 7
MAX5954
Single PCI Express, Hot-Plug
Controller
_______________________________________________________________________________________ 7
Typical Operating Characteristics (continued)
(V
12VIN
= V
12S+
= 12V, V
3.3VAUXIN
= V
3.3S+
= VON= V
AUXON
= V
INPUT
= 3.3V, PRES-DET = GND, FON = PORADJ = TIM = float,
FAULT = 10kΩ to 3.3VAUXIN, PWRGD = 10kΩ to 3.3VAUXO, T
A
= +25°C, unless otherwise noted, see the Typical Application
Circuit.)
3.3V INPUT/3.3V AUXILIARY INPUT
POWER-UP
MAX5954 toc16
3.3V OUTPUT
5V/div
PWRGD
5V/div
3.3VAUXO
5V/div
3.3G
10V/div
100ms/div
3.3S+
5V/div
TURN-ON DELAY 3.3V OUTPUT AND
3.3V AUXILIARY OUTPUT
MAX5954 toc17
4ms/div
5V/div
5V/div
5V/div
5V/div
10V/div
3.3VAUXO
OUTPUT VOLTAGE
3.3 VOLTAGE
3.3 INPUT,
3.3VAUXIN
3.3G
PWRGD
FAULT CONDITION ON 12V OUTPUT
(AUTORESTART OPTION MAX5954A)
MAX5954 toc18
12G
20V/div
FAULT
5V/div
12V OUTPUT CURRENT
5A/div
100ms/div
12V OUTPUT VOLTAGE
10V/div
t
RESTART
R
LOAD
STEP TO 1.5Ω
FAULT CONDITION ON 3.3V OUTPUT
(AUTORESTART OPTION MAX5954A)
MAX5954 toc19
3.3G
10V/div
FAULT
5V/div
3.3V MAIN OUTPUT CURRENT
2A/div
100ms/div
3.3V OUTPUT VOLTAGE
5V/div
t
RESTART
R
LOAD
STEP TO 0.5Ω
FAULT CONDITION ON AUXILIARY OUTPUT
(AUTORESTART OPTION MAX5954A)
MAX5954 toc20
FAULT
2V/div
3.3VAUXO OUTPUT CURRENT
500mA/div
100ms/div
3.3VAUXO OUTPUT VOLTAGE
2V/div
t
RESTART
R
LOAD
STEP TO 4Ω
FAULT CONDITION ON 12V OUTPUT
(LATCH OPTION MAX5954L)
MAX5954 toc21
12G
20V/div
FAULT
5V/div
12V OUTPUT CURRENT
5A/div
100ms/div
12V OUTPUT VOLTAGE
10V/div
R
LOAD
STEP TO 1.5Ω
Page 8
MAX5954
Single PCI Express, Hot-Plug
Controller
8 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(V
12VIN
= V
12S+
= 12V, V
3.3VAUXIN
= V
3.3S+
= VON= V
AUXON
= V
INPUT
= 3.3V, PRES-DET = GND, FON = PORADJ = TIM = float,
FAULT = 10kΩ to 3.3VAUXIN, PWRGD = 10kΩ to 3.3VAUXO, T
A
= +25°C, unless otherwise noted, see the Typical Application
Circuit.)
FAULT CONDITION ON 12V OUTPUT
MAX5954 toc22
12G
20V/div
FAULT
5V/div
12V OUTPUT CURRENT
5A/div
4ms/div
12V OUTPUT VOLTAGE
10V/div
R
LOAD
STEP TO 1.5Ω
t
FAULT
FAULT CONDITION ON 3.3V OUTPUT
(LATCH OPTION MAX5954)
MAX5954 toc23
3.3G
10V/div
FAULT
5V/div
3.3V OUTPUT CURRENT
2A/div
100ms/div
3.3V OUTPUT VOLTAGE
5V/div
R
LOAD
STEP TO 0.5Ω
FAULT CONDITION ON 3.3V MAIN OUTPUT
MAX5954 toc24
3.3G
10V/div
FAULT
5V/div
3.3V OUTPUT CURRENT
2A/div
4ms/div
3.3V OUTPUT VOLTAGE
5V/div
R
LOAD
STEP TO 0.5Ω
t
FAULT
FAULT CONDITION ON AUXILIARY OUTPUT
(LATCH OPTION MAX5954)
MAX5954 toc25
FAULT
2V/div
3.3VAUXO OUTPUT CURRENT
500mA/div
100ms/div
3.3VAUXO OUTPUT VOLTAGE
2V/div
R
LOAD
STEP TO 4Ω
FAULT CONDITION ON AUXILIARY OUTPUT
MAX5954 toc26
FAULT
2V/div
3.3VAUXO OUTPUT CURRENT
500mA/div
4ms/div
3.3VAUXO OUTPUT VOLTAGE
2V/div
R
LOAD
STEP TO 4Ω
t
FAULT
SHORT CIRCUIT ON 12V OUTPUT
MAX5954 toc27
12G
20V/div
FAULT
5V/div
12V OUTPUT CURRENT
5A/div
2ms/div
12V OUTPUT VOLTAGE
10V/div
Page 9
MAX5954
Single PCI Express, Hot-Plug
Controller
_______________________________________________________________________________________ 9
Typical Operating Characteristics (continued)
(V
12VIN
= V
12S+
= 12V, V
3.3VAUXIN
= V
3.3S+
= VON= V
AUXON
= V
INPUT
= 3.3V, PRES-DET = GND, FON = PORADJ = TIM = float,
FAULT = 10kΩ to 3.3VAUXIN, PWRGDA = 10kΩ to 3.3VAUXO, T
A
= +25°C, unless otherwise noted, see the Typical Application
Circuit.)
SHORT CIRCUIT ON 12V OUTPUT
MAX5954 toc28
12G
20V/div
FAULT
5V/div
12V OUTPUT CURRENT
25A/div
4µs/div
12V OUTPUT VOLTAGE
10V/div
0V
0V
0V
SHORT CIRCUIT ON 3.3V OUTPUT
MAX5954 toc29
3.3G
5V/div
FAULT
5V/div
3.3V OUTPUT CURRENT
2A/div
2ms/div
3.3V OUTPUT VOLTAGE
5V/div
SHORT CIRCUIT ON 3.3V OUTPUT
MAX5954 toc30
3.3G
5V/div
FAULT
5V/div
3.3V OUTPUT CURRENT
10A/div
2µs/div
3.3V OUTPUT VOLTAGE
5V/div
0V
SHORT CIRCUIT ON 3.3AUXO_
MAX5954 toc31
FAULT
5V/div
3.3VAUXO OUTPUT CURRENT
500mA/div
2ms/div
3.3VAUXO OUTPUT VOLTAGE
2V/div
SHORT CIRCUIT ON 3.3VAUXO_
MAX5954 toc32
FAULT
5V/div
3.3VAUXO OUTPUT CURRENT
5A/div
2µs/div
3.3VAUXO OUTPUT VOLTAGE
2V/div
POWER-UP INTO FAULT
(AUXILIARY SUPPLY)
MAX5954 toc33
3.3VAUXO OUTPUT VOLTAGE
2V/div
FAULT
5V/div
3.3VAUXO OUTPUT CURRENT
500mA/div
4ms/div
AUXON
5V/div
t
SU
R
LOAD
= 4Ω
Page 10
MAX5954
Single PCI Express, Hot-Plug
Controller
10 ______________________________________________________________________________________
Typical Operating Characteristics (continued)
(V
12VIN
= V
12S+
= 12V, V
3.3VAUXIN
= V
3.3S+
= VON= V
AUXON
= V
INPUT
= 3.3V, PRES-DET = GND, FON = PORADJ = TIM = float,
FAULT = 10kΩ to 3.3VAUXIN, PWRGDA = 10kΩ to 3.3VAUXO, T
A
= +25°C, unless otherwise noted, see the Typical Application
Circuit.)
POWER-UP INTO FAULT
(3.3V MAIN)
MAX5954 toc34
3.3V OUTPUT VOLTAGE
2V/div
FAULT
5V/div
3.3V OUTPUT CURRENT
4A/div
4ms/div
ON, AUXON
5V/div
t
SU
R
LOAD
= 0.5Ω
3.3G
5V/div
POWER-UP INTO FAULT
(12V OUTPUT)
MAX5954 toc35
12V OUTPUT VOLTAGE
10V/div
FAULT
5V/div
12V OUTPUT CURRENT
5A/div
4ms/div
ON, AUXON
5V/div
t
SU
12G
10V/div
PRESENT-DETECT (ON/OFF) OPERATION
MAX5954 toc36
40ms/div
5V/div
5V/div
5V/div
10V/div
12V OUTPUT VOLTAGE
3.3VAUXO
OUTPUT VOLTAGE
PWRGD
PRES-DET
PRESENT-DETECT (ON/OFF) OPERATION
MAX5954 toc37
4ms/div
5V/div
5V/div
5V/div
10V/div
12V OUTPUT VOLTAGE
3.3VAUXO
OUTPUT VOLTAGE
PWRGD
PRES-DET
FORCED-ON (ON/OFF) OPERATION
MAX5954 toc38
40ms/div
5V/div
5V/div
5V/div
10V/div
12V OUTPUT VOLTAGE
3.3VAUXO
OUTPUT VOLTAGE
PWRGD
FON
FORCED-ON (ON/OFF) OPERATION
MAX5954 toc39
4ms/div
5V/div
5V/div
5V/div
10V/div
12V OUTPUT VOLTAGE
3.3VAUXO
OUTPUT VOLTAGE
PWRGD
FON
Page 11
MAX5954
Single PCI Express, Hot-Plug
Controller
______________________________________________________________________________________ 11
Typical Operating Characteristics (continued)
(V
12VIN
= V
12S+
= 12V, V
3.3VAUXIN
= V
3.3S+
= VON= V
AUXON
= V
INPUT
= 3.3V, PRES-DET = GND, FON = PORADJ = TIM = float,
FAULT = 10kΩ to 3.3VAUXIN, PWRGDA = 10kΩ to 3.3VAUXO, T
A
= +25°C, unless otherwise noted, see the Typical Application
Circuit.)
DEBOUNCED ON/OFF OPERATION
MAX5954 toc40
INPUT
2V/div
10ms/div
OUTPUT
2V/div
0
400
200
600
1200
1400
1000
800
1600
0 100 150 200 25050 300 350 400 450 500
POWER-ON RESET TIME
vs. PORADJ RESISTOR
MAX5954 toc41
R
PORADJ
(KΩ)
t
POR_HL
(MS)
0
60
40
20
80
100
120
0 20015050 100 250 300 350 400 450 500
t
FAULT
TIME DELAY
vs. TIM RESISTOR
MAX5954 toc42
R
TIM
(kΩ)
t
FAULT
(ms)
Page 12
MAX5954
Single PCI Express, Hot-Plug
Controller
12 ______________________________________________________________________________________
PIN NAME FUNCTION
1
Present-Detect Input. PRES-DET accepts inputs from the PRSNT#2 pin on a PCI-E connector. PRES-DET
has an internal pullup to 3.3VAUXIN. When PRES-DET is low, the outputs follow the command from ON
and AUXON after a 4ms debounced time. When PRES-DET goes from low to high, all outputs of the
respective slot shut down with no delay (see Table 2).
2 FON
Forced-On Input. FON has a 50kΩ internal pullup to 3.3VAUXIN. A logic-low on FON turns on all PCI-E
outputs as long as the power inputs are within their operating range, regardless of the status of the other
input signals. Leave FON open for normal operation (see Table 2).
3ON12V and 3.3V Outputs Enable. A logic-high at ON turns on the 12V and 3.3V outputs (see Table 2).
4 AUXON
3.3V Auxi l i ar y Outp ut E nab l e. A l og i c- hi g h at AU X ON tur ns on the auxi l i ar y outp ut ( 3.3V AU X O) ( see Tab l e 2) .
5 12S+
12V Positive Current-Sense Input. Connect the positive terminal of the current-sense resistor to 12S+
using the Kelvin-sensing technique to assure accurate current sensing.
6 12S-
12V Negative Current-Sense Input. Connect 12S- to the negative side of the current-sense resistor using
the Kelvin-sensing technique to assure accurate current sensing.
7 12G
12V Gate-Drive Output. Connect 12G to the gate of the 12V MOSFET. At power-up, V
12G
is raised to the internal charge-pump voltage level by a constant current.
83.3S+
3.3V Positive Current-Sense Input. Connect the positive side of the current-sense resistor to 3.3S+ using
the Kelvin-sensing technique to assure accurate current sensing. This input is also used for the 3.3V
supply’s UVLO function.
93.3S-
3.3V Negative Current-Sense Input. Connect to the negative side of the sense resistor using the Kelvinsensing technique to assure accurate current sensing.
10 3.3G
3.3V Gate- D r i ve O utp ut. C onnect 3.3G to the g ate of the 3.3V M O S FE T. At p ow er - up , V
3 .3 G
i s char g ed to 5.5V ab ove the 3.3V sup p l y b y a constant cur r ent d er i ved fr om V
1 2V IN
.
11 FAULT
Open-Drain Fault Output Signal. FAULT latches active low whenever the outputs are shut down
due to a fault. A fault is either of:
• An overcurrent condition lasting longer than the overcurrent timeout.
• A device over temperature condition.
If the fault is detected in the main outputs, FAULT must be reset by toggling the ON input. If the fault is in
the auxiliary output, FAULT must be reset by toggling both ON and AUXON. For the auto-restart version,
FAULT is reset when the part initiates the next power-on cycle.
12 PWRGD
Open-Drain Power-Good Output. PWRGD goes low t
POR_HL
after all outputs reach their final value and
the power MOSFETs are fully enhanced.
13
3.3V Auxiliary Power-Supply Output
14
3.3V Auxiliary Supply Input. 3.3VAUXIN is the input to a charge pump that drives the internal MOSFET
connecting 3.3VAUXIN to 3.3VAUXO. V
3.3VAUXIN
is also used to power the internal control logic and
analog references of the MAX5954.
15–23,
26, 27,
29, 30
N.C. No Connection. Not internally connected.
24 T1 Test Input. Connect T1 to GND.
Pin Description
PRES-DET
3.3VAUXO
3.3VAUXIN
Page 13
Detailed Description
The MAX5954 hot-plug controller is designed for PCI
Express applications. The device provides hot-plug
control for 12V, 3.3V, and 3.3V auxiliary supplies of a
single PCI Express slot. The MAX5954’s logic
inputs/outputs allow interfacing directly with the system
hot-plug-management controller or through an SMBus
with an external I/O expander. An integrated
debounced attention switch and present-detect signals
are included to simplify system design.
The MAX5954 drives two external n-channel MOSFETs
to control the 12V and 3.3V main outputs. The 3.3V auxiliary output is controlled through an internal 0.3Ω
n-channel MOSFET. An internal charge pumps provides a gate drive for the 12V output while the gate
drive of the 3.3V output is driven by the 12V input supply. The 3.3V auxiliary output is completely independent from the main outputs with its own charge pump.
At power-up, the MAX5954 keeps all of the external
MOSFETs off until all supplies rise above their respective UVLO thresholds. The device keeps the internal
MOSFET off only until the 3.3VAUXIN supply rises
above its UVLO threshold. Upon a turn-on command,
the MAX5954 enhances the external and internal
MOSFETs slowly with a constant gate current to limit
the power-supply inrush current. The MAX5954 actively
limits the current of all outputs at all times and shuts
down if an overcurrent condition persists for longer
than a programmable overcurrent timeout. Thermalprotection circuitry also shuts down all outputs if the die
temperature exceeds +150°C. After an overcurrent or
overtemperature fault condition, the MAX5954L latches
off while the MAX5954A automatically restarts after a
restart time delay.
The power requirement for PCI Express connectors is
defined by the PCI Express card specification and
summarized in Table 1.
Startup
The main supply outputs can become active only after
all the following events have occurred:
•V
3.3VAUXIN
is above its UVLO threshold
•V
12VIN
and V
3.3S+
are both above their UVLO
threshold
• ON is driven high
• PRES-DET is low for more than 5ms
The auxiliary supply output is made available only after
the following events have occurred:
•V
3.3VAUXIN
is above its UVLO threshold
• AUXON is driven high
• PRES-DET is low for more than 5ms
The FON input overrides all other control signals and
turns on the PCI Express slot when driven low, as long
as the UVLO thresholds have been reached. Table 2
summarizes the logic conditions required for startup.
The auxiliary supply input powers the internal control
logic and analog references of the MAX5954, so the
main supplies cannot be enabled if V
3.3VAUXIN
is not
present.
When an output is enabled, a programmable startup
timer (tSU) begins to count the startup time duration.
The value of tSUis set to 2x the fault timeout period
MAX5954
Single PCI Express, Hot-Plug
Controller
______________________________________________________________________________________ 13
PIN NAME FUNCTION
25 T2 Test Input. Connect T2 to GND.
28 TIM
Overcurrent Timeout Programming Input. Connect a resistor between 500Ω and 500kΩ from TIM to GND
to program t
FAULT
. Leave TIM floating for a default timeout of 11ms.
31 OUTPUT Digital Output. 4ms debounced digital output of INPUT.
32 INPUT Digital Logic Gate Input
33 12VIN
12V Supply Input. V
12VIN
drives the gate of the MOSFET connected to 3.3G. 12VIN powers an internal
charge pump that drives the gate of the MOSFET connected to 12G.
34 GND Ground
35 PGND Power Ground. Connect externally to GND.
36 PORADJ
Power-On-Reset Programming Input. Connect a resistor between 500Ω and 500kΩ from PORADJ to GND
to program the POR timing. Leave floating for a default value of 160ms.
Pin Description (continued)
Page 14
MAX5954
Single PCI Express, Hot-Plug
Controller
14 ______________________________________________________________________________________
5µA
12S-
12G
12S+
54mV
108mV
R
SENSE12
150µA
10µA
100µA
-+-
+
10µA
100mA
5µA
3.3S-
3.3G
3.3S+
20mV
40mV
150µA
3.3V
AUXIN
3.3AUXO
GNDPGNDPRES-DETFONAUXON
UVLO
VREF
ON
R
SENSE3.3
10µA
150µA
-+-
+
10µA
150mA
CHARGE
PUMP
-
+
R
TIM
TIM
IN OUT 12VIN PWRGD FAULT
R
PORADJ
PORADJ
DEBOUNCE
CHARGE
PUMP
FAST
OSCILLATOR
CONTROL LOGIC
MAIN-CHANNEL
CONTROL LOGIC
AUX-CHANNEL
INPUT COMPARATORS AND CHIP CONTROL LOGIC
t
FAULT
OSCILLATOR
t
POR
OSCILLATOR
BIAS, REFERENCES
AND UVLO
MAX5954
Figure 1. Functional Diagram
Page 15
(t
FAULT
). R
TIM
externally connected from TIM to GND
sets the duration of t
FAULT
.
12V and 3.3V Outputs Normal Operation
The MAX5954 monitors and actively limits the current of
the 12V and 3.3V outputs after the startup period. Each
output has its own overcurrent threshold. If any of the
monitored output currents rise above the overcurrent
threshold for a period t
FAULT
, FAULT asserts and the
controller disengages both the 12V and 3.3V outputs
(see the Fault Management section).
3.3V Auxiliary Output Normal Operation
The auxiliary output current is internally monitored and
actively limited to the maximum current-limit value. An
overcurrent fault condition occurs when the
output current exceeds the overcurrent threshold
for longer than t
FAULT
. A fault on an auxiliary channel
causes all supplies to be disabled after a programmable
time period t
FAULT
(see the Fault Management section).
Power-Good (
PPWWRRGGDD
)
Power-good (PWRGD) is an open-drain output that
pulls low a time (t
POR_HL
) after all of the outputs are
fully on. All outputs are considered fully on when 3.3G
has risen to V
PGTH3.3
, 12G has risen to V
PGTH12
, and
V
3.3AUXO
is less than V
PGTH3.3AUX
. t
POR_HL
is
adjustable from 2.5ms to 1.5s by connecting a resistor
from PORADJ to GND. See the Setting the Power-On-
Reset Timeout Period (t
POR
) section.
MAX5954
Single PCI Express, Hot-Plug
Controller
______________________________________________________________________________________ 15
Table 1. Power Requirements for PCI Express Connectors
POWER RAIL X1 CONNECTOR X4/8 CONNECTOR X16 CONNECTOR
3.3V
Voltage Tolerance ±9% (max) ±9% (max) ±9% (max)
Supply Current 3.0A (max) 3.0A (max) 3.0A (max)
Capacitive Load 1000µF (max) 1000µF (max) 1000µF (max)
12V
Voltage Tolerance
±8% (max) ±8% (max) ±8% (max)
Supply Current
0.5A (max) 2.1A (max) 5.5A (max)
Capacitive Load
300µF (max) 1000µF (max) 2000µF (max)
3.3V AUXILIARY
Voltage Tolerance
±9% (max) ±9% (max) ±9% (max)
S up p l y C ur r ent, W ake E nab l ed
375mA (max) 375mA (max) 375mA (max)
Supply Current, Non-Wake Enabled
20mA (max) 20mA (max) 20mA (max)
Capacitive Load 150µF (max) 150µF (max) 150µF (max)
Table 2. Control Logic Truth Table
ON AUXON FON PRES-DET
12V AND 3.3V
OUTPUTS
3.3VAUXO
AUXILIARY
OUTPUT
XXLow X On On
XXHigh High Off Off
Low Low High Low* Off Off
High Low High Low* On Off
Low High High Low* Off On
High High High Low* On On
*
PRES-DET
high-to-low transition has a 5ms delay (t
DEG
).
Page 16
MAX5954
Thermal Shutdown
When the die temperature goes above +150°C (TSD), an
overtemperature fault occurs and the MAX5954 shuts
down all outputs. The device waits for the junction temperature to decrease below T
SD
- Hysteresis before entering
fault management (see the Fault Management section).
Fault Management
A fault occurs when an overcurrent lasts longer then
t
FAULT
or when the device experiences an overtemper-
ature condition.
•A fault on a main output (12V or 3.3V) shuts down
both main outputs. The 3.3V auxiliary is not affected.
•A fault on the 3.3V auxiliary output shuts down all
three outputs.
The MAX5954A automatically restarts from a fault shutdown after the t
RESTART
period, while the MAX5954L
latches off. If an overcurrent fault occurred on a main
output, bring ON low for at least t
RESET
(100µs) and
high again to reset the fault and restart the outputs. If
the overcurrent fault occurred on an auxiliary output or
an overtemperature fault occurred, bring both ON and
AUXON low for a minimum of t
RESET
to reset the fault.
Bring ON and/or AUXON high again to restart the
respective outputs. As an extra protection, the
MAX5954L waits a minimum of t
RESTART
before it can
be restarted.
Debounced Logic Gate
(Input and Output)
INPUT accepts an input from a mechanical switch. The
corresponding output (OUTPUT) is debounced for
4.4ms. When INPUT goes from high to low, OUTPUT
goes low right away and stays low for at least 4.4ms.
After the debounce time OUTPUT follows INPUT. If INPUT
goes from low to high, OUTPUT goes high right away and
Single PCI Express, Hot-Plug
Controller
16 ______________________________________________________________________________________
V
ON_,TH
ON, AUXON
PWRGD
FAULT
12G, 3.3G
12VO, 3.3VO
3.3VAUXO
V
PGTH12
V
PGTH3.3
V
PGTH3.3AUX
3.3AUXIN
RISING
EDGE
PWRGD IS PULLED UP TO 3.3.
FAULT IS PULLED UP TO 3.3AUXIN.
t
POR_HL
Figure 2. Power-Up Timing, No Fault
FAULT
3.3VAUXIN
RISING
EDGE
PWRGD IS PULLED UP TO 3.3VAUXO.
FAULT IS PULLED UP TO 3.3VAUXIN.
A FAULT ON THE 3.3V OUTPUT OR 3.3VAUXO OUTPUT PRODUCES SIMILAR RESULTS.
V
ON_,TH
ON
2 x t
FAULT
PWRGD
12G
12V OUTPUT
CURRENT
3.3VAUXO
V
12ILIM,TH
R
SENSE
Figure 3. 12V Power-Up Timing (Turn-On into Output
Overcurrent/Short Circuit)
FAULT
PWRGD IS PULLED UP TO 3.3VAUXO.
FAULT IS PULLED UP TO 3.3VAUXIN.
A FAULT ON THE 3.3V OUTPUT OR 3.3VAUXO OUTPUT PRODUCES SIMILAR RESULTS.
t
FAULT
PWRGD
12G
12V OUTPUT
CURRENT
V
12ILIM,TH
R
SENSE
Figure 4. 12V Output Overcurrent/Short Circuit During Normal
Operation
Page 17
stays high for at least 4ms. After the debounce time,
OUTPUT follows INPUT. Figure 5 shows the timing diagram describing the INPUT/OUTPUT debounced feature.
Present-Detect and Forced-On Inputs
(
PPRREESS--DDEETT,, FFOONN
)
PRES-DET input detects the PRSNT#2 pin on a PCI
Express connector. When the card is plugged in,
PRES-DET goes low and allows the turn-on of the output after a 4ms debounced time. When the card is
removed, an internal 50kΩ pullup forces PRES-DET
high and the PCI Express slot is shut down with no
delay. PRES-DET works in conjunction with ON and
AUXON and only enables the device when ON and
AUXON are high.
A logic-low on FON forces the PCI Express slot (main
supplies and auxiliary) to turn on regardless of the status of the other logic inputs provided the UVLO thresholds are exceeded on all of the inputs.
Active Current Limits
Active current limits are provided for all three outputs.
Connect a current-sense resistor between 12S+ and
12S- to set the current limit for the 12V output. The current limit is set to 54mV/R
SENSE12
. Connect a
current-sense resistor between 3.3S+ and 3.3S- to
set the current limit for the 3.3V main output to
20mV/R
SENSE3.3.
For the auxiliary output (3.3V
AUXO
)
the current limit is fixed at 470mA.
When the voltage across R
SENSE12
or R
SENSE3.3
reaches the current-limit threshold voltage, the
MAX5954 regulates the gate voltage to maintain the
current-limit threshold voltage across the sense resistor. If the current limit lasts for t
FAULT
, then an overcur-
rent fault occurs. The MAX5954 shuts down both the
12V and 3.3V outputs and asserts the FAULT output.
When the auxiliary output reaches the current limit
(470mA) for longer than t
FAULT
, a fault occurs and the
device shuts down all outputs and asserts FAULT.
Undervoltage-Lockout Threshold
The UVLO thresholds prevent the internal auxiliary
MOSFET and the external main channel MOSFETs (Q1
and Q2 in the Typical Application Circuit) from turning
on if V
12VIN
, V
3.3VIN
, and V
3.3VAUXIN
are not present.
Internal comparators monitor the main supplies and the
auxiliary supply and keep the gate-drive outputs (12G
and 3.3G) low until the supplies rise above their UVLO
threshold. The 12V main supply is monitored at 12VIN
and has a UVLO threshold of 10V. The 3.3V main supply is monitored at 3.3S+ and has a UVLO threshold of
2.65V. The auxiliary supply is monitored at 3.3VAUXIN
and has a 2.65V UVLO threshold. For the main outputs to
operate, V
3.3VAUXIN
must be above its UVLO threshold.
External MOSFET Gate Driver
(12G and 3.3G)
The gate drive for the external MOSFETs is provided at
12G and 3.3G. 12G is the gate drive for the 12V main
supply and is boosted to 5.3V above V
12VIN
by an
internal charge pump. During turn-on, 12G sources
5µA into the external gate capacitance to control the
turn-on time of the external MOSFET. During turn-off,
12G sinks 150µA from the external gate capacitance to
quickly turn off the external MOSFET. During short-circuit events, an internal 120mA current activates to
rapidly bring the load current into the regulation limits.
3.3G is the gate drive for the 3.3V main supply’s
MOSFET and is driven to 5.5V above the 3.3V main supply. The power for 3.3G is supplied from 12VIN and has
no internal charge pump. During turn-on, 3.3G sources
5µA into the external gate capacitance to control the
turn-on time of the external MOSFET. During turn-off,
3.3G sinks 150µA to quickly turn off the external
MOSFET. During short-circuit events, an internal 150mA
current activates to rapidly turn off the external
MOSFET.
Auxiliary Supply (3.3VAUXIN)
3.3VAUXIN provides power to the auxiliary output as
well as the internal logic and references. The drain of the
internal auxiliary MOSFET connects to 3.3VAUXIN
through internal sense resistor and the source connects
to the auxiliary output 3.3VAUXO. The MOSFET’s typical
on-resistance is 0.3Ω. An internal charge pump boosts
the gate-drive voltage to fully turn on the internal n-channel MOSFET. The auxiliary supply has an internal current
limit set to 470mA.
MAX5954
Single PCI Express, Hot-Plug
Controller
______________________________________________________________________________________ 17
INPUT
DEBOUNCED
OUTPUT
t
DBC
t
DBC
t
DBC
Figure 5. INPUT and OUTPUT Debounced Feature
Page 18
MAX5954
Single PCI Express, Hot-Plug
Controller
18 ______________________________________________________________________________________
N
Y
POWER-ON MAIN
SUPPLIES FAULT
AND PWRGD ARE
HIGH IMPEDANCE
N
ENABLE CHARGE ON
12G AND 3.3G
PINS. START
COUNTING t
SU
HAS tSU
ELAPSED?
N
POWER-ON AUXILIARY
SUPPLIES FAULT
AND PWRGD ARE
HIGH IMPEDANCE
N
ENABLE CHARGE ON
INTERNAL AUXILIARY
MOSFET, BEGIN
COUNTING t
SU
HAS tSU ELAPSED?
N
Y
N
Y
Y
ARE PWRGD
THRESHOLDS
REACHED?
ASSERT
PWRGD
AFTER t
POR_HL
DELAY
12V AND 3.3V
OUTPUTS
ARE ENABLED
WAS CURRENT
LIMIT DETECTED ON ANY
12V OR
3.3V OUTPUT?
START COUNTING
t
FAULT
HAS t
FAULT
ELAPSED?
N
Y
RESET t
FAULT
COUNTER
Y
SHUT DOWN
12V AND 3.3V OUTPUTS.
ASSERT FAULT
STAY WAITING FOR
t
RESTART
LATCH-OFF
OPTION?
Y
STAY WAITING FOR
ON_ TRANSITION
HIGH->LOW->HIGH
AUX SUPPLY OUTPUT
IS ENABLED
WAS CURRENT LIMIT
DETECTED ON AUXILIARY
OUTPUT?
IS t
FAULT
ELAPSED?
N
N
Y
Y
SHUT DOWN
ALL OUTPUTS,
ASSERT FAULT,
STAY WAITING FOR
t
RESTART
ELAPSED.
LATCH-OFF
OPTION?
Y
RESET FAULT
AND
RESTART ALL SUPPLIES
STAY WAITING FOR BOTH
ON AND AUXON
TRANSITION
HIGH->LOW->HIGH
RESET FAULT
AND
RESTART 12V, 3.3V
SUPPLIES
IS FAULT STILL
PRESENT?
Y
N
IS FAULT STILL
PRESENT?
N
START COUNTING
t
FAULT
RESET t
FAULT
COUNTER
RESET
PWRGD
AFTER t
POR_LH
DELAY
3.3AUXIN IS ON
AND ABOVE UVLO
Figure 6. Fault Management Flow Chart
Page 19
Applications Information
Setting the Fault Timeout Period (t
FAULT
)
t
FAULT
is the time an overcurrent or overtemperature
fault must remain for the MAX5954 to disable the main
or auxiliary outputs. Program the fault timeout period
(t
FAULT
) by connecting a resistor (R
TIM
) from TIM to GND.
t
FAULT
can be calculated by the following equation:
t
FAULT
= 166ns / Ω x R
TIM
The t
FAULT
programmed time duration must be chosen
according to the total capacitance load connected to
12G and 3.3G. To properly power-up the main supply
outputs, the following constraints need to be taken:
where tSU= 2 x t
FAULT
and where:
1) I
CHG
= 5µA.
2) V
GATE
= 18.4V for 12G and V
GATE
= 9.4V for 3.3G.
3) C
LOAD
is the total capacitance load at the gate.
Maximum and minimum values for R
TIM
are 500kΩ and
500Ω, respectively. Leave TIM floating for a default
t
FAULT
of 11ms.
Setting the Power-On-Reset
Timeout Period (t
POR_HL
)
t
POR_HL
is the time from when the gate voltages of all
outputs reach their power-good threshold to when
PWRGD pulls low. Program the power-on-reset timeout
period (t
POR
) by connecting a resistor (R
PORADJ
) from
PORADJ to GND. t
POR_HL
can be calculated by the fol-
lowing equation:
t
POR_HL
= 2.5µs / Ω x R
PORADJ
Maximum and minimum values for R
PORADJ
are 500kΩ
and 500Ω, respectively. Leave PORADJ floating for a
default t
POR
of 160ms.
Component Selection
Select the external n-channel MOSFET according to the
applications current requirement. Limit the switch
power dissipation by choosing a MOSFET with an
R
DS_ON
low enough to have a minimum voltage drop at
full load. High R
DS_ON
causes larger output ripple if
there are pulsed loads. High R
DS_ON
can also trigger an
external undervoltage fault at full load. Determine the
MOSFET’s power rating requirement to accommodate a
short-circuit condition on the board during startup. Table
3 lists MOSFETs and sense-resistor manufacturers.
Additional External Gate Capacitance
External capacitance can be added from the gate of
the external MOSFETs to GND to slow down the dV/dt
of the 12V and 3.3V outputs.
Maximum Load Capacitance
Large capacitive loads at the 12V output, the 3.3V output, and the 3.3V auxiliary output can cause a problem
when inserting discharged PCI cards into live backplanes. A fault occurs if the time needed to charge the
capacitance of the board is greater than the typical
startup time (2 x t
FAULT
). The MAX5954 can withstand
large capacitive loads due to their adjustable startup
times and adjustable current-limit thresholds. Calculate
the maximum load capacitance as follows:
V
OUT
is either the 3.3V output, the 12V output, or the
3.3V auxiliary output.
C
tI
V
LOAD
SU LIM
OUT
<
×
t
VC
I
SU
GATE LOAD
CHG
≥
×
MAX5954
Single PCI Express, Hot-Plug
Controller
______________________________________________________________________________________ 19
Table 3. Component Manufacturers
COMPONENT MANUFACTURER PHONE WEBSITE
Vishay-Dale 402-564-3131 www.vishay.com
Sense Resistor
IRC 704-264-8861 www.irctt.com
Fairchild 888-522-5372 www.fairchildsemi.com
International Rectifier 310-322-3331 www.irf.com
Motorola 602-244-3576 www.mot-sps.com/ppd/
MOSFETs
Vishay-Siliconix — www.vishay.com
Page 20
MAX5954
Single PCI Express, Hot-Plug
Controller
20 ______________________________________________________________________________________
Chip Information
PROCESS: BiCMOS
Input Transients
The 12V input (12VIN), the 3.3V input (3.3S+), and the
3.3V auxiliary (3.3VAUXIN) must be above their UVLO
thresholds before startup can occur. Input transients
can cause the input voltage to sag below the UVLO
threshold. The MAX5454 rejects transients on the input
supplies that are shorter than 4µs (typ).
Page 21
MAX5954
Single PCI Express, Hot-Plug
Controller
______________________________________________________________________________________ 21
Q1
SI7448DP-T1
V
3.3AUXIN
V
12VIN
R
TIM = OPEN
V
3.3VIN
V
3.3AUXIN
R
PORADJ = OPEN
R1
8mΩ
0.1µF
0.1µF
10kΩ
1µF
10kΩ
GND
PGND
PWRGD
IN5819
PORADJ
TIM
R2
5mΩ
Q2
SI7448DP-T1
INTAO-2SMBUS
LEDs
MRL
PRSNT1#
+12V
PWRGD#
3.3VAUX 3.3VAUX0
+3.3V
PRSNT2#
PCI EXPRESS
SLOT
ADD-IN
CARD
GND
ATTENTION
SWITCH
OUTPUT
INPUT
ON
AUXON
FON
FAULT
PRES-DET
3.3S+
3.3S-
3.3G
12G
12S-
12S+
12VIN
2
2
3
MAX7311
16-BIT I/O EXPANDER
MAX5954
3.3AUXIN
Typical Application Circuit
Page 22
MAX5954
Single PCI Express, Hot-Plug
Controller
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
22 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2006 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
(NE-1) X
E
E/
2
e
D/2
e
D
e
L1
A
A1 A2
(ND-1) X
e
L
k
L
E2/2
C
L
E2
C
L
e e
PACKAGE OUTLINE
36, 40, 48L THIN QFN, 6x6x0.8m
k
D2/2
21-0141
LL
1
F
2
QFN THIN.EPS
C
D2
L
b
C
L
m
NOTES:
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF TERMINALS.
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1
SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE
ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE.
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm
FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.
9. DRAWING CONFORMS TO JEDEC MO220, EXCEPT FOR 0.4mm LEAD PITCH PACKAGE T4866-1.
10. WARPAGE SHALL NOT EXCEED 0.10
11. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY.
12. NUMBER OF LEADS SHOWN FOR REFERENCE
mm.
ONLY.
PACKAGE OUTLINE
36, 40, 48L THIN QFN, 6x6x0.8m
21-0141
m
2
F
2
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