The MAX3460–MAX3464 are high-speed differential
bus transceivers for RS-485 and RS-422 communications. They are designed to meet TIA/EIA-422-B,
TIA/EIA-485-A, V.11, and X.27 standards. The transceiver complies with the Profibus specification providing +2.1V output level with a 54Ω load, 20Mbps data
rate, and output skew less than 2ns. Each part contains
one three-state differential line driver and one differential input line receiver. The devices operate from a +5V
supply and feature true fail-safe circuitry, which guarantees a logic-high receiver output when the receiver
inputs are open or shorted. This enables all receiver
outputs on a terminated bus to output logic highs when
all transmitters are disabled.
All devices feature a 1/4 standard unit load receiver
input impedance that allows 128 transceivers on the
bus. Driver and receiver propagation delays are guaranteed under 20ns for multidrop, clock distribution
applications. Drivers are short-circuit current limited
and are protected against excessive power dissipation
by thermal shutdown circuitry. The driver and receiver
feature active-high and active-low enables, respectively, that can be connected together externally to serve
as a direction control.
Applications
High-Speed RS-485 Communications
High-Speed RS-422 Communications
Level Translators
Industrial-Control Local Area Networks
Profibus Applications
Features
♦ Recommended for Profibus Applications
♦ Guaranteed 20Mbps Data Rate
♦ 20ns Transmitter and Receiver Propagation Delay
♦ 2ns Transmitter and Receiver Skew
♦ High Differential Driver Output Level (2.1V on 54Ω)
♦ Hot-Swap Versions
♦ 1µA Shutdown Supply Current
♦ Low Supply Current Requirements (2.5mA typ)
♦ Allow Up to 128 Transceivers on the Bus
♦ True Fail-Safe Receiver while Maintaining EIA/TIA-
, unless otherwise noted. Typical values are at VCC= +5V and TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage (VCC) to GND ..................................-0.3V to +6V
Control Input Voltage (RE, DE, DI, SHDN, TXP, RXP)
to GND....................................................-0.3V to (V
CC
+ 0.3V)
Driver Output Voltage (Y, Z) to GND .........................-8V to +13V
Receiver Input Voltage (A, B) to GND.......................-8V to +13V
Differential Driver Output Voltage (Y - Z) ...............................±8V
Differential Receiver Input (A - B) ..........................................±8V
Receiver Output Voltage (RO) to GND.......-0.3V to (V
CC
+ 0.3V)
Output Driver Current (Y, Z) ...........................................±250mA
Continuous Power Dissipation (T
A
= +70°C)
8-Pin SO (derate 5.88mW/°C above +70°C)................471mW
Note 1: All currents into the device are positive; all currents out of the device are negative. All voltages are referenced to device
ground, unless otherwise noted.
Note 2: ∆V
OD
and ∆VOCare the changes in VODand VOC, respectively, when the DI input changes state.
Note 3: The short-circuit output current applies to peak current just prior to foldback-current limiting; the short-circuit foldback output
current applies during current limiting to allow a recovery from bus contention.
Note 4: Capacitive load includes test probe and fixture capacitance.
Note 5: Shutdown is enabled by bringing RE high and DE low or by bringing SHDN high. If the enable inputs are in this state for less
than 50ns, the device is guaranteed not to enter shutdown. If the enable inputs are in this state for at least 800ns, the device
is guaranteed to have entered shutdown.
—— 7BInverting Receiver Input and Inverting Driver Output
—— 6ANoninverting Receiver Input and Noninverting Driver Output
NAMEFUNCTION
Receiver Output. When RE is low and (A - B) ≥ -50mV, RO is high; if (A - B) ≤
-200mV, RO is low.
Receiver Output Enable. Drive RE low to enable RO; RO is high impedance
when RE is high. Drive RE high and DE low to enter low-power shutdown mode.
Driver Output Enable. Drive DE high to enable driver output. These outputs
are high impedance when DE is low. Drive RE high and DE low to enter lowpower shutdown mode.
Driver Input. With DE high, a low on DI forces the noninverting output low and
the inverting output high. Similarly, a high on DI forces the noninverting output
high and the inverting output low.
Transmitter Phase. Connect TXP to GND, or leave unconnected for normal
transmitter phase/polarity. Connect TXP to V
phase/polarity. TXP has an internal 15µA pulldown.
Receiver Phase. Connect RXP to GND, or leave unconnected for normal
receiver phase/polarity. Connect RXP to V
CC
phase/polarity. RXP has an internal 15µA pulldown.
Positive Supply: +4.75V ≤ VCC ≤ +5.25V. Bypass VCC to GND with a 0.1µF
The MAX3460–MAX3464 high-speed transceivers for
RS-485/RS-422 communication contain one driver and
one receiver. These devices feature true fail-safe circuitry, which guarantees a logic-high receiver output
when the receiver inputs are open or shorted, or when
they are connected to a terminated transmission line
with all drivers disabled (see the True Fail-Safe section). The MAX3460–MAX3464’s driver slew rates allow
transmit speeds up to 20Mbps.
The MAX3463 and MAX3464 are half-duplex transceivers, while the MAX3460, MAX3461, and MAX3462
are full-duplex transceivers. All of these parts operate
from a single +5V supply. Drivers are output short-circuit current limited. Thermal shutdown circuitry protects
drivers against excessive power dissipation. When activated, the thermal shutdown circuitry places the driver
outputs into a high-impedance state. The MAX3460
and MAX3463 devices have a hot-swap input structure
that prevents disturbances on the differential signal
lines when a circuit board is plugged into a “hot” backplane (see Hot Swap section). All devices have output
levels that are compatible with Profibus standards.
True Fail-Safe
The MAX3460–MAX3464 guarantee a logic-high receiver output when the receiver inputs are shorted or open,
or when they are connected to a terminated transmission line with all drivers disabled. This is done by setting the receiver threshold between -50mV and
-200mV. If the differential receiver input voltage (A - B)
is greater than or equal to -50mV, RO is logic high. If A
- B is less than or equal to -200mV, RO is logic low. In
the case of a terminated bus with all transmitters disabled, the receiver’s differential input voltage is pulled
to 0V by the termination. With the receiver thresholds of
the MAX3460–MAX3464, this results in a logic high with
a 50mV minimum noise margin. Unlike previous true
fail-safe devices, the -50mV to -200mV threshold complies with the ±200mV EIA/TIA-485 standard.
Hot-Swap Capability
Hot-Swap Inputs
When circuit boards are inserted into a “hot” or powered backplane, disturbances to the enable and differential receiver inputs can lead to data errors. Upon
initial circuit board insertion, the processor undergoes
its power-up sequence. During this period, the output
drivers are high impedance and are unable to drive the
DE input of the MAX3460/MAX3463 to a defined logic
level. Leakage currents up to 10µA from the highimpedance output could cause DE to drift to an incorrect logic state. Additionally, parasitic circuit board
capacitance could cause coupling of V
CC
or GND to
DE. These factors could improperly enable the driver.
When VCCrises, an internal pulldown circuit holds DE
low for around 15µs. After the initial power-up
sequence, the pulldown circuit becomes transparent,
resetting the hot-swap tolerable input.
Hot-Swap Input Circuitry
The MAX3460/MAX3463 enable inputs feature hot-swap
capability. At the input there are two NMOS devices, M1
and M2 (Figure 4). When VCCramps from 0, an internal
15µs timer turns on M2 and sets the SR latch, which
also turns on M1. Transistors M2, a 2mA current sink,
and M1, a 100µA current sink, pull DE to GND through a
5.6kΩ resistor. M2 is designed to pull DE to the disabled
state against an external parasitic capacitance up to
100pF that can drive DE high. After 15µs, the timer
deactivates M2 while M1 remains on, holding DE low
against three-state leakages that can drive DE high. M1
remains on until an external source overcomes the
required input current. At this time, the SR latch resets
and M1 turns off. When M1 turns off, DE reverts to a
standard, high-impedance CMOS input. Whenever V
CC
drops below 1V, the hot-swap input is reset.
For RE there is a complimentary circuit employing two
PMOS devices pulling RE to VCC.
Figure 4. Simplified Structure of the Driver Enable Pin (DE)
The standard RS-485 receiver input impedance is 12kΩ
(one-unit load), and the standard driver can drive up to
32 unit loads. The MAX3460–MAX3464 family of transceivers has a 1/4-unit-load receiver input impedance
(48kΩ), allowing up to 128 transceivers to be connected in parallel on one communication line. Any combination of these devices and/or other RS-485 transceivers
with a total of 32 unit loads or less can be connected to
the line.
Low-Power Shutdown Mode
(except MAX3462)
Low-power shutdown mode is initiated by bringing
SHDN high (MAX3460/MAX3461), or both RE high and
DE low. In shutdown, the devices typically draw only
1µA of supply current. RE and DE can be driven simultaneously; the parts are guaranteed not to enter shutdown if RE is high and DE is low for less than 50ns. If
the inputs are in this state for at least 800ns, the parts
are guaranteed to enter shutdown.
Driver Output Protection
Two mechanisms prevent excessive output current and
power dissipation caused by faults or by bus contention. The first, a foldback current limit on the output
stage, provides immediate protection against short circuits over the whole common-mode voltage range (see
Typical Operating Characteristics). The second, a thermal shutdown circuit, forces the driver outputs into a
high-impedance state if the die temperature exceeds
+140°C.
Propagation Delay
Many digital encoding schemes depend on the difference
between the driver and receiver propagation delay times.
Typical propagation delays are shown in the TypicalOperating Characteristics. The difference in receiver delay
times, |t
PLH
- t
PHL
|, is a maximum of 2ns. The driver skew
time |t
PLH
- t
PHL
| is also a maximum of 2ns.
Typical Applications
The MAX3460–MAX3464 transceivers are designed for
bidirectional data communications on multipoint bus
transmission lines. Figures 13 and 14 show typical network applications circuits. To minimize reflections, the
line should be terminated at both ends in its characteristic impedance, and stub lengths off the main line
should be kept as short as possible.
Profibus Termination
The MAX3460–MAX3464 are designed for driving
Profibus termination networks. With a worst-case loading of two termination networks with 220Ω termination
impedance and 390Ω pullups and pulldowns, the drivers can drive V
A-B
> 2.1V output.
Chip Information
TRANSISTOR COUNT: 610
PROCESS: BiCMOS
Figure 12. Receiver Propagation Delay Test Circuit
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
PDIPN.EPS
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