Datasheet MAC8SN Specification

MAC8SD, MAC8SM, MAC8SN

Preferred Device

Sensitive Gate Triacs

Silicon Bidirectional Thyristors

Designed for industrial and consumer applications for full wave
control of ac loads such as appliance controls, heater controls, motor
controls, and other power switching applications.

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Features

• Sensitive Gate Allows Triggering by Microcontrollers and other

Logic Circuits

• Uniform Gate Trigger Currents in Three Quadrants; Q1, Q2, and Q3

• High Immunity to dv/dt − 25 V/ms Minimum at 110°C

• High Commutating di/dt − 8.0 A/ms Minimum at 110°C

• Maximum Values of I

, VGT and IH Specified for Ease of Design

GT

• On-State Current Rating of 8 Amperes RMS at 70°C

• High Surge Current Capability − 70 Amperes

• Blocking Voltage to 800 Volts

• Rugged, Economical TO−220AB Package

• Pb−Free Packages are Available*

MAXIMUM RATINGS (T

Rating Symbol Value Unit

Peak Repetitive Off−State Voltage (Note 1)

(TJ = −40 to 110°C,
Sine Wave, 50 to 60 Hz, Gate Open)

On-State RMS Current
(Full Cycle Sine Wave, 60 Hz, TC = 70°C)

Peak Non-Repetitive Surge Current

(One Full Cycle Sine Wave, 60 Hz,

TJ = 110°C)
Circuit Fusing Consideration (t = 8.3 ms) I2t 20 A2sec
Peak Gate Power

(Pulse Width ≤ 1.0 ms, TC = 70°C)
Average Gate Power

(t = 8.3 ms, TC = 70°C)
Operating Junction Temperature Range T
Storage Temperature Range T

Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.

1. V

*For additional information on our Pb−Free strategy and soldering details, please

and V

DRM

voltages shall not be tested with a constant current source such that the
voltage ratings of the devices are exceeded.

download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.

for all types can be applied on a continuous basis. Blocking

RRM

= 25°C unless otherwise noted)

J

V

DRM,

V

RRM

MAC8SD

MAC8SM

MAC8SN

I

T(RMS)

I

TSM

P

GM

P

G(AV)

J

stg

V

400
600
800

8.0 A

70 A

16 W

0.35 W

−40 to +110 °C

−40 to +150 °C

TRIACS

8 AMPERES RMS

400 thru 800 VOLTS

MT2

1

2

3

TO−220AB

CASE 221A−09

STYLE 4

x = D, M, or N
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package

PIN ASSIGNMENT

1
2
3 Gate
4

Main Terminal 1
Main Terminal 2

Main Terminal 2

ORDERING INFORMATION

Device Package Shipping

MAC8SD TO−220AB 50 Units / Rail
MAC8SDG TO−220AB

MAC8SM TO−220AB 50 Units / Rail
MAC8SMG TO−220AB

MAC8SN TO−220AB 50 Units / Rail
MAC8SNG TO−220AB

Preferred devices are recommended choices for future use
and best overall value.

(Pb−Free)

(Pb−Free)

(Pb−Free)

MT1

G

MARKING
DIAGRAM

MAC8SxG

AYWW

50 Units / Rail

50 Units / Rail

50 Units / Rail

© Semiconductor Components Industries, LLC, 2005

December, 2005 − Rev. 5

1 Publication Order Number:

MAC8S/D

MAC8SD, MAC8SM, MAC8SN

THERMAL CHARACTERISTICS

Characteristic Symbol Value Unit

Thermal Resistance, Junction−to−Case

Junction−to−Ambient

Maximum Lead Temperature for Soldering Purposes 1/8″ from Cas e for 10 Seconds T

R

q

JC

R

q

JA

L

ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted; Electricals apply in both directions)

Characteristic Symbol Min Typ Max Unit

OFF CHARACTERISTICS

Peak Repetitive Blocking Current

(VD = Rated V

DRM

, V

; Gate Open) TJ = 25°C

RRM

TJ = 110°C

ON CHARACTERISTICS

Peak On-State Voltage (Note ) (ITM =  11A) V
Gate Trigger Current (Continuous dc) (VD = 12 V, RL = 100 W)

MT2(+), G(+)
MT2(+), G(−)

MT2(−), G(−)
Holding Current (VD = 12V, Gate Open, Initiating Current =  150mA) I
Latching Current (VD = 24V, IG = 5mA)

MT2(+), G(+)

MT2(−), G(−)

MT2(+), G(−)
Gate Trigger Voltage (Continuous dc) (VD = 12 V, RL = 100W)

MT2(+), G(+)

MT2(+), G(−)

MT2(−), G(−)

DYNAMIC CHARACTERISTICS

Rate of Change of Commutating Current

VD = 400 V, ITM = 3.5 A, Commutating dv/dt = 10 V m/sec,

Gate Open, TJ = 110°C, f = 500 Hz, Snubber: C

= 0.01 mF,

S

RS =15 W, See Figure 16.)
Critical Rate of Rise of Off-State Voltage

(VD = Rate V

, Exponential Waveform, RGK = 510 W, TJ = 110°C)

DRM

2. Indicates Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%.

I

,

DRM

I

RRM

I

TM

GT

−

−

− − 1.85 V

−

−

−

H

I

L

− 3.0 10 mA

−

−

−

V

GT

0.45

0.45

0.45

di/dt

8.0 10 − A/ms

(c)

dv/dt 25 75 −

2.2

62.5
260 °C

−

−

2.0

3.0

3.0

5.0
10

5.0

0.62

0.60

0.65

°C/W

mA

0.01

2.0

mA

5.0

5.0

5.0

mA
15
20
15

V

1.5

1.5

1.5

V/ms

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2

Symbol Parameter

V
I

DRM

V
I

RRM

V
I

H

DRM

RRM

TM

Peak Repetitive Forward Off State Voltage
Peak Forward Blocking Current
Peak Repetitive Reverse Off State Voltage
Peak Reverse Blocking Current

Maximum On State Voltage
Holding Current

MAC8SD, MAC8SM, MAC8SN

Voltage Current Characteristic of Triacs

(Bidirectional Device)

on state

I

at V

RRM

Quadrant Definitions for a Triac

MT2 POSITIVE

(Positive Half Cycle)

+

RRM

Quadrant 3
MainTerminal 2 −

V

TM

+ Current

I

H

V

I

H

off state

TM

I

Quadrant 1
MainTerminal 2 +

+ Voltage

at V

DRM

DRM

(+) I

GATE

(+) I

GATE

(+) MT2

GT

MT1

REF

(−) MT2

GT

MT1

REF

(+) MT2

Quadrant II Quadrant I

(−) I

GT

GATE

MT1

REF

I

− + I

GT

(−) MT2

Quadrant III Quadrant IV

(−) I

GT

GATE

MT1

REF

−

MT2 NEGATIVE

(Negative Half Cycle)

All polarities are referenced to MT1.
With in−phase signals (using standard AC lines) quadrants I and III are used.

GT

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3

MAC8SD, MAC8SM, MAC8SN

110

100

90

80

a = CONDUCTION ANGLE

70

60

, MAXIMUM ALLOWABLE CASE TEMPERATURE (° C)T

C

100

Typical @ TJ = 25°C

10

a = 30 and 60°

a

a

90°

I

, RMS ON−STATE CURRENT (AMPS)

T(RMS)

Figure 1. RMS Current Derating

Maximum @

TJ = 110°C

180°

DC

25

a

20

a

180°

DC

120°

a = CONDUCTION ANGLE

15

90°

60°

10

a = 30°

5

, AVERAGE POWER DISSIPATION (WATTS)

(AV)

0

P

121086420

I

, RMS ON−STATE CURRENT (AMPS)

T(RMS)

121086420

Figure 2. Maximum On−State Power Dissipation

1

Z

= R

q

JC(t)

 r(t)

0.1

q

JC(t)

1

Maximum @

TJ = 25°C

INSTANTANOUS ON-STATE CURRENT (AMPS),I

T

0.1

I

0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
VT, INSTANTANEOUS ON−STATE VOLTAGE (VOLTS)

Figure 3. On−State Characteristics

10

8

6

MT2 NEGATIVE

4

, HOLDING CURRENT (mA)

H

2

0

−40 −25 −10 5 20 35 50 65 80 95 110

MT2 POSITIVE

TJ, JUNCTION TEMPERATURE (°C)

Figure 5. Typical Holding Current Versus

Junction Temperature

0.01

TRANSIENT THERMAL RESISTANCE (NORMALIZED)

0.1 1 10 100 1000

,

(t)

R

t, TIME (ms)

Figure 4. Transient Thermal Response

25

20

15

Q3

, LATCHING CURRENT (mA)

L

I

10

5

Q1

0

−40 −25 −10 5

20 35 50 65 80 95 110

TJ, JUNCTION TEMPERATURE (°C)

Figure 6. Typical Latching Current Versus

Junction Temperature

1@10

4

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4

MAC8SD, MAC8SM, MAC8SN

14

12

10

, GATE TRIGGER CURRENT (mA)

GT

I

200

180

160

140

120

STATIC dv/dt (V/mS)

100

8

6

4

2

Q1

0

Q3

Q2

TJ, JUNCTION TEMPERATURE (°C)

Figure 7. Typical Gate Trigger Current Versus

Junction Temperature

VPK = 400 V

800 V

80

600 V

TJ = 110°C

1

0.9

0.8

0.7

0.6

0.5

, GATE TRIGGER VOLTAGE (VOLTS)

0.4

GT

V

1109580655035205−10−25−40

0.3

Q1

Q3

Q3

Q2

Q1

1109580655035205−10−25−40

TJ, JUNCTION TEMPERATURE (°C)

Figure 8. Typical Gate Trigger Voltage Versus

Junction Temperature

130

R

= 510 W

G − MT1

120

110

100

STATIC dv/dt (V/mS)

90

TJ = 100°C

110°C

120°C

60

RGK, GATE−MT1 RESISTANCE (OHMS)

Figure 9. Typical Exponential Static dv/dt Versus

Gate−MT1 Resistance, MT2(+)

130

120

110

100

90

STATIC dv/dt (V/mS)

80

70

100

R

G − MT1

= 510 W

TJ, Junction Temperature (°C)

VPK = 400 V

600 V

800 V

105 110

Figure 11. Typical Exponential Static dv/dt Versus

Junction Temperature, MT2(+)

80

1000900800700600500400300200100

400 450 500 550 650 700 750600 800

VPK, Peak Voltage (Volts)

Figure 10. Typical Exponential Static dv/dt Versus

Peak Voltage, MT2(+)

350

300

TJ = 100°C

250

200

STATIC dv/dt (V/mS)

150

R

= 510 W

G − MT1

100

400 450 500 550 600 650 700 750 800

VPK, Peak Voltage (Volts)

110°C

Figure 12. Typical Exponential Static dv/dt Versus

Peak Voltage, MT2(−)

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5

MAC8SD, MAC8SM, MAC8SN

350

300

250

200

150

STATIC dv/dt (V/mS)

R

G − MT1

= 510 W

VPK = 400 V

600 V

800 V

100

50

100 105 110

TJ, Junction Temperature (°C)

Figure 13. Typical Exponential Static dv/dt Versus

Junction Temperature, MT2(−)

m

100

VPK = 400 V

300

VPK = 400 V

250

600 V

200

800 V

STATIC dv/dt (V/mS)

150

TJ = 110°C

100

100 300 500 700 900 1000200 400 600 800

RGK, GATE−MT1 RESISTANCE (OHMS)

Figure 14. Typical Exponential Static dv/dt Versus

Gate−MT1 Resistance, MT2(−)

200 V

ADJUST FOR

ITM, 60 Hz V

CHARGE

RMS

90°C

10

100°C

1

f =

2 t

t

w

V

DRM

1

1 5 10 15 20 25 30

, CRITICAL RATE OF RISE OF COMMUTATING VOLTAGE (V/ s)

(di/dt)c, CRITICAL RATE OF CHANGE OF COMMUTATING CURRENT (A/ms)

c

(dv/dt)

AC

TRIGGER

CHARGE

CONTROL

NON-POLAR

w

6f I

TM

(di/dt)c =

1000

110 °C

Figure 15. Critical Rate of Rise of

Commutating Voltage

L

L

MEASURE

I

MT2

1N914

51 W

C

L

TRIGGER CONTROL

G

C

MT1

R

S

S

1N4007

ADJUST FOR
di/dt

(c)

−
200 V

+

Note: Component values are for verification of rated (di/dt)c. See AN1048 for additional information.

Figure 16. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt)

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6

c

MAC8SD, MAC8SM, MAC8SN

PACKAGE DIMENSIONS

TO−220AB

CASE 221A−09

ISSUE AA

SEATING

−T−

PLANE

B

4

Q

123

F

T

A

U

C

S

H

K

Z

L

V

R

J

G

D

N

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.

DIM MIN MAX MIN MAX

A 0.570 0.620 14.48 15.75
B 0.380 0.405 9.66 10.28
C 0.160 0.190 4.07 4.82
D 0.025 0.035 0.64 0.88

F 0.142 0.147 3.61 3.73
G 0.095 0.105 2.42 2.66
H 0.110 0.155 2.80 3.93

J 0.018 0.025 0.46 0.64
K 0.500 0.562 12.70 14.27

L 0.045 0.060 1.15 1.52
N 0.190 0.210 4.83 5.33
Q 0.100 0.120 2.54 3.04
R 0.080 0.110 2.04 2.79

S 0.045 0.055 1.15 1.39

T 0.235 0.255 5.97 6.47
U 0.000 0.050 0.00 1.27

V 0.045 −−− 1.15 −−−

Z −−− 0.080 −−− 2.04

STYLE 4:

PIN 1. MAIN TERMINAL 1

2. MAIN TERMINAL 2

3. GATE

4. MAIN TERMINAL 2

MILLIMETERSINCHES

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MAC8S/D

7