Datasheet M74HCT75TTR, M74HCT75RM13TR, M74HCT75M1R, M74HCT75B1R Datasheet (SGS Thomson Microelectronics)

Page 1
M74HCT75
4 BIT D TYPE LATCH
HIGH SPEED :
t
= 21ns (TYP.) at VCC = 4.5V
PD
LOW POWER DISSIPATION:
I
=2µA(MAX.) at TA=25°C
CC
COMPA TIBLE WITH TTL OUTPUTS :
V
= 2V (MIN.) VIL = 0.8V (MAX)
IH
BALANCED PROPAGATION DELAYS:
t
t
PLH
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
PIN AND FUNCTION COMPATIBLE WITH
PHL
| = IOL = 4mA (MIN)
74 SERIES 75
DESCRIPTION
The M74HCT75 is an high spe ed CMOS 4 BIT D TYPE LATCH fabricated with silicon gate C
2
MOS technology. It contains two groups of 2 bit latches controlled by an enable input (G1
2 or G34). These two latch
groups can be used in different circuits. Each latch has Q and Q
outputs (1Q - 4Q and 1Q - 4Q). The data applied to the data input is transferred to the Q and Q
outputs when the enable input is taken high and the outputs will follow the data input as long as the enable input is kept high. When the
TSSOPDIP SOP
ORDER CODES
PACKAGE TUBE T & R
DIP M74HCT75B1R
SOP M74HCT75M1R M74HCT75RM13TR
TSSOP M74HCT75TTR
enable input is taken low, the information data applied to the data input is retained at the outputs. The M74HCT75 is designed to directly interface
2
HSC
MOS systems with TTL and NMOS components. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/9September 2001
Page 2
M74HCT75
IINPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION
1, 4, 11, 8 1Q
2, 3, 6, 7 1D to 4D Data Inputs
4G3 • 4
13 G1 • 2
16, 15, 10, 9 1Q to 4Q Latch Outputs
12 GND Ground (0V)
5
TRUTH TABLE
to 4Q
V
CC
Complementary Latch Outputs
Latch Enable Input, latches 3 and 4
Latch Enable Input, latches 1 and 2
Positive Supply Voltage
LOGIC DIAGRAM
INPUTS OUTPUTS
DGQQ
LHLH HHHL X L Qn Q
nLATCH
FUNCTION
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Page 3
M74HCT75
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
V
I
I
OK
I
I
or I
CC
P
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
V
V T t
r
Supply Voltage
CC
DC Input Voltage -0.5 to VCC + 0.5
I
DC Output Voltage -0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current DC Output Current
O
DC VCC or Ground Current
GND
Power Dissipation
D
Storage Temperature
stg
Lead Temperature (10 sec)
L
°C; derate to 300mW by 10mW/°C from 65°C to 85°C
Supply Voltage
CC
Input Voltage 0 to V
I
Output Voltage 0 to V
O
Operating Temperature
op
, t
Input Rise and Fall Time (VCC = 4.5 to 5.5V)
f
-0.5 to +7 V
± 20 mA ± 20 mA ± 25 mA ± 50 mA
500(*) mW
-65 to +150 °C
300 °C
4.5 to 5.5 V
CC CC
-55 to 125 °C 0 to 500 ns
V V
V V
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Page 4
M74HCT75
DC SPECIFICATIONS
Symbol Parameter
V
V
V
V
I
I
High Level Input
IH
Voltage
Low Level Input
IL
Voltage
High Level Output
OH
Voltage Low Level Output
OL
Voltage
I
Input Leakage
I
Current Quiescent Supply
CC
Current Additional Worst
CC
Case Supply Current
Test Condition Value
T
= 25°C
V
CC
(V)
A
Min. Typ. Max. Min. Max. Min. Max.
4.5 to
2.0 2.0 2.0 V
5.5
4.5 to
0.8 0.8 0.8 V
5.5
4.5
4.5
5.5
5.5
IO=-20 µA
I
=-4.0 mA
O
IO=20 µA
I
=4.0 mA
O
= VCC or GND
V
I
= VCC or GND
V
I
5.5 Per Input pin
V
= 0.5V or
I
V
= 2.4V
I
4.4 4.5 4.4 4.4
4.18 4.31 4.13 4.10
0.0 0.1 0.1 0.1
0.17 0.26 0.33 0.40 ± 0.1 ± 1 ± 1 µA
2.0 2.9 3.0 mA
Other Inputs at
V
or GND
CC
I
= 0
O
-40 to 85°C -55 to 125°C
Unit
V
V
22040µA
AC ELECTRICAL CHARACTERISTICS (C
Test Condition Value
Symbol Parameter
t
TLH tTHL
t
PLH tPHL
t
PLH tPHL
t
W(H)
Output Transition Time
Propagation Delay Time (DATA - Q)
Propagation Delay Time (G - Q)
Minimum Pulse Width (G)
Minimum Set-Up
t
s
Time Minimum Hold
t
h
Time
V
CC
(V)
4.5 8151922ns
4.5 18 28 35 42 ns
4.5 21 33 41 50 ns
4.5 8151922ns
4.5 4101315ns
4.5 5 5 8 ns
= 50 pF, Input tr = tf = 6ns)
L
= 25°C
T
A
Min. Typ. Max. Min. Max. Min. Max.
-40 to 85°C -55 to 125°C
Unit
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Page 5
M74HCT75
CAPACITIVE CHARACTERISTICS
Test Condition Value
T
Symbol Parameter
C
C
Input Capacitance
IN
Power Dissipation
PD
Capacitance (note
V
CC
(V)
= 25°C
A
Min. Typ. Max. Min. Max. Min. Max.
5101010pF
61 pF
1)
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (R ef er to Test Circ ui t ). Average operating cu rrent can be ob ta i ned by the following equat io n. I
TEST CIRCUIT
-40 to 85°C -55 to 125°C
= CPD x VCC x fIN + ICC
CC(opr)
Unit
CL = 50pF or equivalent (incl udes jig and p robe capacitance) R
= Z
of pulse generator (typically 50)
T
OUT
WAVEFORM : PROPAGATION DELAY TIMES, MINIMUM PULSE WIDTH, SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle)
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Page 6
M74HCT75
Plastic DIP-16 (0.25) MECHANICAL DATA
mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
a1 0.51 0.020
B 0.77 1.65 0.030 0.065 b 0.5 0.020
b1 0.25 0.010
D 20 0.787 E 8.5 0.335
e 2.54 0.100
e3 17.78 0.700
F 7.1 0.280
I 5.1 0.201
L 3.3 0.130
Z 1.27 0.050
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P001C
Page 7
SO-16 MECHANICAL DATA
M74HCT75
DIM.
A 1.75 0.068 a1 0.1 0.2 0.003 0.007 a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019 c1 45° (typ.)
D 9.8 10 0.385 0.393
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 8.89 0.350
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M 0.62 0.024
S8° (max.)
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
PO13H
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Page 8
M74HCT75
TSSOP16 MECHANICAL DATA
mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 1.2 0.047
A1 0.05 0.15 0.002 0.004 0.006
A2 0.8 1 1.05 0.031 0.039 0.041
b 0.19 0.30 0.007 0.012
c 0.09 0.20 0.004 0.0089
D 4.9 5 5.1 0.193 0.197 0.201
E 6.2 6.4 6.6 0.244 0.252 0.260
E1 4.3 4.4 4.48 0.169 0.173 0.176
e 0.65 BSC 0.0256 BSC
K0° 8°0° 8°
L 0.45 0.60 0.75 0.018 0.024 0.030
A2
A
A1
b
e
c
K
L
E
D
E1
PIN 1 IDENTIFICATION
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1
0080338D
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M74HCT75
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