The M74HCT573 is an high speed CMOS OCTAL
LATCH WITH 3-STATE OUTPUTS fabricated
with silicon gate C
2
MOS technology.
This 8-BIT D-Type la tches is controlled by a latc h
enable input (LE) and output enable input (OE
).
While the LE in put is held at a high level, the Q
outputs will follow the data input precisely. Wh en
the LE is taken low, the Q outputs will be latched
precisely at the logic level of D input data.
While the OE
input is at low level, the eight outputs
will be in a norm al logic state (high or low logic
level) and while OE
is at high level the outputs will
be in a high impedance state.
TSSOPDIPSOP
ORDER CODES
PACKAGETUBET & R
DIPM74HCT573B1R
SOPM74HCT573M1R M74HCT573RM13TR
TSSOPM74HCT573TTR
The 3-State output configuration and the wide
choice of outline make bus organized system
simple.
The M74HCT573 is designed to directly interface
2
HSC
MOS systems with TTL and NMOS
components.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/11July 2001
Page 2
M74HCT573
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN NoSYMBOLNAME AND FUNCTION
1OE
2, 3, 4, 5, 6,
7, 8, 9
12, 13, 14,
15, 16, 17,
18, 19
11LELatch Enable Input
10GNDGround (0V)
20V
TRUTH TABLE
INPUTSOUTPUTS
D0 to D7Data Inputs
Q0 to Q73 State Latch Outputs
CC
3 State Output Enable
Input (Active LOW)
Positive Supply Voltage
OE
HXXZ
LLXNO CHANGE (*)
LHLL
LHHH
X: Don’t Care
Z: High Impedance
(*): Q Outputs are lat ched at the time when the LE i nput is taken lo w l ogic level.
LEDQ
LOGIC DIAGRAM
2/11
Page 3
M74HCT573
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
V
V
I
I
OK
I
I
or I
CC
P
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65
RECOMMENDED OPERATING CONDITIONS
SymbolParameterValueUnit
V
V
V
T
t
r
Supply Voltage
CC
DC Input Voltage-0.5 to VCC + 0.5
I
DC Output Voltage-0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCC or Ground Current
GND
Power Dissipation
D
Storage Temperature
stg
Lead Temperature (10 sec)
L
°C; derate to 300mW by 10mW/°C from 65° C to 85°C
Supply Voltage
CC
Input Voltage0 to V
I
Output Voltage0 to V
O
Operating Temperature
op
, t
Input Rise and Fall Time (VCC = 4.5 to 5.5V)
f
-0.5 to +7V
± 20mA
± 20mA
± 35mA
± 70mA
500(*)mW
-65 to +150°C
300°C
4.5 to 5.5V
CC
CC
-55 to 125°C
0 to 500ns
V
V
V
V
3/11
Page 4
M74HCT573
DC SPECIFICATIONS
SymbolParameter
V
V
V
V
I
I
∆ I
High Level Input
IH
Voltage
Low Level Input
IL
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
I
Input Leakage
I
Current
High Impedance
OZ
Output Leakage
Current
Quiescent Supply
CC
Current
Additional Worst
CC
Case Supply
Current
Test ConditionValue
T
= 25°C
V
CC
(V)
A
Min.Typ. Max.Min.Max. Min. Max.
4.5
to
2.02.02.0V
5.5
4.5
to
0.80.80.8V
5.5
4.5
4.5
5.5
5.5
5.5
IO=-20 µA
I
=-6.0 mA
O
IO=20 µA
I
=6.0 mA
O
= VCC or GND
V
I
= VIH or V
V
I
VO = VCC or GND
= VCC or GND
V
I
5.5Per Input pin
= 0.5V or
V
I
V
= 2.4V
I
4.44.54.44.4
4.184.314.134.10
0.00.10.10.1
0.170.260.330.40
± 0.1± 1± 1µA
IL
± 0.5± 5± 10µA
2.02.93.0mA
Other Inputs at
V
or GND
CC
-40 to 85°C -55 to 125°C
Unit
V
V
44080µA
AC ELECTRICAL CHARACTERISTICS (C
Test ConditionValue
SymbolParameter
t
TLH tTHL
t
PLH tPHL
t
PLH tPHL
t
PZL tPZH
t
PLZ tPHZ
t
W(L)
t
W(H)
Output Transition
Time
Propagation Delay
Time (LE - Q,Q
Propagation Delay
Time (D - Q,Q
Output Enable
Time
Output Disable
Time
Minimum Pulse
Width (LE)
Minimum Set-Up
t
s
Time
Minimum Hold
t
h
Time
)
V
C
(pF)
L
CC
(V)
4.5507121518ns
4.55021334150
)
4.515025394959
4.55019303845
4.515023364554
4.550
4.515023364554
4.550
4.5507151922ns
4.5504101315ns
4.550555ns
= 50 pF, Input tr = tf = 6ns)
L
= 25°C
T
A
Min.Typ. Max.Min.Max. Min. Max.
= 1 KΩ
R
L
= 1 KΩ
R
L
19303845
18253138ns
-40 to 85°C -55 to 125°C
Unit
ns
ns
ns
4/11
Page 5
M74HCT573
CAPACITIVE CHARACTERISTICS
Test ConditionValue
T
SymbolParameter
C
C
C
Input Capacitance
IN
Output
OUT
Capacitance
Power Dissipation
PD
Capacitance (note
V
CC
(V)
= 25°C
A
Min.Typ. Max.Min.Max. Min. Max.
5101010pF
10pF
51pF
1)
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
Flop)
TEST CIRCUIT
-40 to 85°C -55 to 125°C
= CPD x VCC x fIN + ICC/8 (per Flip
CC(opr)
Unit
TESTSWITCH
t
, t
PLH
PHL
, t
t
PZL
PLZ
t
, t
PZH
PHZ
CL = 50pF/150p F or equivalent (includes jig and probe capacitance)
R
= 1KΩ or equivalent
1
= Z
R
of pulse generator (typically 50Ω)
T
OUT
Open
V
CC
GND
5/11
Page 6
M74HCT573
WAVEFORM 1: LE TO Qn PROPAGATION DELAYS, LE MINIMUM PULSE WIDTH, Dn TO LE SETUP
AND HOLD TIMES (f=1MHz; 50% duty cycle)
6/11
Page 7
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIMES (f=1MHz; 50% duty cycl e )
M74HCT573
WAVEFORM 3: PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
7/11
Page 8
M74HCT573
Plastic DIP-20 (0.25) MECHANICAL DATA
mm.inch
DIM.
MIN.TYPM AX.MIN.TYP.MAX.
a10.2540.010
B1.391.650.0550.065
b0.450.018
b10.250.010
D25.41.000
E8.50.335
e2.540.100
e322.860.900
F7.10.280
I3.930.155
L3.30.130
Z1.340.053
8/11
P001J
Page 9
SO-20 MECHANICAL DATA
M74HCT573
DIM.
MIN.TYPM AX.MIN.TYP.MAX.
A2.650.104
a10.10.20.0040.008
a22.450.096
b0.350.490.0140.019
b10.230.320.0090.012
C0.50.020
c145° (typ.)
D12.6013.000.4960.512
E10.0010.650.3930.419
e1.270.050
e311.430.450
F7.407.600.2910.300
L0.501.270.0200.050
M0.750.029
S8° (max.)
mm.inch
PO13L
9/11
Page 10
M74HCT573
TSSOP20 MECHANICAL DATA
mm.inch
DIM.
MIN.TYPM AX.MIN.TYP.MAX.
A1.20.047
A10.050.150.0020.0040.006
A20.811.050.0310.0390.041
b0.190.300.0070.012
c0.090.200.0040.0089
D6.46.56.60.2520.2560.260
E6.26.46.60.2440.2520.260
E14.34.44.480.1690.1730.176
e0.65 BSC0.0256 BSC
K0°8°0°8°
L0.450.600.750.0180.0240.030
A2
A
A1
b
e
K
c
L
E
D
E1
PIN 1 IDENTIFICATION
10/11
1
0087225C
Page 11
M74HCT573
Information furnished is bel ieved to be accurate and reliable. However, STMicroe lectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No li cense is granted by i mp lica tion or otherwise under a n y patent or patent rig hts of STMicroelectronics. Spec ific at ions
mentioned in this publication ar e subject to change without notice. This publication supersedes and replaces all information
previously supplied. S TMicroelectronics products are not authorized for use as critica l components in life suppo rt devices or
systems without express written approval of STMicroelectronics.
Australi a - Brazil - C hi na - Finlan d - F rance - Germ any - Hong Kon g - I ndi a - Italy - Japan - Malaysia - Malta - Morocco