The M74HC75 is an hi gh speed CMOS 4 BIT D
TYPE LATCH fabricated with silicon gate C
2
MOS
technology.
It contains two groups of 2 bit latches controlled by
an enable input (G1
•2 or G3•4). These two latch
groups can be used in different circuits. Each latch
has Q and Q
outputs (1Q - 4Q and 1Q - 4Q). The
data applied to the data input is transferred to the
TSSOPDIPSOP
ORDER CODES
PACKAGETUBET & R
DIPM74HC75B1R
SOPM74HC75M1RM74HC75RM13TR
TSSOPM74HC75TTR
Q and Q
outputs when the enable input is taken
high and the outputs will follow the data input as
long as the enable input is kept high. When the
enable input is taken low, the information data
applied to the data input is retained at the outputs.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/10August 2001
M74HC75
IINPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN NoSYMBOLNAME AND FUNCTION
1, 14, 11, 8 1Q
2, 3, 6, 71D to 4DData Inputs
4G3 • 4
13G1 • 2
16, 15, 10, 91Q to 4QLatch Outputs
12GNDGround (0V)
5
TRUTH TABLE
to 4Q
V
CC
Complementary Latch
Outputs
Latch Enable Input,
latches 3 and 4
Latch Enable Input,
latches 1 and 2
Positive Supply Voltage
LOGIC DIAGRAM
INPUTSOUTPUTS
DGQQ
LHLH
HHHL
XLQnQ
nLATCH
FUNCTION
2/10
M74HC75
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
V
V
I
I
OK
I
I
or I
CC
P
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (R ef er to Test Circ ui t). Averag e operatin g current can be obtained by t he following equation. I
Input Capacitance
IN
Power Dissipation
PD
Capacitance (note 1)5.030pF
5.05101010pF
= 25°C
A
-40 to 85°C -55 to 125°C
Min.Typ. Max.Min.Max. Min. Max.
= CPD x VCC x fIN + ICC
CC(opr)
Unit
5/10
M74HC75
TEST CIRCUIT
CL = 50pF or equivalent (in cludes jig and probe capaci tance)
R
= Z
of pulse generator (typically 50Ω)
T
OUT
SWITCHING CHARACTERISTICS TEST WAWEFORM (f=1MHz; 50% duty cycle)
6/10
M74HC75
Plastic DIP-16 (0.25) MECHANICAL DATA
mm.inch
DIM.
MIN.TYPMAX.MIN.TYP.MAX.
a10.510.020
B0.771.650.0300.065
b0.50.020
b10.250.010
D200.787
E8.50.335
e2.540.100
e317.780.700
F7.10.280
I5.10.201
L3.30.130
Z1.270.050
P001C
7/10
M74HC75
SO-16 MECHANICAL DATA
DIM.
A1.750.068
a10.10.20.0030.007
a21.650.064
b0.350.460.0130.018
b10.190.250.0070.010
C0.50.019
c145° (typ.)
D9.8100.3850.393
E5.86.20.2280.244
e1.270.050
e38.890.350
F3.84.00.1490.157
G4.65.30.1810.208
L0.51.270.0190.050
M0.620.024
S8° (max.)
MIN.TYPMAX.MIN.TYP.M AX.
mm.inch
8/10
PO13H
M74HC75
TSSOP16 MECHANICAL DATA
mm.inch
DIM.
MIN.TYPMAX.MIN.TYP.M AX.
A1.20.047
A10.050.150.0020.0040.006
A20.811.050.0310.0390.041
b0.190.300.0070.012
c0.090.200.0040.0089
D4.955.10.1930.1970.201
E6.26.46.60.2440.2520.260
E14.34.44.480.1690.1730.176
e0.65 BSC0.0256 BSC
K0°8°0°8°
L0.450.600.750.0180.0240.030
A2
A
A1
b
e
c
K
L
E
D
E1
PIN 1 IDENTIFICATION
1
0080338D
9/10
M74HC75
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mentioned in this publication ar e subject to change without notice. This publication supersedes and replaces all information
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systems without express written approval of STMicroelectronics.
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