HC6 46 OCTA L BUSTRAN S CE I VER / REG I STE R (3-STAT E)
HC648 OCTAL BUS TRANSCEIVER/REGISTER (3-STATE, INV.)
.HIGH SPEED
f
= 73 MHz(TYP.) AT VCC=5V
MAX
.LOWPOWERDISSIPATION
ICC=4µA(MAX.) AT TA=25°C
.HIGH NOISEIMMUNITY
V
NIH=VNIL
.OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS
=28%VCC(MIN.)
B1R
(PlasticPackage)
M1R
(MicroPackage)
.SYMMETRICALOUTPUT IMPEDANCE
IOH=IOL=6 mA(MIN.)
.BALANCEDPROPAGATION DELAYS
t
PLH=tPHL
.WIDE OPERATINGVOLTAGE RANGE
VCC(OPR)= 2 V TO6 V
M74HC X XXM1RM74H CXXXB1 R
ORDER CODES :
.PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS646/648
DESCRIPTION
The M74HC646/648 are highspeedCMOSOCTAL
BUS TRANSCEIVERS AND REGISTERS, (3STATE) fabricated in silicon gate C2MOS technology. They have the same high speedperformance
ofLSTTLcombined withtrueCMOS low powerconsumption.
These devices consist of bus transceiver circuits
with3-state output, D-typeflip-flops,and controlcircuitryarranged for multiplexed transmission ofdata
directly from the inputbus or from the internal registers.Dataon theAor Bbuswill beclocked intothe
registers on the low-to-high transition of the appropriate clockpin(ClockAB- orClockBA).Enable(G)
and direction (DIR) pins are provided to control the
transceiverfunctions. In thetransceiver mode, data
present at the high-impedance port may be stored
in either register or in both.
The select controls (Select AB select BA) canmultiplex stored and real-time (transparent mode) data.
The direction control determines which bus will receivedata whenenable G is active(low).
In theisolation mode (enable G high),”A” data may
be stored in one register and/or ”B” data may be
storedinthe otherregister.Whenanoutputfunction
is disabled, the input function is still enabled and
may be used to store and transmit data. Only one
of the two buses, A or B, may be driven at a time.
All inputs are equipped with protection circuits
PIN CONNECTIONS (top view)
INPUT AND OUTPUT EQUIVALENT CIRCUIT
GAB,GAB,CAB,A, B
SAB,SBA, CBA
October 1993
1/12
Page 2
M74HC646/648
LOGIC DIAGRAM (HC648)
Note: In case ofM54/74HC646 output invertermarked *at A bus and B bus are eliminated.
TIMING CHART
2/12
Page 3
M74HC646/648
TRUTH TABLE
HC646 ( The truth table for HC648 is the same as this, but with the outputs inverted)
GDIR CAB CBA SAB SBAABFUNCTION
INPUTSINPUTSBoth the A bus and the B bus are inputs
HX
LH
LL
X: DON’TCARE
Z:HIGH IMPEDANCE
Qn:THE DATA STOREDTO THEINTERNALFLIP-FLOPSBY MOST RECENTLOW TO HIGHTRANSITION OF THECLOCK INPUTS
*: THEDATA AT THE A ANDB BUSWILLBE STORED TO THE INTERNALFLIP-FLOPS ON EVERY LOWTO HIGH TRANSITIONOF
THECLOCK INPUTS
XXXXZZThe output functions of the A and B bus are disabled
XXINPUTSINPUTSBoth the A and B bus are used for inputs to the
internal flip-flops. Data at the bus will be stored on
low to high transition of the clock inputs
INPUTSOUTPUTS The A bus are inputs and the B bus are outputs
XX*LXLLThe data at the A bus are displayed at the B bus
HH
X*LXLLThe data at the A bus are displayed at the B bus.
HH
The data of the A bus are stored to the internal
flip-flop on low to high transition of th clock pulse.
XX*HXXQnThe data stored to the internal flip-flop are dispayed
at the B bus
X*HXLLThe data at the A bus are stored to the internal flip-
HH
flop on low to high transition of the clock pulse. The
states of the internal flip-flops output directly to the
B bus
OUTPUTSINPUTSThe B bus are inputs and the A bus are outputs
X*XXL
LLThe data at the B bus are displayed at the A bus
HH
X*XLLLThe data at the B bus are displayed at the A bus.
HH
The data of the B bus are stored to the internal flipflop on low to high transition of the clock pulse
X*XXHQnXThe data stored to the internal flip-flops are
displayed at the A bus
x*XHLLthe data at the B bus are stored to the internal flip-
HH
flop on low to high transition of the clock pulse. The
states of the internal flip-flops output directly to the
A bus
3/12
Page 4
M74HC646/648
PIN DESCRIPTION
PIN NoSYMBOLNAME AND FUNCTION
1CLOCK ABA to B Clock Input (LOW to HIGH, Edge-Trigged)
2SELECT ABSelect A to B Source Input
3GABDirection Control Input
4, 5, 6, 7, 8, 9, 10, 11A1 to A8A data Inputs/Outputs
20, 19, 18, 17, 16, 15, 14, 13B1 to B8B Data Inputs/Outputs
21GOutput Enable Input (Active LOW)
22SELECT BASelect B to A Source Input
23CLOCK BAB to A Clock Input (LOW to HIGH, Edge-Triggered)
12GNDGround (0V)
24V
Supply Voltage-0.5 to +7V
DC Input Voltage-0.5 to VCC+ 0.5V
I
DC Output Voltage-0.5 to VCC+ 0.5V
DC Input Diode Current± 20mA
DC Output Diode Current± 20mA
DC Output Source Sink Current Per Output Pin± 35mA
DC VCCor Ground Current± 70mA
GND
Power Dissipation500 (*)mW
Storage Temperature-65 to +150
Lead Temperature (10 sec)300
L
Supply Voltage2 to 6V
Input Voltage0 to V
Output Voltage0 to V
CC
CC
Operating Temperature-40 to +85
Input Rise and Fall TimeVCC= 2 V0 to 1000ns
V
= 4.5 V0 to 500
CC
= 6 V0 to 400
V
CC
o
C
o
C
V
V
o
C
5/12
Page 6
M74HC646/648
DC SPECIFICATIONS
SymbolParameter
V
V
V
V
I
I
High Level Input Voltage2.01.51.5
IH
Low Level Input
IL
Voltage
High Level Output Voltage2.0
OH
Low Level Output Voltage2.0
OL
Input Leakage Current6.0VI=VCCor GND±0.1±1µA
I
I
3 State Output Off State Current6.0VI=VIHor V
OZ
Quiescent Supply Current6.0 VI=VCCor GND440µA
CC
Test ConditionsValue
V
(V)
CC
TA=25oC-40 to 85oC
Min.Typ.Max.Min.Max.
4.53.153.15
6.04.24.2
2.00.50.5
4.51.351.35
6.01.81.8
=
V
I
V
IH
or
V
IL
V
I
V
IH
or
V
IL
IO=-20 µA
=-6.0 mA 4.184.314.13
O
=-7.8 mA 5.685.85.63
O
=
IO=20µA
= 6.0 mA0.170.260.37
O
= 7.8 mA0.180.260.37
O
4.54.44.54.4
6.05.96.05.9
4.5I
6.0I
4.50.00.10.1
6.00.00.10.1
4.5I
6.0I
1.92.01.9
0.00.10.1
IL
±0.5±5.0µA
VO=VCCor GND
Unit
V
V
V
V
AC ELECTRICAL CHARACTERISTICS (CL=50pF,Inputtr=tf=6ns)
Test ConditionsValue
SymbolParameter
t
t
t
t
t
t
TLH
THL
PLH
PHL
PLH
PHL
Output Transition Time2.0
Propagation Delay Time
(BUS - BUS)
Propagation Delay Time
(CLOCK - BUS)
V
(V)
CC
C
(pF)
L
TA=25oC-40 to 85oC
Min.Typ.Max.Min.Max.
256075
50
4.571215
6.061013
2.0
50
4.5213038
74150190
6.0182632
2.0
150
4.5263848
91190240
6.0223241
2.0
50
4.5284253
98210265
6.0243645
2.0
150
4.5335063
116250315
6.0284354
Unit
ns
ns
ns
ns
ns
6/12
Page 7
M74HC646/648
AC ELECTRICAL CHARACTERISTICS (CL=50pF,Inputtr=tf=6ns)
Test ConditionsValue
SymbolParameter
t
t
PLH
PHL
Propagation Delay Time
(SELECT - BUS)
C
V
CC
(V)
L
(pF)
2.0
50
4.5233443
TA=25oC-40 to 85oC
Min.Typ.Max.Min.Max.
81170215
6.0202937
2.0
150
4.5284253
98210265
6.0243645
t
t
PZL
PZH
3-State Output Enable Time
(G, DIR)
2.0
50RL=1KΩ
4.5243544
84175220
6.0203037
2.0
150 R
4.5294354
=1KΩ
L
102215270
6.0253746
t
t
PLZ
PHZ
Output Disable Time
(G, DIR)
2.0
50R
4.5233544
=1KΩ
L
60175220
6.0203037
f
MAX
Maximum Clock Frequency2.0
4.5306724
50
6194.8
6.0357928
t
W(H)
t
W(L)
Minimum Clock Pulse Width2.0
4.571519
50
307595
6.061316
Minimum Set-up Time2.0
t
s
50
4.541013
165065
6.03911
Minimum Hold Time2.0
t
h
50
4.555
55
6.055
C
C
C
PD
(*) CPDisdefined as the value ofthe IC’sinternal equivalent capacitance which is calculated fromthe operatingcurrent consumption without load.
(Referto Test Circuit). Average operting current canbe obtained bythe followingequation. ICC(opr) = CPD•VCC•fIN+ICC/8(per bit)
Input Capacitance51010pF
IN
Bus Terminal Capacitance10pF
I/O
(*)Power Dissipation Capacitancefor HC646
for HC648
39
38
Unit
ns
ns
ns
ns
ns
MHz
ns
ns
ns
pF
7/12
Page 8
M74HC646/648
SWITCHING CHARACTERISTICS TEST CIRCUIT AND WAVEFORM
WAVEFORM 1WAVEFORM 2
WAVEFORM3
WAVEFORM 4
WAVEFORM5
8/12
Page 9
TEST WAVEFORM ICC(Opr.)
* INPUTTRANSITION TIMEIS THE SAME AS THATIN CASEOF SWITCHINGCHARACTERISTICSTEST.
M74HC646/648
9/12
Page 10
M74HC646/648
Plastic DIP24 (0.25) MECHANICAL DATA
DIM.
MIN.TYP.MAX.MIN.TYP.MAX.
a10.630.025
b0.450.018
b10.230.310.0090.012
b21.270.050
D32.21.268
E15.216.680.5980.657
e2.540.100
e327.941.100
F14.10.555
I4.4450.175
L3.30.130
mminch
10/12
P043A
Page 11
SO24 MECHANICAL DATA
M74HC646/648
DIM.
MIN.TYP.MAX.MIN.TYP.MAX.
A2.650.104
a10.100.200.0040.007
a22.450.096
b0.350.490.0130.019
b10.230.320.0090.012
C0.500.020
c145° (typ.)
D15.2015.600.5980.614
E10.0010.650.3930.420
e1.270.05
e313.970.55
F7.407.600.2910.299
L0.501.270.190.050
S8°(max.)
mminch
L
A
a2
b
e3
D
2413
112
e
F
s
a1
c1
b1
C
E
11/12
Page 12
M74HC646/648
Information furnishedis believed to be accurate and reliable. However, SGS-THOMSON Microelectronicsassumes no responsability for the
consequences of useof suchinformation nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted byimplication or otherwiseunder any patentor patentrights ofSGS-THOMSON Microelectronics.Specificationsmentioned
in this publication are subjectto changewithout notice. This publication supersedes andreplaces all information previouslysupplied.
SGS-THOMSON Microelectronicsproducts are not authorized foruse ascritical componentsinlife supportdevices or systems without express
written approval of SGS-THOMSON Microelectonics.
1994SGS-THOMSON Microelectronics- All Rights Reserved
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