The M74HC393 is an high speed CMOS DUAL
BINARY COUNTER fabricated with silicon gate
2
MOS technology.
C
This counter circuit contains independent ripple
carry counters and two 4-bit ripple carry binary
counters, which can be cascaded to create a
single divide by 256 counter.
Each 4-bit counter is incremented on the high to
low transition (neg ative edge) of the clock inp ut,
TSSOPDIPSOP
ORDER CODES
PACKAGETUBET & R
DIPM74HC393B1R
SOPM74HC393M1RM74HC393RM13TR
TSSOPM74HC393TTR
and each has an indep endent clear input. When
CLEAR is set to low, all four bits of each count er
are set to a low level. This enables count
truncation and allows the implementation of divide
by N counter configurations.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/11July 2001
Page 2
M74HC393
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN NoSYMBOLNAME AND FUNCTION
1, 13
2, 12
3, 4, 5, 61QA to 1QD Flip Flop Outputs
11, 10, 9, 82QA to 2QD Flip Flop Outputs
7GNDGround (0V)
14VccPositive Supply Voltage
TRUTH TABLE
INPUTSOUTPUTS
1 CLOCK
2 CLOCK
1 CLEAR
2 CLEAR
Clock Input Divide by 2
Section (HIGH to LOW
Edge-Triggered)
This log i c diagram has not be used to est i m at e propagation delays
TIMING CHART
3/11
Page 4
M74HC393
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
V
V
I
I
OK
I
I
or I
CC
P
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65
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