The M74HC377 is an high speed CMOS OCTAL
D TYPE FLIP FLOP fabricated with silicon gate
2
MOS technology.
C
Information at the D inputs meeting the setup time
requirements is transferred to the Q outputs on the
positive going edge of the clock pulse if the enable
input G
is low. Clock triggering occurs at a
particular voltage level and is not directly related
TSSOPDIPSOP
ORDER CODES
PACKAGETUBET & R
DIPM74HC377B1R
SOPM74HC377M1RM74HC377RM13TR
TSSOPM74HC377TTR
to the transition time of the positive going pulse.
When the clock input is at either the high or low
level, the D input signal has no effect at the output.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/11July 2001
Page 2
M74HC377
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN NoSYMBOLNAME AND FUNCTION
1 G
2, 5, 6, 9, 12,
15, 16, 19
3, 4, 7, 8, 13,
14, 17, 18
11CLOCK
10GNDGround (0V)
20VccPositive Supply Voltage
TRUTH TABLE
INPUTSOUTPUTS
1Q to 8QFlip Flop Outputs
1D to 8DData Inputs
Data Enable Input (Active
LOW)
Clock Input (LOW to
HIGH, Edge Triggered)
G
HXXNO CHANGE
LLL
LHH
XXNO CHANGE
X : Don’t Care
LOGIC DIAGRAM
CLOCKDATAQ
This log i c diagram has not be used to est i m at e propagation delays
2/11
Page 3
M74HC377
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
V
V
I
I
OK
I
I
or I
CC
P
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65
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