The M54/74HC373/533 are high speed CMOS
OCTALLATCHWITH3-STATEOUTPUTS
fabricated within silicon gateC2MOS technology.
These ICs achive the high speed operation similar
to equivalent LSTTL while maintaning the CMOS
low power dissipation.
These8bit D-Type latches are controlled bya latch
enable input (LE) and aoutput enable input (OE).
While the LE input is held at a high level, the Q
outputs will follow the data input precisely or
inversely. When the LE is taken low, theQ outputs
willbelatchedpreciselyorinversely atthelogiclevel
M54/74HC373
M54/ 74 HC5 33
B1R
(PlasticPackage)
M1R
(MicroPackage)
ORDER CODE S :
M54HC XXXF1RM74HC XXXM1R
M74HC XXXB1RM74H CXXXC1R
of D input data. While the OE input is at low level,
the eightoutputs willbe in anormal logic state(high
or lowlogiclevel) andwhile high levelthe outpts will
be in a high impedance state.
Theapplicationdesignerhasachoise of
combination of inverting andnon invertingoutputs.
The three state output configuration and the wide
choise of outline make bus organized system
simple.
All inputs are equipped with protection circuits
against discharge andtransient excessvoltage.
F1R
(CeramicPackage)
C1R
(Chip Carrier)
PIN CONNECTION (top view)
HC373HC533HC373HC533
October 1993
1/13
Page 2
M54/M74HC373/533
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESC RIPTION (H C373)
PIN NoSYMBOLNAME AND FUNCTION
1OE3 State output Enable
Input (Active LOW)
2, 5, 6, 9,
12, 15, 16,
19
3, 4, 7, 8,
13, 14, 17,
18
11LELatch Enable Input
10GNDGround (0V)
20V
Q0 to Q73 State outputs
D0 to D7Data Inputs
CC
Positive Supply Voltage
IEC LOGIC SYMBOLS
HC373HC533
PIN DESCRIPTION (HC533)
PIN NoSYMBOLNAME AND FUNCTION
1OE3 State output Enable
Input (Active LOW)
2, 5, 6, 9,
12, 15, 16,
19
3, 4, 7, 8,
13, 14, 17,
18
11LELatch Enable Input
10GNDGround (0V)
20V
Q0 to Q73 State outputs
D0 to D7Data Inputs
CC
Positive Supply Voltage
2/13
Page 3
TRUTH TABLE
INPUTSOUTPUTS
OELEDQ (HC373)Q (HC533)
HXXZZ
LLXNO CHANGE *NO CHANGE *
LHLLH
LHHHL
X: DON’T CARE
Z: HIGH IMPEDANCE
*: Q/Q OUTPUTS ARE LATCHED AT THETIMEWHENTHE LE INPUTIS TAKEN LOW LOGIC LEVEL.
LOGIC DIAGRAMS
HC373
M54/M74HC373/533
HC533
3/13
Page 4
M54/M74HC373/533
ABSOLU TE M AXIMU M R AT ING S
SymbolParameterValueUnit
V
CC
V
V
O
I
IK
I
OK
I
O
I
or I
CC
P
D
T
stg
T
AbsoluteMaximumRatingsarethosevalues beyondwhichdamage tothedevice mayoccur.Functionaloperation under these conditionsisnot implied.
(*)500 mW: ≅ 65oC derateto300 mWby 10mW/oC: 65oCto85oC
RECO MM ENDED OPERAT I N G CO NDI TI O NS
SymbolParameterValueUnit
V
CC
V
I
V
O
T
op
t
r,tf
Supply Voltage-0.5 to +7V
DC Input Voltage-0.5 to VCC+ 0.5V
I
DC Output Voltage-0.5 to VCC+ 0.5V
DC Input Diode Current± 20mA
DC Output Diode Current± 20mA
DC Output Source Sink Current Per Output Pin± 35mA
DC VCCor Ground Current± 70mA
GND
Power Dissipation500 (*)mW
Storage Temperature-65 to +150
Lead Temperature (10sec)300
L
Supply Voltage2 to 6V
Input Voltage0 to V
Output Voltage0 to V
Operating Temperature:M54HC Series
M74HC Series
CC
CC
-55 to +125
-40 to +85
Input Rise and Fall TimeVCC= 2 V0 to 1000ns
V
= 4.5 V0 to 500
CC
V
= 6 V0 to 400
CC
o
C
o
C
V
V
o
C
o
C
4/13
Page 5
DC SPECIFICATIONS
SymbolParameter
V
V
V
V
I
I
High Level Input
IH
Voltage
Low Level Input
IL
Voltage
High Level
OH
Output Voltage
Low Level Output
OL
Voltage
I
Input Leakage
I
Current
3 State Output
OZ
Off State Current
Quiescent Supply
CC
Current
M54/M74HC373/533
Test ConditionsValue
T
=25oC
V
(V)
CC
A
54HC and 74HC
Min.Typ.Max.Min.Max.Min.Max.
2.01.51.51.5
4.53.153.153.15
6.04.24.24.2
2.00.50.50.5
4.51.351.351.35
6.01.81.81.8
2.0
4.54.44.54.44.4
6.05.96.05.95.9
4.5I
6.0I
2.0
4.50.00.10.10.1
6.00.00.10.10.1
4.5I
6.0I
6.0
=
V
I
IO=-20 µA
V
IH
or
V
IL
=-6.0 mA 4.184.314.134.10
O
=-7.8 mA 5.685.85.635.60
O
V
=
I
IO=20µA
V
IH
or
V
IL
= 6.0 mA0.170.260.330.40
O
= 7.8 mA0.180.260.330.40
O
VI=VCCor GND±0.1±1±1µA
6.0VI=VIHor V
1.92.01.91.9
0.00.10.10.1
IL
VO=VCCor GND
6.0 VI=VCCor GND44080µA
-40 to 85oC
74HC
-55 to 125oC
54HC
Unit
±0.5±5.0±10µA
V
V
V
V
5/13
Page 6
M54/M74HC373/533
AC ELECTRICAL CHARACTERISTICS (CL=50pF,Inputtr=tf=6ns)
Test ConditionsValue
T
=25oC
SymbolParameter
t
t
TLH
THL
Output Transition
Time
C
V
CC
(V)
L
(pF)
2.0
50
4.57121518
A
54HC and 74HC
Min.Typ.Max.Min.Max.Min.Max.
25607590
6.06101315
t
PLH
t
PHL
Propagation
Delay Time
(LE, D - Q, Q)
2.0
50
4.514253138
42125155190
6.012212632
2.0
150
4.519354453
57175220265
6.016303745
t
t
PZL
PZH
3 State Output
Enable Time
2.0
50RL=1KΩ
4.513253138
39125155190
6.011212632
2.0
150 R
4.518354453
=1KΩ
L
54175220265
6.015303745
t
t
PLZ
PHZ
3 State Output
Disable Time
2.0
50RL=1KΩ
4.514253138
30125155190
6.013212632
t
W(H)
Minimum Pulse
Width (LE)
2.0
50
4.56151922
157595110
6.06131619
Minimum Set-up
t
s
Time
2.0
50
4.54101315
16506575
6.0391113
t
h
Minimum Hold
Time
2.0
50
4.5555
6.0555
C
C
Input Capacitance5101010pF
IN
OUT
Out put
10
Capacitance
(*)Power Dissipation
C
PD
38
Capacitance
(*) CPDisdefined as thevalueof the IC’sinternal equivalent capacitance which is calculated from the operating current consumption withoutload.
(Refer to TestCircuit).Averageoperting current can be obtainedby thefollowingequation. ICC(opr) = CPD• VCC•fIN+ICC/8(per Flip Flop) andthe
CPDwhenn pcsofFlip Flopoperate, canbe gainedby following equation: CPD(TOTAL) =22 +16 x n [pF]
-40 to 85oC
74HC
-55 to 125oC
54HC
Unit
ns
ns
ns
ns
ns
ns
ns
ns
555
ns
pF
pF
6/13
Page 7
SWITCHING CHARACTERISTICS TEST WAVEFORM
M54/M74HC373/533
t
PLH,tPHL
t
PLZ,tPZL
, (D - Q, Q)t
The 1KΩ load resistors should be connected between
outputs and VCCline and the 50pF load capacitors
should be connected between outputsand GND line.
All inputs except OE input should be connected to V
CC
line or GND line such that outputs will be in low logic
level while OE input is held low.
PLH,tPHL
t
PHZ,tPZH
(LE - Q, Q), ts,th,t
W
The 1KΩ load resistors and the 50pF load capacitors
should be connected between each output and GND
line.
All inputs except OE input should be connected to V
CC
or GND line such that output will be in high logic level
while OE input is held low.
7/13
Page 8
M54/M74HC373/533
TEST CIRCUIT ICC(Opr.)
INPUTWAVEFORM ISTHE SAME AS THATIN CASEOF SWITCHINGCHARACTERISTICSTEST.
8/13
Page 9
Plastic DIP20 (0.25) MECHANICAL DATA
M54/M74HC373/533
DIM.
MIN.TYP.MAX.MIN.TYP.MAX.
a10.2540.010
B1.391.650.0550.065
b0.450.018
b10.250.010
D25.41.000
E8.50.335
e2.540.100
e322.860.900
F7.10.280
I3.930.155
L3.30.130
Z1.340.053
mminch
P001J
9/13
Page 10
M54/M74HC373/533
Ceramic DIP20 MECHANICAL DATA
DIM.
MIN.TYP.MAX.MIN.TYP.MAX.
A250.984
B7.80.307
D3.30.130
E0.51.780.0200.070
e322.860.900
F2.292.790.0900.110
G0.40.550.0160.022
I1.271.520.0500.060
L0.220.310.0090.012
M0.511.270.0200.050
N14° (min.), 15° (max.)
P7.98.130.3110.320
Q5.710.225
mminch
10/13
P057H
Page 11
SO20 MECHANICAL DATA
M54/M74HC373/533
DIM.
MIN.TYP.MAX.MIN.TYP.MAX.
A2.650.104
a10.100.200.0040.007
a22.450.096
b0.350.490.0130.019
b10.230.320.0090.012
C0.500.020
c145° (typ.)
D12.6013.000.4960.512
E10.0010.650.3930.419
e1.270.050
e311.430.450
F7.407.600.2910.299
L0.501.270.190.050
M0.750.029
S8°(max.)
mminch
P013L
11/13
Page 12
M54/M74HC373/533
PLCC20 MECHANICAL DATA
DIM.
MIN.TYP.MAX.MIN.TYP.MAX.
A9.7810.030.3850.395
B8.899.040.3500.356
D4.24.570.1650.180
d12.540.100
d20.560.022
E7.378.380.2900.330
e1.270.050
e35.080.200
F0.380.015
G0.1010.004
M1.270.050
M11.140.045
mminch
12/13
P027A
Page 13
M54/M74HC373/533
Information furnishedis believed to be accurate and reliable. However, SGS-THOMSON Microelectronicsassumes no responsabilityfor the
consequences of useof suchinformation nor for any infringementof patents or other rightsof third parties which may results from its use. No
license is granted byimplication or otherwiseunder any patentor patentrights ofSGS-THOMSON Microelectronics. Specificationsmentioned
in thispublication are subjectto changewithout notice. This publicationsupersedes andreplaces all information previouslysupplied.
SGS-THOMSON Microelectronicsproducts are not authorized foruse ascritical componentsin life supportdevices or systems without express
written approval of SGS-THOMSON Microelectonics.
1994SGS-THOMSON Microelectronics- All Rights Reserved
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