Datasheet M62381FP Datasheet (Mitsubishi)

MITSUBISHI<Dig.Ana.INTERFACE>

of built-in inverting type amplifier.

(replacement of conventional half-fixed resistor.)

M62381FP

8-BIT 8CH MULTIPLYING D-A CONVERTER WITH BUFFER AMPLIFIERS

DESCRIPTION

The M62381FP is an integrated circuit semiconductor of
CMOS structure with 8 channels of built-in 8-bit resolution
multiplication type D-A converters.
The input data is a easy-to-use 3-wire serial transfer method
and it is able to cascading serial use with Do terminal.
This device is capable of 4 quadrant multiplication because

FEATURES

•Digital data transfer method
3-wire 12-bit serial data transfer method(DI,CLK,LD)

•High pressure proof(VDD±5V)

•Short setting time

•Built-in reset terminal,all the buffer amplifier outputs
forces zero volts.

APPLICATION

Signal gain control of DISPLAY-MONITOR or CTV.
Conversion from digital control data analog control data

for form-use and industrial equipment.

Automatic adjustment by combination with EEPROM and

micro-computer.

BLOCK DIAGRAM

DI
CLK

20

17

VDD

21

12-BIT SHIFT RESISTER

PIN CONFIGURATION (TOP VIEW)

18

16

24
23
22
21
205
196
187
178
169
1510
1411
1312

Do

LD

Vo3
Vo2

Vo1
VIN2
VIN1
GND

RESET

VIN5
VIN6

Vo5

Vo6

Vo7

DECODER

1
2
3
4

Outline 24P2V-A

Vo4
VIN3
VIN4
VDD
DI
VSS
Do
CLK
LD
VIN8
VIN7
Vo8

VIN1

GND

VIN2

VIN3

VIN4

VIN5

VIN6

VIN7

VIN8

23

14

15

6

22

8

9

RESET

7

5

8-BIT D-A

CONVERTER

4

19

VSS

CH2

CH3

CH4

CH5

CH6

CH7

CH8

24

10

11

12

13

Vo1

3

2

Vo2

Vo3

1

Vo4

Vo5

Vo6

Vo7

Vo8

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EXPLANATION OF TERMINALS

Pin No.

20
18
17
16

3
2
1

24
10
11
12

13
21

19

6

5

4
23
22

8

9

14

15

7

Symbol

DI

Do

CLK

LD

Vo1
Vo2
Vo3

Vo4
Vo5
Vo6
Vo7

Vo8
VDD

VSS

GND

VIN1
VIN2
VIN3
VIN4
VIN5
VIN6

VIN7
VIN8

RESET

MITSUBISHI<Dig.Ana.INTERFACE>

M62381FP

8-BIT 8CH MULTIPLYING D-A CONVERTER WITH BUFFER AMPLIFIERS

Function

Serial data input terminal

Serial data output terminal

Serial clock input terminal

When LD terminal level is "H",latch circuit data is load

8-bit resolution D-A converter output terminal

Analog and digital common power supply terminal
Analog negative power supply terminal

GND terminal

D-A converter reference input terminal

When RESET terminal level is "H",all D-A output terminal became "0V"

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8-BIT 8CH MULTIPLYING D-A CONVERTER WITH BUFFER AMPLIFIERS

DIGITAL DATA FORMAT

LAST
LSB

(1)DAC set up data

MSB LSB

D7

0
0

D6 D5 D4 D3

0
0

0
0

0
0

0
0

D2

D1

0
0

0
0

D0

0
1

MITSUBISHI<Dig.Ana.INTERFACE>

M62381FP

FIRST
MSB

DAC SELECT DATADAC DATA

D-A output

-VIN
(1/128-1) X VIN

0
1
1

1
1

(2)DAC select data

MSB

D11 D10 D9 D8

0
0
0

0
1

1

1

1
0

0

1 1 1 1 1 1 0
1 1 1 1 1 1 1

0
0
0

1
0
0

1

1
0

0

0
0
1

1
0

0

1

1
0

0

LSB

0
1

0

1
0

1

1

1
0

0

Don‘t care

ch1 selection
ch2 selection

ch7 selection
ch8 selection
Don‘t care

Don‘t care

1
0

0

DAC selection

1
0

0

1
0

1

(127/128-1) X VIN
(128/128-1) X VIN

(129/128-1) X VIN

(254/128-1) X VIN
(255/128-1) X VIN

TIMING CHART (MODEL)

DI

CLK

LD

RESET

D-A
OUTPUT

MSB
D11 D10

D9

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LSB

D0

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M62381FP

8-BIT 8CH MULTIPLYING D-A CONVERTER WITH BUFFER AMPLIFIERS

ABSOLUTE MAXIMUM RATINGS

Symbol Ratings

VDD
VIN Digital input voltage

Vss

VIN Input voltage

Topr
Tstg Storage temperature

Supply voltage

Analog negative supply voltage

Output voltage
Operating temperature

Parameter

ELECTRICAL CHARACTERISTICS
Digital part(VDD=+5V, VSS=-5V,VDD≥VIN≥Vss,GND=0V,Ta=-20 to +85°C,unless otherwise noted)

Symbol

VDD

IILK
VIL
VIH
VOL

VOH

Supply voltage
Input leak current
Input low voltage

Input high voltage
Output low voltage
Output high voltage

Parameter

VIN=0 to Vcc

IOL=2.5mA
IOH=-400µA

Conditions

Test conditions

-0.3 to +6.0

-0.3 to +6.0

-6.0 to +3.0
Vss+0.3 to VDD-0.3
Vss+0.3 to VDD-0.3

Min.

4.5

-10

0.8VDD

VDD-0.4

-20 to +85

-40 to +125

Limits

Typ.

5.0

Max.

5.5

10

0.2VDD

0.4

Unit

V

V
V
V

VVo

°C
°C

Unit

V
µA

V
V

V
V

Analog part(VDD=+5V, VSS=-5V,VDD≥VIN≥Vss,GND=0V,Ta=-20 to +85°C,unless otherwise noted)

Symbol

IIN

VAO
IAO

RES

DNL

NL

EG

Parameter

D-A converter reference input current
Buffer amplifier output voltage range

Buffer amplifier output current range
Resolution
Differential nonlinearity

Nonlinearity
Gain error

IAO=±500µA
IAO=±1mA

VAO=VAOZERO+0.3 to VAOFULL-0.3

VDD-0.5≥VIN≥VSS+0.5

Test conditions

Min.

VAOZERO

+0.15

VAOZERO

+0.3

-1.0
8 bit

-1.0

-1.5

-3

AC CHARACTERISTICS

Symbol

tCXL
tCXH
tCR Clock rise time
tCF
tDCH
tCHD
tCHL

tLDH
tLDC

tDo
tLDD

Clock "L"pulse width
Clock "H"pulse width

Clock fall time
Data set up time
Data hold time

LD set up time
LD hold time

LD "H" pulse width

Data output delay time

D-A output setting time

Parameter Test conditions

CL=100pF

Min Typ
200

200

30
60

200
100

100

70 350

Limits

Typ.

0.2

Limits

Max.

0.4

VAOFULL

-0.15

VAOFULL

-0.3

1.0

1.0

1.5
3

Max

200

200

Unit

mA

V

mA

LSB
LSB

%FS

Unit

ns

ns
ns
ns

ns
ns
ns

ns
ns
ns

nsWithout load

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TIMING CHART

COMPUTER

MITSUBISHI<Dig.Ana.INTERFACE>

M62381FP

8-BIT 8CH MULTIPLYING D-A CONVERTER WITH BUFFER AMPLIFIERS

CLK

DI

LD

D-A
OUTPUT

Do
OUTPUT

tCXL

tCR

tDCH

tCHD

tCXH

tDo

tCF

tLDC

tLDH

tCHL

tLDD

APPLICATION EXAMPLE

VDD
VSS

MICRO

5

4
23
22

8

9
14
15

16
17
20

7

VIN1
VIN2

VIN3

VIN4

VIN5

VIN6

VIN7
VIN8

LD
CLK

DI

RESET

21

VDD

GND

6

VSS

19

-5V

5V

Vo1
Vo2

Vo3
Vo4
Vo5

Vo6

Vo7

Vo8

12
13

24
10

11

3
2
1

ANALOG OUT

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