Datasheet M52791SP, M52791FP Datasheet (Mitsubishi)

Page 1
M I T S U B I S H I
-10
MITSUBISHI ICs (AV COMMON)
M52791SP/FP
PRELIMINARY
Some parametric limits are subject to change.
DESCRIPTION
FEATURES
of
1.778mm ( M52791SP ) ; and SSOP with a lead pitch of 0.8mm ( M52791FP ) .
APPLICATION
Video equipment
RECOMMENDED OPERATING CONDITION
(Lead pitch :1.778mm)
PIN CONFIGURATION ( TOP VIEW )
(Lead pitch :0.8mm)
of
output 0dB or 6dB .
1234567151413121110
9
TUNER IN
Rch T IN
BIAS
V 1 OUT
C IN
8
16
VIDEO 2 IN
SCL
Lch 2 IN
Y 3 IN
C 3 IN
Lch 3 IN
Rch 4 IN
VIDEO 4 IN
GND
17183635343332313022232425262728292120
19
Lch 1 OUT
Y 1 OUT
V 2 OUT
CHIP SELECT
1234567151413121110981617183635343332313022232425262728292120
19
TUNER IN
BIAS
V 1 OUT
C IN
SCL
Lch 2 IN
Y 3 IN
C 3 IN
Lch 3 IN
Rch 4 IN
VIDEO 4 IN
GND
Lch 1 OUT
Y 1 OUT
V 2 OUT
CHIP SELECT
Notice. This is not a final specification.
The M52791 is AV switch semiconductor integrated circuit with I2C bus control . This IC contains 1-channel of 4-input audio switches and 1­channel of 4-input video switches. Each audio switches and video switches can be controled independently . The video switches contain amplifiers can be controled a gain
•Video and stereo sound switches in one package
•Wide frequency range ( video switch )..........DC~20MHz
•High separation ( video switch )
.......Crosstalk -60dB ( typ. ) at 1MHz
•Two types of packages are provided : SDIP with a lead pitch
PIN CONFIGURATION ( TOP VIEW )
VCC
Lch T IN
C 2 IN
Rch 2 IN
Y 2 IN
VIDEO 3 IN
Rch 3 IN
Lch 4 IN
C 4 IN
Y 4 IN
DA
Outline 36P4E
Y IN Y/C SEPA
C 1OUT Rch 1 OUT
Y 2 OUT
C 2 OUT
SDA
Supply voltage 4.7V ~ 9.3V Rated supply voltage 5V,9V
Maximum output current 49mA(at 9V)
VCC
VIDEO 2 IN
C 2 IN
Rch 2 IN
Y 2 IN
VIDEO 3 IN
Rch 3 IN
Lch 4 IN
C 4 IN
Y 4 IN
DA
Outline 36P2R-D
Lch T IN Rch T IN
Y IN Y/C SEPA
C 1OUT Rch 1 OUT
Y 2 OUT
C 2 OUT
SDA
1
AUG.'98
Page 2
M I T S U B I S H I
-10
MITSUBISHI ICs (AV COMMON)
M52791SP/FP
PRELIMINARY
Some parametric limits are subject to change.
BLOCK DIAGRAM
2
Notice. This is not a final specification.
VCC
TUNER IN VIDEO 2 IN VIDEO 3 IN VIDEO 4 IN
Y 2 IN Y 3 IN Y 4 IN
C 2 IN C 3 IN C 4 IN
Rch T IN Rch 2 IN
Rch 3 IN Rch 4 IN
36
2
12
6
11 16
9
14
33
10 15
1
V-SW
0/6dB
0/6dB
0dB
0/6dB
0dB
0/6dB
0dB
0dB
31
C IN
34 32
Y IN
26
25
30
24 28
23
27
7
S
Y-SW
N
C-SW
4
5
N
R-SW
R-MODE
R M L
Y/C SEPA
Y/C Sepa.
Y 1 OUT
Y 2 OUT
V 1 OUT V 2 OUT
C 1 OUT C 2 OUT
Rch 1 OUT
Lch T IN Lch 2 IN
Lch 3 IN Lch 4 IN
BIAS
35
3
13
18
8
BIAS
L-SW
2
I C Control
19
GND
L-MODE
L M R
17
DA
0dB
29
21
20
22
CHIP SELECT
Lch 1 OUT
SDA SCL
AUG.'98
Page 3
M I T S U B I S H I
-10
MITSUBISHI ICs (AV COMMON)
M52791SP/FP
PRELIMINARY
Some parametric limits are subject to change.
5~9V
Name
Peripheral circuit pins
Remarks
VCC
2
34Lch 2 IN
5
Rch 2 IN
7
VIDEO 3 IN
12
9
C 3 IN
14
C 4 IN
10
15
Rch 4 IN
33
Rch T IN
8
Lch 3 IN
13
35
Lch T IN
34
C IN36TUNER IN
6
11
Y 3 IN
16
Y 4 IN
32
Y IN17DA9V3.6V
4.7V
4.7V
30K
20K
3
Notice. This is not a final specification.
DESCRIPTION OF PIN
Pin No.
1
VIDEO 2 IN Y 2 IN
VIDEO 4 IN
Rch 3 IN Lch 4 IN
DC voltage(V)
Clamp in
C 2 IN
VOL max.=0.4V (at Iin=1mA)
AUG.'98
Page 4
M I T S U B I S H I
-10
MITSUBISHI ICs (AV COMMON)
M52791SP/FP
PRELIMINARY
Some parametric limits are subject to change.
Pin No.
Name
Peripheral circuit pins
Remarks
BIAS
19
GND20SCL21SDA
22
SELECT
OPEN-------90H
4.2V
70K
30K
30K
4
Notice. This is not a final specification.
DESCRIPTION OF PIN (cont.)
18
DC voltage(V)
VIL max.=1.5V VIH min.=3.0V
CHIP
VIL max.=1.5V VIH min.=3.0V VOL max.=0.4V
(at Iin=3mA)
SLAVE
ADDRESS
0~1.5V------90H
2.5V~Vcc---92H
AUG.'98
Page 5
M I T S U B I S H I
-10
MITSUBISHI ICs (AV COMMON)
M52791SP/FP
PRELIMINARY
Some parametric limits are subject to change.
Pin No.
Name
Peripheral circuit pins
Remarks
Rch 1 OUT
29
Lch 1 OUT
31
Y/C SEPA
1.5K
1.5K
15K5K5K
DC=2.9V
C 2 OUT
24
V 2 OUT
30
V 1 OUT
28
C 1 OUT
25
Y 2 OUT
26
Y 1 OUT
5K
5K
5
Notice. This is not a final specification.
DESCRIPTION OF PIN (cont.)
DC voltage(V)
C OUT
4.0V
V OUT Y OUT SYNC CHIP DC=2.9V
23
27
C OUT
3.3V
V OUT Y OUT SYNC CHIP DC=2.2V
4.0V
SYNC CHIP
AUG.'98
Page 6
M I T S U B I S H I
-10
MITSUBISHI ICs (AV COMMON)
M52791SP/FP
PRELIMINARY
Some parametric limits are subject to change.
6
A ; Acknownledge
controled by DATA1 , audio switches are controled by DATA2 .
the
wired-AND function .
2
123456789129LSBAMSB
SCL
S
A
S
A
DATA2
A
P : Stop
SLAVE ADDRESS
100100X
receiver )
2
Notice. This is not a final specification.
I C BUS
I C BUS(Inter IC BUS)is multi master bus system developed by PHILIPS . Two wires ( SDA - serial data, SCL - serial clock ) realize functions of start , stop , transferring data , synchronization and arbitration. The output stages of device connected to the bus must have an open drain or open collector in order to perform
SDA
MSB
S ; Start condition, a high to low transition of the SDA line while SCL is high P ; Stop condition, a low to high transition of the SDA line while SCL is high
Every byte put on the SDA line must be 8-bits long . Each byte has to be followed by an acknowledge bit. Data is transferred with the most significant bit (MSB ) first . The data on the SDA line must be stable during the HIGH period of the clock . The HIGH or LOW state of the data line can only change when the clock signal on the SCL line is LOW .
LSB
P
CONTROL
This IC controls 2-channel switchs with 2-byte data ( DATA1 and DATA2 ) . Video switches are
SLAVE ADDRESS
S : Start A : Acknowledge
DATA1
0
P
A
R/W bit Usually ` 0 ` ( W : Master transmitter transmits to slave
Possible to select 22PIN : Hi : 1,Lo : 0
AUG.'98
Page 7
M I T S U B I S H I
-10
MITSUBISHI ICs (AV COMMON)
M52791SP/FP
PRELIMINARY
Some parametric limits are subject to change.
7
Data byte format
M52791 FUNCTION TABLE
S
SLAVE ADDRESS
A
DATA(D7~D0)
A
DATA(DF~D8)
APSLAVE ADDRESS
SLAVE ADDRESS
A6A5A4A3A2A1A0
R/W100100
0 / 10DATA1(D7~D0) CONT
DATA
D7D6D5D4D3D2D1D0CONT
SEPA AMP
Y/C AMP
V AMP1
S/N
VIDEO SW CONT
AMP GAIN CONT.
DATA
AMP
DATA
AMP
DATA
AMPD5SEPA AMP
D4
YC AMP
D3
V AMP
0
0dB00dB00dB16dB16dB16dB
DATA2(DF~D8) CONT
DATA
DFDEDDDCDBDAD9D8CONT
AUDIO MODE
I/O
AUDIO SW CONT
AUDIO SW CONT
MODE
MUTE
R/R
L/L
NORMAL
DATA
OUT
OUT
OUT
OUTD9D8
Lch OUT 1
Rch OUT 1
Lch OUT 1
Rch OUT 1
Lch OUT 1
Rch OUT 1
Lch OUT 1
Rch OUT 1
00MUTE
MUTE
Rch T IN
Rch T IN
Lch T IN
Lch T IN
Lch T IN
Rch T IN
01MUTE
MUTE
Rch 2 IN
Rch 2 IN
Lch 2 IN
Lch 2 IN
Lch 2 IN
Rch 2 IN
10MUTE
MUTE
Rch 3 IN
Rch 3 IN
Lch 3 IN
Lch 3 IN
Lch 3 IN
Rch 3 IN
11MUTE
MUTE
Rch 4 IN
Rch 4 IN
Lch 4 IN
Lch 4 IN
Lch 4 IN
Rch 4 IN
I/O CONT.
AUDIO MODE CONT
DATA
OUTDADA OUT
DATA
MODE
0HIDFDE1LO00MUTE
01R/R10
L/L11
NORMAL
0 FIX
0 FIX
Y/C SEPA
VIDEO SW CONT
DATA
OUT
S/N(S:1)
V-SW
V OUT
Y OUT
C OUT
D2D1D0000T IN
Y IN
C IN001V 2 IN
Y IN
C IN010V 3 IN
Y IN
C IN011V 4 IN
Y IN
C IN100Y/C MIX T
Y IN
C IN101Y/C MIX 2
Y 2 IN
C 2 IN
110
Y/C MIX 3
Y 3 IN
C 3 IN
111
Y/C MIX 4
Y 4 IN
C 4 IN
0 FIX
0 FIX
0 FIX
Notice. This is not a final specification.
AUG.'98
Page 8
M I T S U B I S H I
-10
MITSUBISHI ICs (AV COMMON)
M52791SP/FP
PRELIMINARY
Some parametric limits are subject to change.
Symbol
Min.
Typ.
VccVCircuit current
Voltage gain
Dynamic Range
Crosstalk
Voltage gain
Frequency characteristics
Total harmonic distortion
Dynamic Range
Input impedance
IccGF
D
CTGF
D
CTmAdBdBVp-p
dBdBdB%dBkmV
Vcc=9V,Vin=0Vp-p,Rl=∞Ω
<1.0%
4.7
49644255-0.500.5
6
2.0
42142026
-54
0
-0.500.5-1010.01
5.5
020223038-------(Ta=25°C,Vcc=9V,unless otherwise noted)
-0.500.5
6
42-----------90--84
-
ELECTRICAL CHARACTERISTICS
6.002.0
2.0
2.0
Notice. This is not a final specification.
Parameter
Supply voltage
VIDEO
Frequency
characteristics
Test condition
Vcc=5V,Vin=0Vp-p,Rl=∞Ω
f=100kHz,1Vp-p (0dB)(T V1OUT) f=100kHz,1Vp-p (6dB)(T V1OUT)
f=100kHz,1Vp-p (0dB)(Y V1OUT) f=100kHz,1Vp-p (6dB)(Y V1OUT)
f=10MHz/100kHz,1Vp-p (0dB)(T V1OUT) f=10MHz/100kHz,1Vp-p (6dB)(T V1OUT) f=10MHz/100kHz,1Vp-p (0dB)(Y V1OUT)
f=10MHz/100kHz,1Vp-p (6dB)(Y V1OUT) Vcc=9V(0dB)(T V1OUT)
Vcc=5V(0dB)(T V1OUT) Vcc=9V(0dB)(Y V1OUT)
f=100kHz Maximum
with distortion
-
-
5.5
5.5
-2.0 0
-2.0
-2.0 0
-2.0 0
Max.
9.3
6.5
6.5
Unit
Input impedance
AUDIO
Output DC offset voltage
Crosstalk
ZIC ZIV
ZIY
THD
VOFF
Z1
Vcc=5V(0dB)(Y V1OUT)
(C,C2,C3,C4) Clamp in(T,V2,V3,V4)
Clamp in(Y,Y2,Y3,Y4)
f=1MHz,1Vp-p T V1OUT (at V2 mode)
f=1kHz ,1Vp-p (Vcc9V)(RT R1OUT) f=1kHz ,1Vp-p (Vcc5V)(RT R1OUT)
f=100kHz/1kHz , 1Vp-p(RT R1OUT) f=1kHz,2Vp-p,at 400HzHPF+30kHzLPF
(RT R1OUT) f=1kHz ,Maximum with distortion<0.5%
(RT R1OUT)
(MODE:RT,R2,R3,R4 R1OUT ) (RT,R2,R3,R4,LT,L2,L3,L4 )
1kHz,1Vp-p RT R1OUT(at R2 mode)
-0.5
-20
k
-60
0.5
0.05
Vp-p
8
AUG.'98
Page 9
M I T S U B I S H I
-10
MITSUBISHI ICs (AV COMMON)
M52791SP/FP
PRELIMINARY
Some parametric limits are subject to change.
tBUF
P
tHD;STA
tLOWtRtHD;DAT
tHIGHtFtSU;DAT
tSU;STA
Sr
tHD;STA
tSU;STO
P
SDA
I C BUS CONTROL SIGNAL
2
I2C BUS CONTROL SIGNAL
(Ta=25°C,Vcc=9V,unless otherwise noted)
ELECTRICAL CHARACTERISTICS
Max. input high voltage
4.0
4.0
5.0
4.0--
1000
kHzµSµSnS-------
Low level input current
Time of bus must be free before
Hold time at start condition
The high period of the clock
Hold time DATA
Rise time of both SDA and SCL line
Setup time for stop condition
V
SDA , SCL = 4.5 V
3.0
0.0
-10
1.5
1010----------------0.0
Symbol
Min.
Typ.
a new transmission can start
Notice. This is not a final specification.
Parameter
Min. input low voltage Low level output voltage(SDA)
High level input current
SCL clock frequency
The low period of the clock
Setup time for start condition
Setup time DATA
VIH VIL VOL
IIH IIL
fSCL
tBUF
tHD;STA
tLOW
tHIGH tSU;STA tHD;DAT
tSU;DAT
tR
Test condition
SDA = 3mA
SDA , SCL = 0.4 V
0.0
-10
4.7
4.7
4.7
250
Max.
5.0
0.4
100
Unit
µA
Fall time of both SDA and SCL line
SCL
S
tF
tSU;STO
300
-
9
AUG.'98
Page 10
M I T S U B I S H I
-10
MITSUBISHI ICs (AV COMMON)
M52791SP/FP
PRELIMINARY
Some parametric limits are subject to change.
10
Notice. This is not a final specification.
Application Circuit Example
0.01µ
VCC
10K
100µ
1
VCC
75
0.47µ
2
VIDEO 2 IN
10µ
3
Lch 2 IN
75
0.01µ
4
C 2 IN
10µ
5
Rch 2 IN
75
0.47µ
6
Y 2 IN
75
0.47µ
7
VIDEO 3 IN
10µ
8
Lch 3 IN
75
0.01µ
9
C 3 IN
10µ
10
75
0.47µ
75
0.47µ
10µ
75
0.01µ
10µ
75
0.47µ
10µ
Rch 3 IN
11
Y 3 IN
12
VIDEO 4 IN
13
Lch 4 IN
14
C 4 IN
15
Rch 4 IN
16
Y 4 IN
17
DA
18
BIAS
TUNER IN
Lch T IN
C IN
Rch T IN
Y IN
Y/C SEPA
V 1 OUT
Lch 1 OUT
C 1OUT
Rch 1 OUT
Y 1 OUT
Y 2 OUT
V 2 OUT
C 2 OUT
CHIP SELECT
SDA
SCL
GND
0.47µ
36
75
10µ
35
0.01µ
34
10µ
33
0.47µ
Y/C Sepa.
32
31
30
75
75
29
28
75
75
27
26
75
75
25
24
23
slave address Cange(VCC/GND)
22
220
21
220
10K
5V
20
5V
10K
19
Note how to use this IC
Input signal with sufficient low impedance to input terminal. The capacitance of output terminal as small as possible. Set the capacitance between Vcc and GND near the pins if possible. Assign an area as large as possible for grounding.
Power-on Reset
The M52791 has an intermal power-on reset function that sets each control r egister to "0" during IC power ON. The power-on reset VTH has 2.5V.
AUG.'98
Loading...