Datasheet M51995FP, M51995AP Datasheet (Mitsubishi)

SWITCHING REGULATOR CONTROL

DESCRIPTION

M51995A is the primary switching regulator controller which is
especially designed to get the regulated DC voltage from AC power
supply.
This IC can directly drive the MOS-FET with fast rise and fast fall
output pulse.
Type M51995A has the functions of not only high frequency OSC
and fast output drive but also current limit with fast response and
high sensibility so the true "fast switching regulator" can be
realized.
It has another big feature of current protection to short and over
current,owing to the integrated timer-type protection circuit,if few
parts are added to the primary side.
The M51995A is equivalent to the M51977 with externally re­settable OVP(over voltage protection)circuit.

MITSUBISHI (Dig./Ana. INTERFACE)

M51995AP/FP

PIN CONFIGURATION (TOP VIEW)

Vcc

COLLECTOR

VOUT

EMITTER

VF

ON/OFF

OVP

DET

F/B

1
2
3
4

Outline 16P4

16

CLM+

15
14

CLM-

13

GND

125

CT

116

T-OFF

107

CF

98

T-ON

FEATURES

500kHz operation to MOS FET

•Output current...............................................................±2A

•Output rise time 60ns,fall time 40ns

•Modified totempole output method with small through current
Compact and light-weight power supply

•Small start-up current............................................90µA typ.

•Big difference between "start-up voltage" and "stop voltage"

makes the smoothing capacitor of the power input section small.

Start-up threshold 16V,stop voltage 10V

•Packages with high power dissipation are used to with-stand the

heat generated by the gate-drive current of MOS FET.
16-pin DIP,20-pin SOP 1.5W(at 25°C)
Simplified peripheral circuit with protection circuit and built-in
large-capacity totempole output

•High-speed current limiting circuit using pulse-by-pulse

method(Two system of CLM+pin,CLM-pin)

•Protection by intermittent operation of output over current......

..........................................................Timer protection circuit

•Over-voltage protection circuit with an externally re-settable

latch(OVP)

•Protection circuit for output miss action at low supply

voltage(UVLO)
High-performance and highly functional power supply

•Triangular wave oscillator for easy dead time setting

Vcc

20

CLM+

19
18

CLM-

17

GND

165
156
147

CT

138

T-OFF

12

CF

1110

T-ON

VOUT

VF

1
2
3
4

COLLECTOR

EMITTER

HEAT SINK PIN HEAT SINK PIN

ON/OFF

OVP

9

DET

F/B

Outline 20P2N-A

Connect the heat sink pin to GND.

APPLICATION

Feed forward regulator,fly-back regulator

RECOMMENDED OPERATING CONDITIONS

Supply voltage range............................................12 to 36V

Operating frequency.................................less than 500kHz

Oscillator frequency setting resistance

•T-ON pin resistance RON...........................10k to 75kΩ

•T-OFF pin resistance ROFF..........................2k to 30kΩ

( / 27 )

1

SWITCHING REGULATOR CONTROL

BLOCK DIAGRAM

OP AMP

ACTION

OSCILLATOR CAPACITANCE CF

ON/OFF

VCC

UNDER
VOLTAGE
LOCKOUT

VOLTAGE

REGULATOR

7.1V

5.8V

15.2K

1S

3K

MITSUBISHI (Dig./Ana. INTERFACE)

M51995AP/FP

F/B

500

6S

DET

GND

OVP(shut down)

OSCILLATOR RESISTANCE T-ON

(ON duty)

OSCILLATOR RESISTANCE T-OFF

(OFF duty)

VF

LATCH

OSCILLATOR

(TRIANGLE)

1S

+CURRENT

LIMIT LATCH

CLM+

+CURRENT LIMIT

1S

PWM

COMPARATOR

-CURRENT

LIMIT LATCH

-CURRENT LIMIT

CLM-

ABSOLUTE MAXIMUM RATINGS

Symbol Ratings UnitParameter Conditions
VCC Supply voltage
VC

IO

VVF
VON/OFF
VCLM-
VCLM+
IOVP
VDET
IDET
VFB
ITON

ITOFF

Pd
K
Topr
Tstg
Tj Junction temperature

Collector voltage
Output current

VF terminal voltage
ON/OFF terminal voltage
CLM-terminal voltage
CLM+terminal voltage
OVP terminal current
DET terminal voltage
DET terminal input current

F/B terminal voltage
T-ON terminal input current
T-OFF terminal input current
Power dissipation
Thermal derating factor
Operating temperature
Storage temperature

Peak

Continuous

Ta=25˚C
Ta>25˚C

PWM

LATCH

INTERMITTENT

ACTION AND

OSC CONTROL

INTERMITTENT OPERATION

2.5V

INTERMITTENT

CT

DETERMINE CAPACITANCE

36
36
±2

±0.15

Vcc
Vcc

-4.0 to +4.0

-0.3 to +4.0
8
6
5

0~10

-1

-2

1.5
12

-30 to +85

-40 to +125
150

COLLECTOR

VOUT

EMITTER

V
V

A
V

V
V
V

mA

V

mA

V

mA
mA

W

mW/˚C

˚C
˚C

˚C

Note 1."+" sign shows the direction of current flow into the IC and "-" sign shows the current flow from the IC.

2.This terminal has the constant voltage characteristic of 6 to 8V,when current is supplied from outside.The maximum allowable
voltage is 6V when the constant voltage is applied to this terminal.And maximum allowable current into this terminal is 5mA.

3.The low impedance voltage supply should not be applied to the OVP terminal.

( / 27 )

2

SWITCHING REGULATOR CONTROL

MITSUBISHI (Dig./Ana. INTERFACE)

ELECTRICAL CHARACTERISTICS (VCC=18V, Ta=25°C, unless otherwise noted)

Block

Symbol Test conditions UnitParameter

VCC
VCC(START)
VCC(STOP)

∆Vcc

IccL

IccO
Icc OFF

Icc CT

Icc OVP

VTHH ON/OFF

VTHL ON/OFF

∆VTHON/OFF

IFBMIND
IFBMAXD

∆IFB

VFB

RFB
VDET
IINDET

GAVDET
VTHOVPH
∆VTHOVP

ITHOVP

IINOVP

VCCOVPC

VCC(STOP)

-VCCOVPC

ITHOVPC

fTIMER

ITIMECH

TIMEOFF/ON

VTHCLM-

IINCLM-

TPDCLM-

VTHCLM+

IINCLM+

TPDCLM+

Operating supply voltage range
Operation start up voltage
Operation stop voltage

Difference voltage between
operation start and stop

Stand-by current
Operating circuit current

Circuit current in OFF state

Circuit current in timer OFF state

Circuit current in OVP state

ON/OFF terminal high threshold voltage
ON/OFF terminal low threshold voltage
ON/OFF terminal hysteresis voltage

Current at 0% duty

Current at maximum duty

Current difference between max and 0% duty

Terminal voltage

Terminal resistance

Detection voltage

Input current of detection amp

Voltage gain of detection amp

OVP terminal H threshold voltage

OVP terminal hysteresis voltage
OVP terminal threshold current

OVP terminal input current

OVP reset supply voltage

Difference supply voltage between

operation stop and OVP reset

Current from OVP terminal for

OVP reset

Timer frequency

Timer charge current

OFF time/ON time ratio

CLM- terminal threshold voltage

CLM- terminal current

Delay time from CLM- to VOUT

CLM+ terminal threshold voltage

CLM+ terminal current

Delay time from CLM+ to VOUT

∆Vcc=Vcc(START) -Vcc(STOP)

Vcc=14.5V,Ta=25°C
Vcc=14.5V,-30≤Ta≤85°C

Vcc=30V
Vcc=25V
Vcc=14V

Vcc=25V
Vcc=14V

Vcc=25V
Vcc=9.5V

F/B terminal input current
F/B terminal input current

∆IFB=IFBMIND-IFBMAXD
F/B terminal input current=0.95mA

VDET=2.5V

∆VTHOVP=VTHOVPH-VTHOVPL

VOVP=400mV

OVP terminal is open.
(high impedance)

Vcc=30V

Vcc=18V

CT=4.7µF

VCT=3.3V,Ta=-5°C

Ta=25°C
Ta=85°C

-5≤Ta≤85°C

VCLM-=-0.1V

-5≤Ta≤85°C
VCLM+=0V

M51995AP/FP

Limits

Min. Typ. Max.

Vcc(STOP)

15.2

0.95

0.95

-0.90

-1.35 -0.99 -0.70

-480

-210

0.27

-193

-178

-147

-220

-170

180

-270

16.2 17.2

5.0
50

40
10

50

1.3

125

2.1

1.9

0.1

-2.1

4.9

420

2.4 2.5 2.6

30

540

80
80 150

7.5

0.55

7.0

6.3 7.6
90

90
15

1.31
90

1.35

160

2.0

200

2.6

2.4

0.2

-1.54

-0.55

5.9

600

1.0
40

750

150 250

9.0 10.0

1.20

-320 -213

-140 -93

0.40 0.60

-138

-127

-105

8.7

-200

-125
100

200

-205
100

35

140
190

21

5.0

140

2.0

240

3.0

310

3.1

2.9

3.0

-1.0

-0.40

7.1

780

3.0

960

30

250

-102

-94

-78

11.0

-180

-90

220

-140

V
V

V9.0 9.9 10.9
V

µA

µA

mA

mA

µA

mA

µA

mA

µA

V
V
V

mA
mA
mA

V

Ω

V

µA

dB
mV
mV

µA

µA

V
V

µA

Hz

µA

mV

µA

ns

mV

µA

ns

( / 27 )

3

SWITCHING REGULATOR CONTROL

MITSUBISHI (Dig./Ana. INTERFACE)

Block

ELECTRICAL CHARACTERISTICS (VCC=18V,Ta=25˚C, unless otherwise noted)(CONTINUE)

Symbol

fOSC
TDUTY

VOSCH
VOSCL

∆VOSC

fOSCVF

TVFDUTY

VTHTIME

IVF

VOL1

VOL2
VOL3
VOL4

VOH1

VOH2

TRISE

TFALL

Oscillating frequency
Maximum ON duty

Upper limit voltage of oscillation waveform
Lower limit voltage of oscillation waveform
Voltage difference between upper limit and

lower limit of OSC waveform
OSC frequency in CLM

operating state
Duty in CLM operating state
VF voltage at timer operating start
VF terminal input current

Output low voltage

Output high voltage
Output voltage rise time

Output voltage fall time

VF=5V

VF=2V

VF=0.2V

RON=20kΩ,ROFF=17kΩ
CF=220pF,-5≤Ta≤85°C

fOSC=188kHz

fOSC=188kHz

fOSC=188kHz

RON=20kΩ,ROFF=17kΩ
CF=220pF

Min off duty/Max on duty

Source current
Vcc=18V,Io=10mA

Vcc=18V,Io=100mA
Vcc=5V,Io=1mA

Vcc=5V,Io=100mA
Vcc=18V,Io=-10mA
Vcc=18V,Io=-100mA

No load

No load

Test conditions

M51995AP/FP

Limits

Min. Typ. Max.
170 188 207

47.0 50.0 53.0

3.97 4.37 4.77

1.76 1.96 2.16

2.11
170

108

11.0 13.7

2.7

16.0

15.5

2.41 2.71

188 207
124 143

22.0

3.0

0.05

0.7

0.69

1.3

16.5

16.0
50
35

3.3

2

0.4

1.4

1.0

2.0

UnitParameter

kHz

kHz

6

%
V

V
V

V

µA

V
V

V
V

V

V
ns
ns

( / 27 )

4

SWITCHING REGULATOR CONTROL

TYPICAL CHARACTERISTICS

0

threshold voltage

(VTHOVPL)

ROFF=20kΩ

Ta=-30°C

Ta=25°C

Ta=85°C

fOSC=500kHz

fOSC=100kHz

THERMAL DERATING

1800

1500

1200

(MAXIMUM RATING)

MITSUBISHI (Dig./Ana. INTERFACE)

M51995AP/FP

CIRCUIT CURRENT VS.SUPPLY VOLTAGE

22m

18m

16m

14m

(NORMAL OPERATION)

RON=18kΩ

900

600

300

0

0 25 50 75

AMBIENT TEMPERATURE Ta(°C)

CIRCUIT CURRENT VS.SUPPLY VOLTAGE

8.0
OVP RESET POINT

8.87V(-30°C)

7.0

8.94V(25°C)

9.23V(85°C)

6.0

5.0

4.0

3.0

2.0

(OVP OPERATION)

85

Ta=-30°C

Ta=25°C

Ta=85°C

100

125 150

12m
10m

100µ

50µ

0

CIRCUIT CURRENT VS.SUPPLY VOLTAGE

3.0

2.0

1.0

10

SUPPLY VOLTAGE Vcc(V)

20 30

(OFF STATE)

Ta=25°C

Ta=85°C

Ta=-30°C

40

1.0

0

0

CIRCUIT CURRENT VS.SUPPLY VOLTAGE

3.0

2.0

1.0

0

0

10.0 20.0 30.0

SUPPLY VOLTAGE Vcc(V)

(TIMER OFF STATE)

Ta=25°C
Ta=85°C

Ta=-30°C

10 20 30

SUPPLY VOLTAGE Vcc(V)

40.0

40

( / 27 )

5

1.1

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0

0

10 20 30
SUPPLY VOLTAGE Vcc(V)

OVP TERMINAL THRESHOLD VOLTAGE

VS.AMBIENT TEMPERATURE

H threshold voltage

L

-40 -20
AMBIENT TEMPERATURE Ta(°C)

20 40 60

40

(VTHOVPH)

80 100

SWITCHING REGULATOR CONTROL

MITSUBISHI (Dig./Ana. INTERFACE)

M51995AP/FP

THRESHOLD VOLTAGE OF ON/OFF

TERMINAL VS.AMBIENT TEMPERATURE

3.4

3.2

3.0

ON OFF

2.8

2.6

2.4

OFF ON

2.2

2.0

1.8

-40 -20 0 20 40 60

AMBIENT TEMPERATURE Ta(°C)

INPUT CURRENT OF VF TERMINAL

-10

-9

-8

-7

-6

-5

-4

-3

-2

-1

VS.INPUT VOLTAGE

Ta=-30°C
Ta=25°C
Ta=85°C

80 100

THRESHOLD VOLTAGE OF ON/OFF

TERMINAL VS.AMBIENT TEMPERATURE

25.0

ON OFF

20.0

15.0

-20

OFF ON

20

0

40 60 80 100

5.0

0

-60

-40

AMBIENT TEMPERATURE Ta(°C)

DISCHARGE CURRENT OF TIMER

18

17

16

15

14

13

12

11

VS.AMBIENT TEMPERATURE

0

0 1 2 3 4 5 6 7 8 9 10

VF TERMINAL VOLTAGE VVF(V)

CHARGE CURRENT OF TIMER

-200

-180

-160

-140

-120

-100

-80

-60

-40

-60

VS.AMBIENT TEMPERATURE

-40 -20

0 20 40

60

AMBIENT TEMPERATURE Ta(°C)

80 100

( / 27 )

6

10

-60 -40

-20 0 20 40 60

AMBIENT TEMPERATURE Ta(°C)

ON AND OFF DURATION OF TIMER

VS.AMBIENT TEMPERATURE

175

150

(INTERMITTENT OPERATION)

TIMER ON•••CIRCUIT OPERATION ON
TIMER OFF••CIRCUIT OPERATION OFF

TIMER ON

125

100

75

-40 -20

-60

TIMER OFF

0 20 40

AMBIENT TEMPERATURE Ta(°C)

60

80

100

80 100

1.4

1.3

1.2

1.1

1.0

SWITCHING REGULATOR CONTROL

MITSUBISHI (Dig./Ana. INTERFACE)

M51995AP/FP

VF THRESHOLD VOLTAGE FOR TIMER

VS. AMBIENT TEMPERATURE

3.5

3.0

2.5

-40 -20 0 20 40 60 80

-60
AMBIENT TEMPERATURE Ta(°C)

THRESHOLD VOLTAGE OF CLM- TERMINAL

VS. AMBIENT TEMPERATURE

205

200

100

THRESHOLD VOLTAGE OF CLM+ TERMINAL

VS. AMBIENT TEMPERATURE

205

200

195

-40 -20 0 20 40 60 80

-60
AMBIENT TEMPERATURE Ta(°C)

CLM+ TERMINAL CURRENT

-400

-300

-200

VS. CLM+ TERMINAL VOLTAGE

Ta=-30°C

Ta=25°C

Ta=85°C

100

195

-40 -20 0 20 40 60 80

-60
AMBIENT TEMPERATURE Ta(°C)

CLM- TERMINAL CURRENT

-500

-400

-300

-200

-100

0

VS. CLM- TERMINAL VOLTAGE

Ta=-30°C
Ta=25°C

Ta=85°C

0 -0.2 -0.4 -0.6 -0.8

CLM- TERMINAL VOLTAGE VCLM-(V) OUTPUT SOURCE CURRENT IOH(A)

100

-1.0

( / 27 )7

-100

0

0

0.1 0.2

2.6
Vcc=18V

2.4

Ta=25°C

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

1m 10m

0.3

0.4 0.5 0.6 0.7 0.8 0.9

CLM+ TERMINAL VOLTAGE VCLM+(V)

OUTPUT HIGH VOLTAGE VS.

OUTPUT SOURCE CURRENT

100m

1 10

1.0

SWITCHING REGULATOR CONTROL

MITSUBISHI (Dig./Ana. INTERFACE)

M51995AP/FP

OUTPUT LOW VOLTAGE

5.0

4.0

3.0

2.0

1.0

0

1m

1.6

1.5

1.4

VS. OUTPUT SINK CURRENT

Ta=25°C

Vcc=18V

Vcc=5V

10m 100m 1

OUTPUT SINK CURRENT IOL(A)

INPUT CURRENT OF DETECTION AMP

VS. AMBIENT TEMPERATURE

10

2.55

2.50

2.45

2.40

50.0

40.0

DETECTION VOLTAGE

VS. AMBIENT TEMPERATURE

-40 -20 0 20 40 60 80

-60
AMBIENT TEMPERATURE Ta(°C)

DETECTION AMP VOLTAGE GAIN

VS. FREQUENCY

100

1.3

1.2

1.1

1.0

0.9

0.8

-40 -20 0 20 40 60 80

-60
AMBIENT TEMPERATURE Ta(°C)

VS. F/B TERMINAL INPUT CURRENT

50

40

30

20

ON duty

(fOSC=100kHz)
RON=18kΩ
ROFF=20kΩ

Ta=-30°C
Ta=25°C

Ta=85°C

100

30.0

20.0

10.0

0

20

100

50

40

30

1k 10k 100k 1M 10M

FREQUENCY f(Hz)

ON duty

VS. F/B TERMINAL INPUT CURRENT

(fOSC=200kHz)
RON=18kΩ
ROFF=20kΩ

Ta=-30°C
Ta=25°C

Ta=85°C

10

0

0 0.5

F/B TERMINAL INPUT CURRENT IF/B (mA)

1.0

1.5 2.0

2.5

10

( / 27 )

8

0

0 0.5

F/B TERMINAL INPUT CURRENT IF/B (mA)

1.0

1.5 2.0

2.5

SWITCHING REGULATOR CONTROL

MITSUBISHI (Dig./Ana. INTERFACE)

333333557

7

M51995AP/FP

50

40

30

20

10

0

10000

1000

100

10

1

120

110

F/B TERMINAL INPUT CURRENT

0 0.5 1.0 1.5 2.0 2.5

F/B TERMINAL INPUT CURRENT IF/B(mA)

OSCILLATING FREQUENCY VS. CF

RON=22kΩ
ROFF=12kΩ

RON=36kΩ
ROFF=6.2kΩ

RON=24kΩ
ROFF=20kΩ

1 10 100 1000 10000

CF TERMINAL CAPACITY(pF)

OSCILLATING FREQUENCY VS.

ON duty VS.

(fOSC=500kHz)
RON=18kΩ
ROFF=20kΩ

Ta=-30°C
Ta=25°C

Ta=85°C

TERMINAL CAPACITY

AMBIENT TEMPERATURE

RON=24kΩ
ROFF=20kΩ
CF=330pF

UPPER & LOWER LIMIT VOLTAGE OF OSC

VS. AMBIENT TEMPERATURE

RON=18kΩ

5.2

ROFF=20kΩ

4.8

4.4

4.0

2.2

2.0

1.8

-40 -20 0 20 40 60 80

-60
AMBIENT TEMPERATURE Ta(°C)

100

90
80
70
60
50
40
30
20
10

0

1 10 100

OSCILLATING FREQUENCY VS.

700

600

AMBIENT TEMPERATURE

fOSC=500kHz
fOSC=200kHz
fOSC=100kHz

fOSC=100kHz
fOSC=200kHz

fOSC=500kHz

ON duty VS. ROFF

ROFF(kΩ)

RON=75kΩ
51kΩ

36kΩ

24kΩ
22kΩ
18kΩ
15kΩ

10kΩ

RON=24kΩ
ROFF=20kΩ
CF=47pF

100

500

100

400

90

80

-40 -20 0 20 40 60 80

-60
AMBIENT TEMPERATURE Ta(°C)

100

( / 27 )

9

300

200

-40 -20 0 20 40 60 80

-60
AMBIENT TEMPERATURE Ta(°C)

100

SWITCHING REGULATOR CONTROL

MITSUBISHI (Dig./Ana. INTERFACE)

RON=36k,ROFF=6.2k

RON=22k,ROFF=12k

RON=24k,ROFF=20k

RON=22k,ROFF=22k

RON=18k,ROFF=24k

RON=15k,ROFF=27k

RON=36k,ROFF=6.2k

RON=22k,ROFF=12k

RON=24k,ROFF=20k

RON=22k,ROFF=22k

RON=18k,ROFF=24k

RON=15k,ROFF=27k

RON=36k,ROFF=6.2k

RON=22k,ROFF=12k

RON=24k,ROFF=20k

RON=22k,ROFF=22k

RON=18k,ROFF=24k

RON=15k,ROFF=27k

12345612345

6

RON=15k,ROFF=27k

RON=18k,ROFF=24k

RON=22k,ROFF=22k

RON=24k,ROFF=20k

RON=22k,ROFF=12k

RON=36k,ROFF=6.2k

12345

6

RON=15k,ROFF=27k

RON=18k,ROFF=24k

RON=22k,ROFF=22k

RON=24k,ROFF=20k

RON=22k,ROFF=12k

RON=36k,ROFF=6.2k

12345

6

M51995AP/FP

ON duty VS. AMBIENT TEMPERATURE

100

90
80
70
60
50
40
30
20
10

0

-40 -20 0 20 40 60 80

-60
AMBIENT TEMPERATURE Ta(°C)

ON duty VS. AMBIENT TEMPERATURE

100

90
80
70
60
50
40
30
20
10

0

-40 -20 0 20 40 60 80

-60
AMBIENT TEMPERATURE Ta(°C)

(fOSC=100kHz)

(fOSC=500kHz)

100

100

ON duty VS. AMBIENT TEMPERATURE

100

90

(fOSC=200kHz)

80
70
60
50
40
30
20
10

0

-40 -20 0 20 40 60 80

-60
AMBIENT TEMPERATURE Ta(°C)

INPUT VOLTAGE OF TERMINAL VS.

5.0

EXPANSION RATE OF PERIOD

(fOSC=100kHz)

4.0

3.0

2.0

1.0

0

0 2 4 6 8 10 12 14 16 18 20

EXPANSION RATE OF PERIOD(TIMES)

100

INPUT VOLTAGE OF TERMINAL VS.

5.0

EXPANSION RATE OF PERIOD

(fOSC=500kHz)

4.0

3.0

2.0

1.0

0

0 2 4 6 8 10 12 14 16 18 20

EXPANSION RATE OF PERIOD(TIMES)

OVP TERMINAL INPUT VOLTAGE VS.

1m

INPUT CURRENT

Ta=85°C

Ta=25°C
Ta=-30°C

100µ

10µ

1µ

0.2

0.4 0.6 0.8 1.0

OVP TERMINAL INPUT VOLTAGE VOVP(V)

( / 27 )10

SWITCHING REGULATOR CONTROL

CURRENT FROM OVP TERMINAL FOR OVP

800

700

600

RESET VS. SUPPLY VOLTAGE

MITSUBISHI (Dig./Ana. INTERFACE)

M51995AP/FP

500

400

300

200

100

Ta=-30°C
Ta=25°C

Ta=85°C

0

0

10 15

5

SUPPLY VOLTAGE Vcc(V)

25 30 35 40

20

( / 27 )11

SWITCHING REGULATOR CONTROL

FUNCTION DESCRIPTION

OVP

F/B

MITSUBISHI (Dig./Ana. INTERFACE)

M51995AP/FP

Type M51995AP and M51995AFP are especially designed for
off-line primary PWM control IC of switching mode power supply
(SMPS) to get DC voltage from AC power supply.
Using this IC,smart SMPS can be realized with reasonable
cost and compact size as the number of external electric

AC

CFIN

1

2

M51995AP

4

3 151314 9 10 11 12

parts can be reduced and also parts can be replaced by
reasonable one.
In the following circuit diagram,MOS-FIT is used for output
transistor,however bipolar transistor can be used with no
problem.

VOUT2

R1

A

16

VOUT1

R2

Cvcc

5

8 6 7

OVP

CF

CT

F/B

RON

A

ROFF

ON/OFF

AC

CFIN

Fig.1 Example application circuit diagram of feed forward regulator

1

2

M51995AP

4

3 151314 9 10 11 12

Pin No.is related with M51995AP

R1

VOUT

16

R21

Cvcc

5

8 6 7

R22

CF

ROFFRON

Pin No.is related with M51995AP

Fig.2 Example application circuit diagram of fly-back regulator

( / 27 )

12

SWITCHING REGULATOR CONTROL

MITSUBISHI (Dig./Ana. INTERFACE)

(1)Oscillator operation when intermittent action
and OSC control circuit does not operate

operate.It means that intermittent action and OSC control circuit
does not operate.
The current flows through RON from the constant voltage source
of 5.8V.CF is charged up by the same amplitude as RON
current,when internal switch SW1 is switched to "charging
side".The rise rate of CF terminal is given as

(STOP)

current by the function of Q2,Q3 and Q4

when SW1,SW2 are switched to "discharge side".

SW2Q2Q1

Q4

1/16

SIGNAL

DISCHARGING

CHARGING

SW1

T-ON

T-OFFCFRON

ROFF

CF

Vz 4.2V

~

operation of intermittent action and OSC.control
circuit)

VOH

VOL

VOSCH

VOSCL

4.4V

2.0V

~

Q3

M51995AP/FP

Start-up circuit section

The start-up current is such low current level as typical 90µ
A,as shown in Fig.3,when the Vcc voltage is increased
from low level to start-up voltage Vcc(START).
In this voltage range,only a few parts in this IC,which has the
function to make the output voltage low level,is alive and
Icc current is used to keep output low level.The large voltage
difference between Vcc(START) and Vcc(STOP) makes start-up
easy,because it takes rather long duration from Vcc(START) to
Vcc(STOP).

Icco

~

14mA

IccL

~

90µA

~

Vcc

9.9V

Vcc

(START)

~

16.2V

SUPPLY VOLTAGE Vcc(V)

Fig.3 Circuit current vs.supply voltage

Oscillator section

The oscillation waveform is the triangle one.The ON-duration
of output pulse depends on the rising duration of the triangle
waveform and dead-time is decided by the falling duration.
The rising duration is determined by the product of external
resistor RON and capacitor CF and the falling duration is mainly
determined by the product of resistor ROFF and capacitor CF.

CF is discharged by the summed-up of ROFF current and one
sixteenth (1/16) of RON

5.8V

FROM
VF SIGNAL

SWITCHED BY
CHARGING AND
DISCHARGING

M51995

Fig.4 Schematic diagram of charging and discharging
control circuit for OSC.capacitor CF

~

Fig.4 shows the equivalent charging and discharging circuit
diagram of oscillator when the current limiting circuit does not

VT - ON

~

RON X CF

where VT - ON

(V/s)

................................................(1)

~

4.5V

The maximum on duration is approximately given as

(VOSCH-VOSCL) X RON X CF

~

where VOSCH 4.4V

VOSCL

VT - ON

~

2.0V

~

(s)

........................(2)

Fig.5 OSC.waveform at normal condition (no-

So fall rate of CF terminal is given as

~

VT - OFF

ROFF X CF

VT - ON

+

16 X RON X CF

The minimum off duration approximately is given as

(VOSCH-VOSCL) X CF

~

VT-OFF

+

ROFF

where VT - OFF

VT-ON

16 X RON

~

3.5V

(s)

.....................................(4)

The cycle time of oscillation is given by the summation of
Equations 2 and 4.
The frequency including the dead-time is not influenced by the
temperature because of the built-in temperature compensating
circuit.

13

( / 27 )

(V/s)

.....................(3)

SWITCHING REGULATOR CONTROL

MITSUBISHI (Dig./Ana. INTERFACE)

(2)Oscillator operation when intermittent action
and OSC control circuit operates.

As shown in Fig.7,the internal circuit kills the first output pulse in
the output waveform.The output waveform will appear from the
second pulse cycle because the duration of first cycle takes CF
charging time longer comparing with that at the stable operating
state.
Usually the applied voltage to VF terminal must be proportional
the output voltage of the regulator.
So when the over current occurs and the output voltage of the
regulator becomes low,the off-duration becomes wide.
There are two methods to get the control voltage,which
depends on the output voltage,on primary side.For the fly back
type regulator application,the induced voltage on the third or
bias winding is dependent on output voltage.On the other
hand,for the feed forward type regulator application,it can be
used that the output voltage depends on the product of induced
voltage and "on-duty",as the current of choke coil will continue
at over load condition,it means the "continuous current"
condition.
Fig.8 shows one of the examples for VF terminal application for
the feed forward type regulator.

VOH

VOL

VOSCH

VOSCL

4.4V

2.0V

~

VOH

VOL

VOSCH

VOSCL

M51995AP/FP

When over current signal is applied to CLM+ or CLM­terminal,and the current limiting circuit,intermittent action and
OSC control circuit starts to operate.In this case T-OFF terminal
voltage depends on VF terminal voltage,so the oscillation
frequency decreases and dead-time spreads.

The rise rate of oscillation waveform is given as

VT - ON

~

RON X CF

The fall rate of oscillation waveform is given as

VVF - VVFO

~

ROFF X CF

where

So when VVF>3.5V,the operation is just same as that in the
no current limiting operation state.
The maximum on-duration is just same as that in the no­operation state of intermittent and oscillation control circuit
and is given as follows;

(V/s)

................................................(5)

VT - ON

+

16 X RON X CF

~

VT - ON
VVF;VF terminal voltage

VVFO
VVF-VFO=0 if VVF-VVFO<0

VVF-VVFO=VT-OFF if VVF-VVFO>VT-OFF 3.5V

4.5V

~

0.4V

(V/s)

...............(6)

~

~

Fig.6 OSC.waveform with operation of intermittent
and OSC.control circuit operation

START FROM 0V

0

(VOSCH - VOSCL)

~

The minimum off-duration is approximately given as;

(VOSCH - VOSCL)

~

VVF - VVFO

ROFF X CF

The oscillation period is given by the summation of Equation(7)
and (8).

VT - ON

+

16 X RON X CF

X ROFF X CF

X CF

VT - ON

(s)

...............(7)

(s)

...............(8)

NO GENERATE
PULSE

0

OPERATION START

Fig.7 Relation between OSC. and output waveform
circuit operation at start up

RVFFB

CVFFB

Fig.8 Feedback loop with low pass filter from output
to VF terminal

choke coil will continue at over load condition,it means the
"continuous current" condition.
Fig.8 shows one of the examples for VF terminal application
for the feed forward type regulator.

( / 27 )

14

FIRST
PULSE

M51995

VOUT

VF

SWITCHING REGULATOR CONTROL

MITSUBISHI (Dig./Ana. INTERFACE)

duration of output waveform coincides with the rising duration of
CF terminal waveform,when the infinitive resistor is connected
between F/B terminal and GND.
When the F/B terminal has finite impedance and current flows
out from F/B terminal,"A" point potential shown in Fig.9 depends
on this current.So the "A" point potential is close to GND level
when the flow-out current becomes large.
"A" point potential is compared with the CF terminal oscillator
waveform and PWM comparator,and the latch circuit is set
when the potential of oscillator waveform is higher than "A"
point potential.
On the other hand,this latch circuit is reset by high level signal
during the dead-time of oscillation(falling duration of oscillation
waveform).So the "B" point potential or output waveform of latch
circuit is the one shown in Fig.10.
The final output waveform or "C" point potential is got by
combining the "B" point signal and dead-time signal
logically.(please refer to Fig.10)

continue until next cycle.Fig.11 shows the timing relation among
them.
The current limiting circuit has two input terminals,one has the
detector-sensitivity of +200mV to the GND terminal and the
other has -200mV.The circuit will be latched if the input signal is
over the limit of either terminal.
If the current limiting circuit is set,no waveform is generated at
output terminal however this state is reset during the
succeeding dead-time.
So this current limiting circuit is able to have the function in
every cycle,and is named "pulse-by-pulse current limit".

OSCTOOUTPUT

POINT C

POINT B

LATCH

COMP

POINT A

5.8V

6S1S7.1V~POINT A

OSC WAVEFORM

POINT A

POINT B

POINT C

VTHCLM 200mV

~

VTHCLM -200mV

~

M51995AP/FP

PWM comparator and PWM latch section

Fig.9 shows the PWM comparator and latch section. The on-

­+

PWM

F/B

Current limiting section

When the current-limit signal is applied before the crossing
instant of "A" pint potential and CF terminal voltage shown in
Fig.9,this signal makes the output "off" and the off state will

OSC WAVEFORM
OF CF TERMINAL

WAVEFORM OF
CLM+ TERMINAL

CURRENT LIMIT
SIGNAL TO SET
LATCH

M51995A

CF

Fig.9 PWM comparator and latch circuit

WAVEFORM
OF O.S.C. &

Fig.10 Waveforms of PWM comparator input point A,
latch circuit points B and C

FROM

WAVEFORM OF
VOUT TERMINAL

(a) +current limit

OSC WAVEFORM
OF CF TERMINAL

WAVEFORM OF
CLM- TERMINAL

CURRENT LIMIT
SIGNAL TO SET
LATCH

WAVEFORM OF
VOUT TERMINAL

(b) -current limit

Fig.11 Operating waveforms of current limiting circuit

( / 27 )

15

SWITCHING REGULATOR CONTROL

MITSUBISHI (Dig./Ana. INTERFACE)

terminal,as the influence from the gate drive current of MOS-FIT
can be eliminated and wide voltage rating of + 4V to -4V is
guaranteed for absolute maximum rating.
There happen some noise voltage on RCLM during the switching
of power transistor due to the snubber circuit and stray
capacitor of the transformer windings.
To eliminate the abnormal operation by the noise voltage,the
low pass filter,which consists of RNF and CNF is used as shown
in Fig.12.
It is recommended to use 10 to 100Ω for RNF because such
range of RNF is not influenced by the flow-out current of some
200µA from CLM terminal and CNF is designed to have the
enough value to absorb the noise voltage.

On the other hand,when CT terminal voltage decreases to lower
than 2V,the IC operation will be reset to original state,as the
control logic circuit makes the SWA "on" and SWB "off".
Therefore the parts in power circuit including secondary rectifier
diodes are protected from the overheat by the over current.

+

VOUT

CLM+

GND

RNF

CNF

RCLM

+

VOUT

CLM-

GND

RNF

CNF

RCLM

SIGNAL

LIMIT LATCH

CONTROL CIRCUIT

M51995AP/FP

It is rather recommended to use not "CLM+" but "CLM-"

M51995A

(a)In case of CLM+

M51995A

(b)In case of CLM-

Fig.12 How to connect current limit circuit

Intermittent action and oscillation control
section

When the internal current limiting circuit states to operate
and also the VF level decreases to lower than the certain level
of some 3V,the dead-time spreads and intermittent action and
OSC control circuit(which is one of the timer-type-protection
circuit)starts to operate.
The intermittent action and OSC control circuit is the one to
generate the control signal for oscillator and intermittent action
circuit.
Fig.13 shows the timing-chart of this circuit.When the output of
intermittent action and oscillation control is at "high" level,the
waveform of oscillator depends on the VF terminal voltage and
the intermittent action circuit begins to operate.

OSC WAVEFORM
OF CF TERMINAL

CURRENT LIMIT
SIGNAL

OSC WAVEFORM
OF CF TERMINAL

CURRENT LIMIT

OUTPUT OF CURRENT

OUTPUT OF INTERMITTENT
ACTION and OSC.

(b) Without current limit signal

Fig.13 Timing chart of intermittent and OSC.control circuit

Intermittent action circuit section

Intermittent action circuit will start to operate when the output
signal from the intermittent action and oscillation control circuit
are "high" and also VF terminal voltage is lower than VTHTIME of
about 3V.
Fig.14 shows the block diagram of intermittent action
circuit.Transistor Q is on state when VF terminal voltage is
higher than VTHTIME of about 3V,so the CT terminal voltage is
near to GND potential.
When VF terminal voltage is lower than VTHTIME,Q becomes
"off" and the CT has the possibility to be charged up.
Under this condition,if the intermittent action and oscillation
control signal become "high" the switch SWA will close only in
this "high" duration and CT is charged up by the current of
120µA through SWA (SWB is open) and CT terminal potential
will rise.The output pulse can be generated only this duration.
When the CT terminal voltage reaches to 8V,the control logic
circuit makes the SWA "off" and SWB "on",in order to flow in the
ITIMEOFF of 15µA to CT terminal.
The IC operation will be ceased in the falling duration.

ITIMEON

(~120µA)

VTHTIME (~ 3V)

CT

Q

VF

CT

Fig.14 Block diagram of intermittent action circuit

A

SWA
SWB

B

ITIMEOFF

(~15µA)

CONTROL
LOGIC

GND

GND

GND

OUTPUT OF
CURRENT LIMIT
LATCH

OUTPUT OF
INTERMITTENT
ACTION and OSC.
CONTROL CIRCUIT

(a) With current limit signal

( / 27 )16

SWITCHING REGULATOR CONTROL

MITSUBISHI (Dig./Ana. INTERFACE)

action mode,when the current limit function becomes to operate
and the VF terminal voltage becomes low.

important,one can not connect by resistor directly as there is the
voltage difference between them and the capacitor has the DC
stopper function.

makes Q4 "off" As the constant current source connected to Q4
base terminal has such the hysteresis characteristics of 20µA at
operation and 3µA at stopping.So the unstable operation is not
appeared even if the ON/OFF terminal voltage signal varies
slowly.

DURATION

AMP

2.5V

DET

F/B

500Ω3k6S1S~7.1V

~7.1V

DET

F/B3k500Ω1S6S

10S

1.2k

10.8k

10.8k

5.4k

M51995AP/FP

NO OPERATING

8V

2V

Fig.15 Waveform of CT terminal

Fig.16 shows the Icc versus Vcc in this timer-off duration.
In this duration the power is not supplied to IC from the third
winding of transformer but through from the resistor R1
connected toVcc line.
If the R1 shown in Fig.1 and 2 is selected adequate value,Vcc
terminal voltage will be kept at not so high or low but adequate
value,as the Icc versus Vcc characteristics has such the one
shown in Fig.16.

2.0

of primary and secondary in feed forward system.
The circuit diagram is quite similar to that of shunt regulator
type 431 as shown in Fig.17.As well known from Fig.17 and
Fig.18,the output of OP AMP has the current-sink ability,when
the DET terminal voltage is higher than 2.5V but it becomes
high impedance state when lower than 2.5V DET terminal and
F/B terminal have inverting phase characteristics each other,so
it is recommended to connect the resistor and capacitor in
series between them for phase compensation.It is very

Fig.17 Equivalent circuit diagram of
voltage detector

1.5

1.0

0.5

0

0

5 15 25

10 20

30

SUPPLY VOLTAGE Vcc(V)

Fig.16 Icc vs.Vcc in timer-off duration
of intermittent action circuit

To ground the CT terminal is recommended,when the
intermittent mode is not used.
In this case the oscillated frequency will become low but the IC
will neither stop the oscillation nor change to the intermittent

Voltage detector circuit(DET) section

The DET terminal can be used to control the output voltage
which is determined by the winding ratio of fly back transformer
in fly-back system or in case of common ground circuit

-

OP

+

Fig.18 Equivalent circuit diagram of
voltage detector

ON-OFF circuit section

Fig.19 shows the circuit diagram of ON-OFF circuit.The current
flown into the ON-OFF terminal makes the Q4 "on" and the
switching operation stop.On the other hand.the switching
operation will recover as no current flown into ON/OFF terminal

( / 27 )

17

SWITCHING REGULATOR CONTROL

MITSUBISHI (Dig./Ana. INTERFACE)

It is necessary that OVP state holds by circuit current from R1 in
the application example,so this IC has the characteristic of
small Icc at the OVP reset supply voltage(~stand-by current +
20µA)
On the other hand,the circuit current is large in the higher
supply voltage,so the supply voltage of this IC doesn't become
so high by the voltage drop across R1.
This characteristic is shown in Fig.23.
The OVP terminal input current in the voltage lower than the
OVP threshold voltage is based on I2 and the input current in
the voltage higher than the OVP threshold voltage is the sum of
the current flowing to the base of Q3 and the current flowing
from the collector of Q2 to the base.
For holding in the latch state,it is necessary that the OVP
terminal voltage is kept in the voltage higher than VBE of Q3.
So if the capacitor is connected between the OVP terminal and
GND,even though Q2 turns on in a moment by the surge
voltage,etc,this latch action does not hold if the OVP terminal
voltage does not become higher than VBE of Q3 by charging
this capacitor.
For resetting OVP state,it is necessary to make the OVP
terminal voltage lower than the OVP L threshold voltage or
make Vcc lower than the OVP reset supply voltage.
As the OVP reset voltage is settled on the rather high voltage of

9.0V,SMPS can be reset in rather short time from the switch-off
of the AC power source if the smoothing capacitor is not so
large value.

M51995AP/FP

Fig.20 shows how to connect the ON/OFF terminal.The
switching operation will stop by swich-off and operate by switch­on.
Transistor or photo transistor can be replaced by this switch,of
course.No resistor of 30 to 100kΩ is connected and ON/OFF
terminal is directly connected to GND,when it is not necessary
to use the ON/OFF operation.
Fig.21 shows the Icc versus Vcc characteristics in OFF state
and Vcc will be kept at not so high or low but at the adequate
voltage,when R1 shown in Fig.1 and 2 is selected properly.

ON/OFF

OPERATE STOP AT Q4 ON
I:3µA AT STOPPING
I:20µA AT OPERATING

Fig.19 ON/OFF circuit

Vcc

2k

Q2

Q3

Q4

I

OVP circuit(over voltage protection circuit)section

OVP circuit is basically positive feedback circuit constructed by
Q2,Q3 as shown in Fig.22.
Q2,Q3 turn on and the circuit operation of IC stops,when the
input signal is applied to OVP terminal.(threshold voltage ~
750mV)
The current value of I2 is about 150µA when the OVP does not
operates but it decreases to about 2µA when OVP operates.
It is necessary to input the sufficient larger current(800µA to
8mA)than I2 for triggering the OVP operation.
The reason to decrease I2 is that it is necessary that Icc at the
OVP rest supply voltage is small.

30k~100kΩ

Fig.20 Connecting of ON/OFF terminal

1.6

1.2

0.8

0.4

0

0

5 15 25

10 20

SUPPLY VOLTAGE Vcc(V)

Fig.21 Icc vs.Vcc in OFF state

M51995A

ON/OFF

30

( / 27 )

18

SWITCHING REGULATOR CONTROL

and Cvcc is in the range of 10 to 47µF.The product of
R1 by Cvcc causes the time delay of operation,so the response
time will be long if the product is too much large.

Design of start-up circuit and the power supply
of IC

Vcc

GND

VccR1VF

CVcc

MAIN TRANSFORMER

SMOOTHING CAPACITOR

I1=0 when OVP operates

OVP

GND

8k

12k

MITSUBISHI (Dig./Ana. INTERFACE)

M51995AP/FP

Output section

7.8V
100µA

I1

Q1

Q2

400

Q3

2.5k

I2

It is required that the output circuit have the high sink and
source abilities for MOS-FET drive.It is well known that the
"totempole circuit has high sink and source ability.However,it
has the demerit of high through current.
For example,the through current may reach such the high
current level of 1A,if type M51995A has the "conventional"
totempole circuit.For the high frequency application such as
higher than 100kHz,this through current is very important factor
and will cause not only the large Icc current and the inevitable
heat-up of IC but also the noise voltage.
This IC uses the improved totempole circuit,so without
deteriorating the characteristic of operating speed,its through
current is approximately 100mA.

APPLICATION NOTE OF TYPE M51995AP/FP

Fig.22 Detail diagram of OVP circuit

8

OVP RESET POINT

8.82V(-30°C)

7

8.97V(25°C)

9.07V(85°C)

6

5

4

3

2

1

0

5

0

SUPPLY VOLTAGE Vcc(V)

Fig.23 CIRCUIT CURRENT VS. SUPPLY VOLTAGE

Ta=-30°C

Ta=25°C
Ta=85°C

10 15

(OVP OPERATION)

20

25 30 35 40

(1)The start-up circuit when it is not necessary to set the
start and stop input voltage

Fig.24 shows one of the example circuit diagram of the start-up
circuit which is used when it is not necessary to set the start
and stop voltage.
It is recommended that the current more than 300µA flows
through R1 in order to overcome the operation start-up current
Icc(START)

RECTIFIED DC
VOLTAGE FROM

THIRD WINDING OR
BIAS WINDING

M51995A

necessary to set the start and stop input voltage

Fig.24 Start-up circuit diagram when it is not

Just after the start-up,the Icc current is supplied from
Cvcc,however,under the steady state condition ,IC will be
supplied from the third winding or bias winding of
transformer,the winding ratio of the third winding must be
designed so that the induced voltage may be higher than the
operation-stop voltage Vcc(STOP).
The Vcc voltage is recommended to be 12V to 17V as the
normal and optimum gate voltage is 10 to 15V and the output
voltage(VOH) of type M51995AP/FP is about(Vcc-2V).

( / 27 )

19

SWITCHING REGULATOR CONTROL

MITSUBISHI (Dig./Ana. INTERFACE)

,and the high gate
drive voltage causes high gate dissipation,on the other hand,too
low gate drive voltage does not make the MOS-FET fully on­state or the saturation state.

To design the conductor-pattern on PC board,following cautions
must be considered as shown in Fig.26.
(a)To separate the emitter line of type M51995A from the GND
line of the IC
(b)The locate the CVCC as near as possible to type M51995A
and connect directly
(c)To separate the collector line of type M51995A from the Vcc
line of the IC
(d)To connect the ground terminals of peripheral parts of ICs to
GND of type M51995A as short as possible

GND

VccR1VF

CVcc

OF TRANSFORMER

SMOOTHING CAPACITOR

NP

NB

GND

Vcc

COLLECTOR

EMITTER

CVcc

OUTPUT

VIN

R2

M51995AP/FP

It is not necessary that the induced voltage is settled higher
than the operation start-up voltage Vcc(START)

RECTIFIED DC
VOLTAGE FROM

PRIMARY WINDING

THIRD WINDING OF
TRANSFORMER

M51995A

Fig.25 Start-up circuit diagram when it is not
necessary to set the start and stop input voltage

(2)The start-up circuit when it is not necessary to set the
start and stop input voltage

It is recommend to use the third winding of "forward winding"
or "positive polarity" as shown in Fig.25,when the DC source
voltages at both the IC operation start and stop must be settled
at the specified values.
The input voltage(VIN(START)),at which the IC operation starts,is
decided by R1 and R2 utilizing the low start-up current
characteristics of type M51995AP/FP.
The input voltage(VIN(STOP)),at which the IC operation stops,is
decided by the ratio of third winding of transformer.
The VIN(START) and VIN(STOP) are given by following equations.

It is required that the VIN(START) must be higher than VIN(STOP).
When the third winding is the "fly back winding" or "reverse
polarity",the VIN(START) can be fixed,however,VIN(STOP) can not
be settled by this system,so the auxiliary circuit is required.

(3)Notice to the Vcc,Vcc line and GND line

To avoid the abnormal IC operation,it is recommended to
design the Vcc is not vary abruptly and has few spike
voltage,which is induced from the stray capacity between the
winding of main transformer.
To reduce the spike voltage,the Cvcc,which is connected
between Vcc and ground,must have the good high frequency
characteristics.

MAIN
TRANSFORMER
THIRD
WINDING

M51995A

RCLM

Fig.26 How to design the conductor-pattern of type
M51995A on PC board(schematic example)

VIN(START) R1 • ICCL + ( + 1) • Vcc(START)

VIN(STOP) (Vcc(STOP)-VF) •

~

~

R1
R2

NP
NB

1

+

2

V'IN RIP(P-P)

where

ICCL is the operation start-up current of IC
Vcc(START) is the operation start-up voltage of IC
Vcc(STOP) is the operation stop voltage of IC
VF is the forward voltage of rectifier diode
V'IN(P-P) is the peak to peak ripple voltage of

NB

Vcc terminal

~

V'IN RIP(P-P)

NP

...............(9)

..........(10)

(4)Power supply circuit for easy start-up

When IC start to operate,the voltage of the CVCC begins to
decrease till the CVCC becomes to be charged from the third
winding of main-transformer as the Icc of the IC increases
abruptly.In case shown in Fig.24 and 25,some "unstable start­up" or "fall to start-up" may happen, as the charging interval of
CVCC is very short duration;that is the charging does occur only
the duration while the induced winding voltage is higher than
the CVCC voltage,if the induced winding voltage is nearly equal
to the "operation-stop voltage" of type M51995.
It is recommended to use the 10 to 47µF for CVCC1,and about 5
times capacity bigger than CVCC1 for CVCC2 in Fig.27.

( / 27 )

20

SWITCHING REGULATOR CONTROL

MITSUBISHI (Dig./Ana. INTERFACE)

CVcc1

CVcc2

GND

Vcc

R1

OVP

GND

Vcc

CVcc

GND

Vcc

forcedly and

to make the Vcc low value.This makes the OVP-reset time fast.

R1R2GND

Vcc

TRANSFORMER

CFIN

Cvcc

THIS PART SHOULD BE SHORT

470Ω

OVP

M51995AP/FP

MAIN
TRANSFORMER
THIRD
WINDING

M51995A

Fig.27 DC source circuit for stable start-up

OVP circuit

(1)To avoid the miss operation of OVP

It is recommended to connect the capacitor between OVP
terminal and GND for avoiding the miss operation by the spike
noise.
The OVP terminal is connected with the sink current source
(~150µA) in IC when OVP does not operate,for absorbing the
leak current of the photo coupler in the application.
So the resistance between the OVP terminal and GND for leak­cut is not necessary.
If the resistance is connected,the supply current at the OVP
reset supply voltage becomes large.
As the result,the OVP reset supply voltage may become higher
than the operation stop voltage.
In that case,the OVP action is reset when the OVP is triggered
at the supply voltage a little high than the operation stop
voltage.
So it should be avoided absolutely to connect the resistance
between the OVP terminal and GND.

~

THE TIME CONSTANT OF

Fig.29 Example circuit diagram to make the
OVP-reset-time fast

M51995A

FIG.30 OVP setting method using the induced
third winding voltage on fly back system

TO MAIN

M51995A

MAIN
TRANSFORMER
THIRD
WINDING

10k

M51995A

PHOTO COUPLER

Fig.28 Peripheral circuit of OVP terminal

(2)Application circuit to make the OVP-reset time fast

The reset time may becomes problem when the discharge time
constant of CFIN • (R1+R2) is long. Under such the circuit
condition,it is recommended to discharge the CVCC

(3)OVP setting method using the induced third winding
voltage on fly back system

For the over voltage protection (OVP),the induced fly back type
third winding voltage can be utilized,as the induced third
winding voltage depends on the output voltage.Fig.30 shows
one of the example circuit diagram.

( / 27 )

21

SWITCHING REGULATOR CONTROL

Current limiting circuit

GND

Vcc

R1

Cvcc

CAPACITOR

CFIN

COLLECTOR

CLM+

VOUT

EMITTER

CNF

RCLM

GND

Vcc

R1

Cvcc

CAPACITOR

CFIN

COLLECTOR

CLM+

VOUT

EMITTER

CNF

RCLM

I1I2RCLM

CLM

IP1

IP2I1I2

OUTPUT CURRENT

(1)Peripheral circuit of CLM+,CLM- terminal

Fig.31 and 32 show the example circuit diagrams around the
CLM+ and CLM- terminal.It is required to connect the low pass
filter,as the main current or drain current contains the spike
current especially during the turn-on duration of MOS-FIT.
1,000pF to 22,000pF is recommended for CNF and the RNF1
and RNF2 have the functions both to adjust the "current­detecting-sensitivity" and to consist the low pass filter.

INPUT
SMOOTHING

MITSUBISHI (Dig./Ana. INTERFACE)

M51995AP/FP

(a) Feed forward system

M51995A

RNF1

RNF2

Fig.31 Peripheral circuit diagram of CLM+ terminal

INPUT
SMOOTHING

M51995A

RNF2

RNF1

Fig.32 Peripheral circuit diagram of CLM- terminal

To design the RNF1 and RNF2,it is required to consider the
influence of CLM terminal source current(IINCLM+ or INFCLM-),
which value is in the range of 90 to 270µA.
In order to be not influenced from these resistor paralleled value
of RNF1 and RNF2,(RNF1/RNF2)is recommended to be less than
100Ω.
The RCLM should be the non-inductive resistor.

(2)Over current limiting curve
(a)In case of feed forward system

Fig.33 shows the primary and secondary current wave-forms
under the current limiting operation.
At the typical application of pulse by pulse primary current
detecting circuit,the secondary current depends on the primary
current.As the peak value of secondary current is limited to
specified value,the characteristics curve of output voltage
versus output current become to the one as shown in Fig.34.

(b) Primary and secondary current

Fig.33 Primary and secondary current waveforms
under the current limiting operation
condition on feed forward system

Fig.34 Over current limiting curve on feed forward
system

The demerit of the pulse by pulse current limiting system is that
the output pulse width can not reduce to less than some value
because of the delay time of low pass filter connected to the
CLM terminal and propagation delay time TPDCLM from CLM
terminal to output terminal of type M51995A.The typical TPDCLM
is 100ns.
As the frequency becomes higher,the delay time must be
shorter.And as the secondary output voltage becomes
higher,the dynamic range of on-duty must be wider;it means
that it is required to make the on-duration much more narrower.
So this system has the demerit at the higher oscillating
frequency and higher output voltage applications.
To improve these points,the oscillating frequency is set low
using the characteristics of VF terminal.When the current
limiting circuit operates under the over current condition,the
oscillating frequency decreases in accordance with the
decrease of VF terminal voltage,if the VF is lower than

3.5V.And also the dead time becomes longer.

( / 27 )

22

SWITCHING REGULATOR CONTROL

Under the condition of current limiting operation,the output

and the
on-duty.
If the third winding polarity is positive ,the Vcc depends on
VIN,so it is concluded that the smoothed voltage of VOUT
terminal depends on the output DC voltage of the SMPS.
So the sharp current limiting characteristics will be got,if the
VOUT voltage if feed back to VF terminal through low pass filter
as shown in Fig.35.

Fig.35 Feed back loop through low pass filter from
VOUT to VF terminal

VOUT

RVFFB

CVFFB

VF

Fig.36 shows how to control the knee point where the frequency
becomes decrease.

FROM

VOUT

TO VF

FROM

VOUT

TO VF

FROM

VOUT

TO VF

POINT HIGH

POINT LOW

type M51995A when the polarity of the third winding is negative
and the system is fly back.So the operation of type M51995A
will stop when the Vcc becomes lower than "Operation-stop
voltage" of M51995A when the DC output voltage of SMPS
decreases under specified value at over load condition.

DC OUTPUT CURRENT

VOLTAGE"

terminal as shown in Fig.38,as the induced third winding voltage
depends on the DC output voltage of SMPS.
15kΩ or less is recommended for R2 in Fig.38,it is noticed that
the current flows through R1 and R2 will superpose on the
Icc(START) current.
If the R1 is connected to Cvcc2 in Fig.27,the current flows
through R1 and R2 is independent of the Icc(START).

CVcc

Vcc

Fig.38 Circuit diagram to make knee point low on
fly back system

R1R2VF

COLLECTOR

limiting function starts,and VF terminal voltage decreases below
VTHTIME(~3V).
If the charged-up CT terminal voltage is applied to OVP terminal
through the level-shifter consisted of buffer transistor and
resistor,it makes type M51995A keep non-operating condition.

current I2 continues as shown in Fig.33.So the output voltage
depends on the product of the input primary voltage VIN

M51995A

MITSUBISHI (Dig./Ana. INTERFACE)

M51995AP/FP

POINT THAT Vcc VOLTAGE
OR THIRD WINDING
VOLTAGE DECREASES
UNDER "OPERATION-STOP

Fig.37 Over current limiting curve on fly back system

However,the M51995A will non-operate and operate
intermittently,as the Vcc voltage rises in accordance with the
decrease of Icc current.
The fly back system has the constant output power
characteristics as shown in Fig.37 when the peak primary
current and the operating frequency are constant.
To control the increase of DC output current,the operating
frequency is decreased using the characteristics of VF terminal
when the over current limiting function begins to operate.
The voltage which mode by dividing the Vcc is applied to VF

It is recommended to use 15kΩ for RVFFB,and 10,000pF for
CVFFB in Fig.35.

TO MAKE THE KNEE

TO MAKE THE KNEE

Fig.36 How to control the knee point

(b)In case of fly back system

The DC output voltage of SMPS depends on the Vcc voltage of

M51995A

(c)Application circuit to keep the non-operating condition
when over load current condition will continue for
specified duration

The CT terminal voltage will begin to rise and the capacitor
connected to CT terminal will be charged-up,if the current

( / 27 )

23

SWITCHING REGULATOR CONTROL

M51995A

current condition will continue for specified

duration

CTCTOVP

Vcc

)
(It means that the terminal is "Output low state" and please refer
characteristics of output low voltage versus sink current.)
This characteristics has the merit not to damage the MOS-FIT
at the stop of operation when the Vcc voltage decreases lower
than the voltage of Vcc(STOP),as the gate charge of MOS­FIT,which shows the capacitive load characteristics to the
output terminal,is drawn out rapidly.
The output terminal has the draw-out ability above the Vcc
voltage of 2V,however,lower than the 2V,it loses the ability and
the output terminal potential may rise due to the leakage
current.
In this case, it is recommended to connect the resistor of 100kΩ
between gate and source of MOS-FIT as shown in Fig.40.

RCLM

VOUT

100kΩ

charge makes the gate power dissipation.The relation between
gate drive current ID and total gate charge QGSH is shown by
following equation;

MOS-FIT,the power dissipation caused by the gate current can
not be neglected.
In this case,following action will be considered to avoid heat
up of type M51995A.
(1) To attach the heat sink to type M51995A
(2) To use the printed circuit board with the good thermal
conductivity
(3) To use the buffer circuit shown next section

123

VDS=80V

VDS=200V

VDS=320V

DRAIN

GATE

SOURCE

CGS

CGD

CDS

VGSVDID

Fig.39 Application circuit diagram to keep the
non-operating condition when over load

MITSUBISHI (Dig./Ana. INTERFACE)

M51995AP/FP

20

15

10

5

ID=4A

Output circuit

(1)The output terminal characteristics at the Vcc voltage
lower than the "Operation-stop" voltage

TO MAIN
TRANSFORMER

M51995A

Fig.40 Circuit diagram to prevent the MOS-FIT gate
potential rising

The output terminal has the current sink ability even though the
Vcc voltage lower than the "Operation-stop" voltage or Vcc(STOP

0

0 4

8 12 16

20

TOTAL STORED GATE CHARGE(nC)

Fig.41 The relation between applied gate-source
voltage and stored gate charge

The charging and discharging current caused by this gate

ID=QGSH • fOSC

.....................................(11)

Where

fOSC is switching frequency

As the gate drive current may reach up to several tenths
milliamperes at 500kHz operation,depending on the size of

(3)Output buffer circuit

It is recommended to use the output buffer circuit as shown in
Fig.42,when type M51995A drives the large capacitive load or
bipolar transistor.

(2)MOS-FIT gate drive power dissipation

Fig.41 shows the relation between the applied gate voltage
and the stored gate charge.
In the region 1 ,the charge is mainly stored at CGS as the
depletion is spread and CGD is small owing to the off-state of
MOS-FIT and the high drain voltage.
In the region 2 ,the CGD is multiplied by the "mirror effect" as
the characteristics of MOS-FIT transfers from off-state to on­state.
In the region 3 ,both the CGD and CGS affect to the
characteristics as the MOS-FIT is on-state and the drain
voltage is low.

( / 27 )

24

SWITCHING REGULATOR CONTROL

MITSUBISHI (Dig./Ana. INTERFACE)

VOUT

C1CF/B

DETC4R2BR1R3C2

VOLTAGE

1

2

1

2

GAVDET

(DC VOLTAGE GAIN)

G112

Log

Please take notice that the current flows through the R1 and R2
are superposed to Icc(START).Not to superpose,R1 is connected
to Cvcc2 as shown in Fig.27.

F/B

COUPLER

100Ω

C

120µA

PULSE

Q2Q1ROFFCFRON

T-ONCFT-OFFCT0V

0V

PULSE

SYNCHRONOUS PULSE

M51995AP/FP

Not to lack the output pulse,is recommended to connect the
capacitor C4 as shown by broken line.

M51995A

Fig.42 Output buffer circuit diagram

DET

Fig.43 shows how to use the DET circuit for the voltage detector
and error amplifier.
For the phase shift compensation,it is recommended to
connected the CR network between det terminal and F/B
terminal.

DETECTING

M51995A

Fig.43 How to use the DET circuit for the voltage
detector

Fig.44 shows the gain-frequency characteristics between point
B and point C shown in Fig.43.
The G1, and are given by following equations;

R3

G1=

=

=

At the start of the operation,there happen to be no output pulse
due to F/B terminal current through C1 and C2,as the potential
of F/B terminal rises sharply just after the start of the operation.

.............................................(11)

R1/R2

1

C2 • R3

C1 • C2 • R3

............................................(12)

C1 + C2

....................................(13)

How to get the narrow pulse width during the
start of operation

Fig.45 shows how to get the narrow pulse width during the start
of the operation.If the pulse train of forcedly narrowed pulse­width continues too long,the misstart of operation may
happen,so it is recommended to make the output pulse width
narrow only for a few pulse at the start of operation.0.1µF is
recommended for the C.

M51995A

TO PHOTO

Fig.45 How to get the narrow pulse width

during the start of operation

How to synchronize with external circuit

Type M51995A has no function to synchronize with external
circuit,however,there is some application circuit for
synchronization as shown in Fig.46.If this circuit is used,the
synchronization may be out of order at the overload condition
when the current limiting function starts to operate and VF
terminal voltage becomes lower than 3V.

M51995A

SYNCHRONOU
S

Fig.44 Gain-frequency characteristics between
point B and C shown in Fig.43

MINIMUM PULSE
WIDTH OF
SYNCHRONOUS

Fig.46 How to synchronize with external circuit

( / 27 )

25

MAXIMUM PULSE WIDTH OF

SWITCHING REGULATOR CONTROL

M51995A

GND

EMITTER

of IC package is 15°C or less,when the IC junction temperature is
measured by temperature dependency of forward voltage of pin
junction,and IC package temperature is measured by "thermo­viewer",and also the IC is mounted on the "phenol-base" PC
board in normal atmosphere.
So it is concluded that the maximum case temperature(surface
temperature of IC) rating is 120°C with adequate margin.
As type M51995 has the modified totempole driver circuit, the
transient through current is very small and the total power
dissipation is decreased to the reasonable power level.Fig.49
shows the transient rush (through)current waveforms at the rising
and falling edges of output pulse,respectively.

VOUT

COLLECTOR

Vcc

Vcc

-Vss

(-2V to -5V)

GND

EMITTER

VOUT

COLLECTOR

Vcc

TRANSISTOR

Fig.47 Driver circuit diagram (1) for bipolar transistor

Driver circuit for bipolar transistor

When the bipolar transistor is used instead of MOS-FIT,the
base current of bipolar transistor must be sinked by the
negative base voltage source for the switching-off duration,in
order to make the switching speed of bipolar transistor fast one.
In this case,over current can not be detected by detecting
resistor in series to bipolar transistor,so it is recommended to
use the CT(current transformer).
For the low current rating transistor,type M51995A can drive it
directly as shown in Fig.48.

Attention for heat generation

The maximum ambient temperature of type M51995A is
+85°C,however,the ambient temperature in vicinity of the IC is
not uniform and varies place by place,as the amount of power
dissipation is fearfully large and the power dissipation is
generated locally in the switching regulator.
So it is one of the good idea to check the IC package
temperature.
The temperature difference between IC junction and the surface

MITSUBISHI (Dig./Ana. INTERFACE)

M51995AP/FP

M51995A

Fig.48 Driver circuit diagram (2) for bipolar transistor

BIPOLAR

H-Axis : 20ns/div
V-Axis : 50mA/div

AT RISING EDGE OF OUTPUT PULSE

H-Axis : 20ns/div
V-Axis : 10mA/div

AT RISING EDGE OF OUTPUT PULSE

Fig.49 Through current waveform of totempole driver
circuit at no-load and Vcc of 18V condition

( / 27 )

26

SWITCHING REGULATOR CONTROL

APPLICATION EXAMPLE

COLLECTOR

VOUTVFON/OFF

Vcc

Feed forward types SMPS with multi-output.

MITSUBISHI (Dig./Ana. INTERFACE)

M51995AP/FP

AC

CFIN

M51995AP

CF

A

VOUT2

R1

A

VOUT1

R2

Cvcc

OVP

CT

F/B

ROFFRON

ON/OFF

( / 27 )

27