Datasheet M37211M2-XXXSP, M37210M4-XXXSP, M37210M3-XXXSP, M37210M3-XXXFP, M37210E4SP Datasheet (Mitsubishi)

26

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25

28

24

29

23

30

22

31

21

32

20

33

19

34

18

35

17

36

16

37

15

38

14

39

13

40

12

41

11

42

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9

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8

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50

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1

52

M37210M3-XXXSP

M37210M4-XXXSP

M37211M2-XXXSP

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

DESCRIPTION

The M37210M3-XXXSP/FP is a single-chip microcomputer designed
with CMOS silicon gate technology. It is housed in a 52-pin shrink
plastic molded DIP or a 64-pin plastic molded QFP. This single-chip
microcomputer is useful for the channel selection system for TVs
because it provides PWM function, OSD display function and so on.
In addition to their simple instruction sets, the ROM, RAM, and I/O
addresses are placed on the same memory map to enable easy pro­gramming.
The features of the M37210E4-XXXSP/FP and the M37210E4SP/FP
are similar to those of the M37210M4-XXXSP except that these
chips have a built-in PROM which can be written electrically.
The differences between the M37210M3-XXXSP/FP, the M37210
M4-XXXSP, and the M37211M2-XXXSP are the ROM size, the RAM
size, and the PWM outputs as shown below. Accordingly, the follow­ing descriptions will be for the M37210M3-XXXSP/FP unless other­wise noted.

Type name

M37210M3-XXXSP/FP

M37210M4-XXXSP
M37211M2-XXXSP

ROM size
12 K bytes
16 K bytes
8 K bytes

RAM size
256 bytes
320 bytes
192 bytes

6-bit PWM outputs

8
8
6

Note : After the reset, set the stack page selection bit which is set “1”

to “0” because the internal RAM of the M37211M2-XXXSP is
in only the zero page.

FEATURES

Number of basic instructions .....................................................69

•

Memory size ROM ................ 12 K bytes (M37210M3-XXXSP/FP)

•

RAM................. 256 bytes (M37210M3-XXXSP/FP)

ROM for display......................................... 3 K bytes

RAM for display.......................................... 72 bytes

The minimum instruction execution time

•

........................................... 0.5µs (at 8MHz oscillation frequency)

Power source voltage..................................................... 5V ± 10%

•

Pow er dissipation .............................................................. 110mW

•

(at 4MHz oscillation frequency, V

Subroutine nesting ............................................... 96 levels (Max.)

•

Interrupts ....................................................... 12 types, 12 vectors

•

8-bit timers .................................................................................. 4

•

Programmable I/O ports

•

(Ports P0, P1, P2, P3, P4) ......................................................... 25

Output ports (ports P5, P6) ..........................................................8

•

Output ports (ports P52, P56).....................................................12

•

12 V withstand ports ....................................................................4

•

Serial I/O ............................................................ 8-bit ✕ 1 channel

•

PWM output circuit ............... (14-bit ✕ 1, 6-bit ✕ 8) ... M37210M3

•

(14-bit ✕ 1, 6-bit ✕ 6).... M37211M2

1

16 K bytes (M37210M4-XXXSP)
8 K bytes (M37211M2-XXXSP)

320 bytes (M37210M4-XXXSP)
192 bytes (M37211M2-XXXSP)

CC = 5.5V, at CRT display)

M37210M4

PIN CONFIGURATION (TOP VIEW)

HSYNC

VSYNC
P60/PWM0
P6

1/PWM1

P6

2/PWM2

P6

3/PWM3

P0

0/PWM4

P0

1/PWM5

P0

2/PWM6

P0

3/PWM7

P4

2/SIN/A-D5

P4

1/SCLK

P40/SOUT (/IN)

P3

5/INT2/A-D4

P3

4/INT1

P3

3/TIM3

P3

2/TIM2

CNVSS

XOUT

D-A

P2
P25
P26
P27

XIN

VSS

→
→
←
←
←
←
↔
↔
↔
↔
→
↔
↔
←
→
→
→
→
↔

4

↔
↔
↔
→
→
←

→

P52/R

→

P5

→

P5

→

P5

↔

P2

↔

P21

↔

P22

↔

P23

↔

P04

↔

P05

↔

P06

↔

P07

↔

P10

↔

P11

↔

P12

↔

P13

↔

P14

←

P15/A-D1

←

P1

←

P1

↔

P3

↔

P31

←

RESET

←

OSC1

→

OSC2
V

3/G
4/B
5/OUT
0

6/A-D2
7/A-D3
0

CC

Outline 52P4B

Note : The M37211M2-XXXSP does not have the PWM6 and the PWM7.

A-D comparator (5-bit resolution) ................................ 5 channels

•

CRT display function

•

Display characters.....................................18 characters ✕ 2 lines

(16 lines max.)

Character kinds ................................................................ 96 kinds

Dot structure ............................................................. 12 ✕ 16 dots

Character size .................................................................... 3 kinds

Character color kinds (It can be specified by the character)

max. 7 kinds (R, G, B)
Raster color (max. 7 kinds)
Display layout

Horizontal ..................................................................... 64 levels

Vertical ....................................................................... 128 levels

Bordering (horizontal and vertical)

APPLICATION

TV

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

PIN CONFIGURATION (TOP VIEW)

MITSUBISHI MICROCOMPUTERS

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

/A-D1

/A-D2

/A-D3

5

6

P22P23P04P05P06P07P10NC

P11P12P13P14NC

P1

P1

7

P1

P2

NC

P2

P55 /OUT

P54 /B

3 /G

P5

2 /R

P5

NC
NC

SYNC

H
VSYNC

P60 /PWM0
P62 /PWM2

NC

3 /PWM3

P6

484746454443424140393837363534

49

1

50
51

0

52
53
54
55
56
57
58
59
60
61

P61 /PWM1

62
63
64

M37210M3-XXXFP

123456789

CLK

NC

/S

/A-D5

1

/PWM6

/PWM7

2

3

P0

P0

IN

/S

2

P4

P4

/PWM5

/PWM4

1

0

P0

P0

Outline 64P6N-A

10111213141516

)

IN

D-A

/(/

/INT1

4

OUT

P3

/S

0

/INT2/A-D4

5

P4

P3

/TIM3

/TIM2

3

2

P3

P3

P2

4P25P26

33

32

P30

31

NC

30

1

P3

29

RESET

28

OSC1

27

OSC2

26

Vcc

25

NC

24

NC

23

SS

V

22

XOUT

21

XIN

20



CNVSS

19

P27

18

NC
NC

17

NC : No connection

2

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

R
G

29 28

YSYNC OSC1OSC2

12

HSYNC

14

14-bit PWM circuit

6-bit PWM circuit

PWM0
PWM1
PWM2
PWM3

PWM4
PWM5
PWM6
PWM7

Control signal

Instruction decoder

CRT circuit

Instruction

register

SI/O(8)

B

OUT

P6(4)P3(6) P5(4)

SOUT
SCLK
SIN

CC VSS CNVSS D-A

V

(5V) (0V) (0V)

RESET

Reset input

Data bus

Timer count

Timer 1

source selection

circuit

T1 (8)

ROM

(Note 3)

12 K bytes

L(8)

Program

counter

PC

H(8)

Program

counter

PC

RAM

(Note 2)

256bytes

Timer 2

T2 (8)

TIM2

Timer 3

T3 (8)

Stack

pointer

Index

register Y

Index

register X

status

Processor

TIM3

(8)

(8)

(8)

PS(8)

register

Timer 4

T4 (8)

P4(3)

Interrupt interval

determination

circuit

INT1, INT2

INT1

INT2

compa-

A-D

rator

P2(8)P1(8)P0(8)

A-D5

A-D4

5

3

A-D3
A-D2
A-D1

Clock

output

24 25 30 27 26 23

Clock

input

XIN XOUT

Clock

generating

circuit

FUNCTIONAL BLOCK DIAGRAM of M37210M3-XXXSP

Address bus

Accumulator

8-bit

arithmetic

A(8)

and logical

unit

I/O port P0 I/O port P1 I/O port P2 I/O port P3 I/O port P4 Output port P6 Video signal output

4142434410 9 8 7 3334353637383940 2221201945464748 151617183132 111213 6 5 4 3 49505152

2 : 320 bytes for M37210M4-XXXSP and 192 bytes for M37211M2-XXXSP

3 : 16 K bytes for M37210M4-XXXSP and 8 K bytes for M37211M2-XXXSP

Notes 1 : The M37211M2-XXXSP does not have PWM outputs of pins 9 and 10.

3

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

FUNCTIONS

Parameter
Number of basic instructions
Instruction execution time
Clock frequency

M37210M3-XXXSP/FP

Memory size

Input/Output ports

Serial I/O
Timers
Subroutine nesting

Interrupt

Clock generating circuit
Power source voltage

Power dissipation

Operating temperature range
Device structure

Package

CRT display function

Note : The M37211M2-XXXSP can be also used as PWM4 and PWM5.

M37210M4-XXXSP

M37211M2-XXXSP
P0

P10 – P14
P15 – P17
P2
P30, P31
P32, P35
P40, P41
P42
P5
P6

at CRT display ON
at CRT display OFF
at stop mode

M37210M3-XXXSP, M37210M4-XXXSP, M37211M2-XXXSP
M37210M3-XXXFP
Number of character
Character dot construction
Kinds of characters
Character size
Kinds of color
Display position (horizontal, vertical)

Output
Output

ROM
RAM
ROM
RAM
ROM
RAM

I/O
I/O

Input

I/O
I/O

Input

I/O

Input

MITSUBISHI MICROCOMPUTERS

with ON-SCREEN DISPLAY CONTROLLER

Functions

69

0.5µs (the minimum instruction execution time, at 8MHz oscillation frequency)
8MHz
12 K bytes
256 bytes
16 K bytes
320 bytes
8 K bytes
192 bytes
8-bit ✕ 1 (can be used as N-channel open-drain output and PWM4-PWM7)(Note)
5-bit ✕ 1 (CMOS 3-state output)
3-bit ✕ 1 (can be used as A-D input)
8-bit ✕ 1 (CMOS 3-state output)
2-bit ✕ 1 (CMOS 3-state input/output)
4-bit ✕ 1 (can be used as timer input pins, INT input pins and A-D input pins)
2-bit ✕ 1 (can be used as N-channel open-drain output and serial I/O function pins)
1-bit ✕ 1 (can be used as serial I/O and A-D input)
4-bit ✕ 1 (can be used as R, G, B, OUT pins)
4-bit ✕ 1 (can be used as N-channel open-drain output and PWM0-PWM3 output pins)
8-bit ✕ 1
8-bit timer ✕ 4
96 levels (max.)

Two external interrupts, four internal timer interrupts,
one serial I/O interrupt, one CRT interrupt, one f(X
interrupt, one VSYNC interrupt, BRK instruction

Built-in circuit (externally connected a ceramic resonator or a quartz-crystal oscillator)
5V ± 10%
110mW (at 4MHz oscillation frequency, VCC = 5.5V, Typ.)
55mW (at 4MHz oscillation frequency, VCC = 5.5V, Typ.)

1.65mW (Max.)

−10 to 70°C
CMOS silicon gate process
52-pin shrink plastic molded DIP
64-pin plastic molded QFP
18 characters ✕ 2 lines : maximum 16 lines (by software)
12 ✕ 16 dots
96 kinds
3 kinds
7 kinds max, (R, G, B) : can be specified by character unit
64 levels (horizontal) ✕ 128 levels (vertical)

IN)/4096

4

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

PIN DESCRIPTION

Pin

CC,

V
VSS

CNVSS
RESET

XIN
XOUT

φ

P00 – P07

P11 – P14

P15 – P17

P20 – P27

P30, P31

P32 – P35

P40, P41

P42

P60 – P63

OSC1,
OSC2

HSYNC
VSYNC
R, G, B,

OUT
D-A

Name

Power source voltage

CNVSS
Reset input

Clock input
Clock output
Timing output

I/O port P0

I/O port P1

Input port P1

I/O port P2

I/O port P3

Input port P3

I/O port P4

Input port P4

Output port P6

Clock input for CRT
display
Clock output for CRT
display

SYNC input

H
VSYNC input
CRT output

DA Output

Input /

Output

Input

Input
Output
Output

I/O

I/O

Input

I/O

I/O

Input

I/O

Input

Output

Input
Output

Input

Input
Output

Output

MITSUBISHI MICROCOMPUTERS

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

Functions

Apply voltage of 5V ± 10% to V

This is connected to VSS.
To enter the reset state, the reset input pin must be kept at a “L” for 2µs or more (under nor-

mal VCC conditions).
If more time is needed for the crystal oscillator to stabilize, this “L” condition should be main­tained for the required time.

This chip has an internal clock generating circuit. To control gener ating frequency, an exter­nal ceramic resonator or a quartz-crystal oscillator is connected between the XIN and
XOUT pins. If an external clock is used, the clock source should be connected the XIN pin and
the XOUT pin should be left open.

This is the timing output pin.
Port P0 is an 8-bit I/O port with directional registers allowing each I/O bit to be individually

programmed as input or output. At reset, this port is set to input mode. The output structure
is CMOS output.
The output structure is N-channel open-drain output. When PWM4, PWM5, PWM6 and
PWM7 are used, P00, P01, P02 and P03 are in common with PWM output pins of PWM4,
PWM5, PWM6 and PWM7.

Ports P10, P11, P12, P13 and P14 are 5-bit I/O ports and have basically the same functions
as port P0. The output structure is CMOS output.

Ports P15, P16 and P17 are 3-bit input ports and they are in common with input pins of A-D
comparator (A-D1, A-D2 and A-D3).

Port P2 is an 8-bit I/O port and has basically the same functions as port P0.
The output structure is CMOS output.

Ports P30 and P31 are 2-bit I/O ports and have basically the same functions as port P0.
The output structure is CMOS output.

Ports P32, P33, P34 and P35 are 4-bit input ports and ports P32 and P33 are in common
with external clock input pins of timers 2 and 3. Ports P34 and P35 are in common with
external interrupt input pins INT1 and INT2. Port P35 is in common with an input pin of A-D
comparator (A-D4).

Ports P40 and P41 are 2-bit I/O ports and have basically the same functions as port P0.
When serial I/O is used, ports P40 and P41 are in common with SOUT pin and SCLK pin, re­spectively.

Port P42 is an 1-bit Input port, and it is common with an input pin of A-D comparator (A-D5)
and serial input pin (SIN).

Port P6 is an 4-bit output port. The output structure is N-channel open-drain. This port is in
common with 6-bit PWM output pins PWM0-PWM3.

This is the I/O pins of the clock generating circuit for the CRT display function.

This is the horizontal synchronizing signal input for CRT display.
This is the vertical synchronizing signal input for CRT display.
This is a 4-bit output pin for CRT display. The output structure is CMOS output. This is in

common with port P52 – P55.
This is an output pin for 14-bit PWM.

CC, and 0V to VSS.

5

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

FUNCTIONAL DESCRIPTION
Central Processing Unit (CPU)

The M37210M3-XXXSP/FP uses the standard 740 family instruction
set. Refer to the table of 740 family addressing modes and machine
instructions or the SERIES 740 〈Software〉 User’s Manual for details
on the instruction set.
Machine-resident 740 family instructions are as follows :
The FST and SLW instruction cannot be used.
The MUL, DIV, WIT, and STP instruction can be used.

70

0011111

Note : Please beware of this bit when programming because it is set to “1” after the reset release.

Especially the internal RAM of the M37211M2-XXXSP is in the zero page, so be sure to set this bit to “0”.

Fig. 1 Structure of CPU mode register

CPU Mode Register

The CPU mode register is allocated at address 00FB16. The CPU
mode register contains the stack page selection bit.

CPU mode register
(CPUM : address 00FB16)

Fix these bits to “002”
Stack page selection bit (Note)

0 : Zero page
1 : 1 page

Fix these bits to “11112”

6

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

MEMORY
Special Function Register (SFR) Area

The special function register (SFR) area in the zero page contains
control registers such as I/O ports and timers.

RAM

RAM is used for data storage and for stack area of subroutine calls
and interrupts.

ROM

ROM is used for sroring user programs as well as the interrupt vec­tor area.

RAM for Display

RAM for display is used for specifing the character codes and colors
to display.

ROM for Display

ROM for display is used for storing character data.

Fig. 2 Memory map

RAM

(320 bytes)

for

M37210M4

ROM

(16 K bytes)

for

M37210M4







RAM



(256 bytes)



for

M37210M3









RAM for display (Note)

ROM for display













ROM



(12 K bytes)



for



M37210M3














RAM



(192 bytes)




M37211M2












(72 bytes)

(3 K bytes)












(8 K bytes)




M37211M2









for

ROM

for



0000







00BF



00FF

013F
017F



2000






20B1




3000




35FF





3800



3DFF



C000
D000



E000









FF00








FFDE




FFFF



Interrupt Vector Area

The interrupt vector area contains reset and interrupt vectors.

Zero Page

The 256 bytes from addresses 000016 to 00FF16 are called the zero
page area. The inter nal RAM and the special function registers
(SFR) are allocated to this area.
The zero page addressing mode can be used to specify memory and
register addresses in the zero page area. Access to this area with
only 2 bytes is possible in the zero page addressing mode.

Special Page

The 256 bytes from addresses FF0016 to FFFF16 are called the spe­cial page area. The special page addressing mode can be used to
specify memory addresses in the special page area. Access to this
area with only 2 bytes is possible in the special page addressing
mode.

16

16

16

16
16

16

16

16
16

16
16

16

16

16

16

16
16

SFR area

Not used

Not used

Not used

Not used

Interrupt vector area

Note : Refer to Table 6. Contents of CRT display RAM







Zero page











Special page







7

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

00C016
00C116
00C216
00C316
00C416
00C516
00C616
00C716
00C816
00C916
00CA16
00CB16
00CC16
00CD16
00CE16
00CF16
00D016
00D116
00D216
00D316
00D416
00D516
00D616
00D716
00D816
00D916
00DA16
00DB16
00DC16
00DD16
00DE16
00DF16

Port P0
Port P0 directional register
Port P1
Port P1 directional register
Port P2
Port P2 directional register
Port P3
Port P3 directional register
Port P4
Port P4 directional register
Port P5
Port P5 control register
Port P6
Port P6 directional register
14DA-H register
14DA-L register
PWM0 register
PWM1 register
PWM2 register
PWM3 register
PWM4 register
PWM output control register 1
PWM output control register 2
Interrupt
Interrupt

Serial I/O mode register
Serial I/O register

determination register

Interval

determination control register

Interval

00E016
00E116
00E216
00E316
00E416
00E516
00E616
00E716
00E816
00E916
00EA16
00EB16
00EC16
00ED16
00EE16
00EF16
00F016
00F116
00F216
00F316
00F416
00F516
00F616
00F716
00F816
00F916
00FA16
00FB16
00FC16
00FD16
00FE16
00FF16

Horizontal position register
Vertical position register 1 (block 1)

Vertical position register 2 (block 2)

Character size register

Border selection register

Color register 0

Color register 1

Color register 2

Color register 3

CRT control register

CRT port control register

A-D mode register
A-D control register
Timer 1
Timer 2
Timer 3
Timer 4

Timer 12 mode register

Timer 34 mode register

PWM5 register
PWM6 register (Note)
PWM7 register (Note)

mode register

CPU
Interrupt request register 1
Interrupt request register 2
Interrupt control register1
Interrupt control register2

Note : The M37211M2-XXXSP dose not have this register

Fig. 3 Memory map of special function register (SFR )

8

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

INTERRUPTS

Interrupts can be caused by 12 different sources consisting of 3 ex­ternal, 7 internal, 1 software, and reset.
Interrupts are vectored interrupts with priorities shown in Table 1. Re­set is also included in the table because its operation is similar to an
interrupt.
When an interrupt is accepted, the registers are pushed, interrupt
disable flag I is set, and the program jumps to the address specified
in the vector table. The interrupt request bit is cleared automatically.
The reset can never be disabled. Other interrupts are disabled when
the interrupt disable flag is set.

Table 1. Interrupt vector addresses and priority

Interrupt sources
Reset
CRT interrupt
INT2 interrupt
INT1 interrupt
Timer 4 interrupt
f(XIN)/4096 interrupt
VSYNC interrupt
Timer 3 interrupt
Timer 2 interrupt
Timer 1 interrupt
Serial I/O interrupt
BRK instruction interrupt

Priority

1
2
3
4
5
6
7
8

9
10
11
12

Vector addresses
FFFF
FFFD16, FFFC16
FFFB16, FFFA16
FFF916, FFF816
FFF516, FFF416
FFF316, FFF216
FFF116, FFF016
FFEF16, FFEE16
FFED16, FFEC16
FFEB16, FFEA16
FFE916, FFE816
FFDF16, FFDE16

All interrupts except the BRK instruction interrupt have an interrupt
request bit and an interrupt enable bit. The interrupt request bits are
in interrupt request registers 1 and 2 and the interrupt enable bits are
in interrupt control registers 1 and 2. Figure 4 shows the structure of
the interrupt request registers 1 and 2 and interrupt control registers
1 and 2.
Interrupts other than the BRK instruction interrupt and reset are ac­cepted when the interrupt enable bit is “1”, interrupt request bit is “1”,
and the interrupt disable flag is “0”. The interrupt request bit can be
reset with a program, but not set. The interrupt enable bit can be set
and reset with a program.
Reset is treated as a non-maskable interrupt with the highest priority.
Figure 5 shows interrupts control.

Remarks

16, FFFE16

Non-maskable

Active edge selectable
Active edge selectable

Active edge selectable

Non-maskable software interrupt

9

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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

70

Interrupt request register 1
(IREQ1 : address 00FC16)

Timer 1 interrupt request bit
Timer 2 interrupt request bit
Timer 3 interrupt request bit
Timer 4 interrupt request bit
CRT interrupt request bit
V

SYNC

interrupt request bit

70

Interrupt control register 1
(ICON1 : address 00FE

Timer 1 interrupt enable bit
Timer 2 interrupt enable bit
Timer 3 interrupt enable bit
Timer 4 interrupt enable bit
CRT interrupt enable bit
V

SYNC

interrupt enable bit

Fix these bits to “0”

70
0

0 : No interrupt request issued
1 : Interrupt request issued

70
00000

16

)

0 : Interrupt disabled
1 : Interrupt enabled

Interrupt request register 2
(IREQ2 : address 00FD

INT1 interrupt request bit
INT
Serial I/O1 interrupt request bit

f(X
Fix this bit to “0”

Interrupt control register 2
(ICON2 : address 00FF16)

INT1 interrupt enable bit
INT
Serial I/O1 interrupt enable bit
Fix this bit to “0”
f(X
Fix these bits to “0”

16

2

interrupt request bit

IN

)/4096 interrupt request bit

2

interrupt enable bit

IN

)/4096 interrupt enable bit

)

Fig. 4 Structure of interrupt-related registers

Interrupt request bit
Interrupt enable bit

Interrupt disable flag (I)

Fig. 5 Interrupt control

BRK instruction
reset

interrupt request

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MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

TIMERS

The M37210M3-XXXSP has 4 timers: timer 1, timer 2, timer 3 and
timer 4. All timers are 8-bit timers with the 8-bit timer latch. The timer
block diagram is shown in Figure 7.
All of the timers count down and their divide ratio is 1/(n+1), where n
is the value of timer latch. The value is set to a timer at the same time
by writing a count value to the corresponding timer latch (addresses
00F0

16 to 00F316 : timers 1 to 4).

The count value is decremented by 1. The timer interrupt request bit
is set to “1” by an timer overflow at the next count pulse after the
count value reaches “00

16.”

(1) Timer 1

Timer 1 can select one of the following count sources:

f(XIN)/16

•

f(XIN)/4096

•

The count source of timer 1 is selected by setting bit 0 of the timer 12
mode register (address 00F4
Timer 1 interrupt request occurs at timer 1 overflow.

16).

(2) Timer 2

Timer 2 can select one of the following count sources:

f(XIN)/16

•

Timer 1 overflow signal

•

External clock from the P32/TIM2 pin

•

The count source of timer 2 is selected by setting bits 4 and 1 of the
timer 12 mode register (address 00F4
signal is a count source for the timer 2, the timer 1 functions as an 8­bit prescaler.
Timer 2 interrupt request occurs at timer 2 overflow.

16). When timer 1 overflow

(3) Timer 3

Timer 3 can select one of the following count sources:

f(XIN)/16

•

External clock from the P33/TIM3 pin and the HSYNC pin

•

The count source of timer 3 is selected by setting bits 5 and 0 of the
timer 34 mode register (address 00F5
Timer 3 interrupt request occurs at timer 3 overflow.

16).

(4) Timer 4

Timer 4 can select one of the following count sources:

f(XIN)/16

•

f(XIN)/2

•

Timer 3 overflow signal

•

The count source of timer 3 is selected by setting bits 4 and 1 of the
timer 34 mode register 2 (address 00F5
signal is a count source for the timer 4, the timer 3 functions as an 8­bit prescaler.
Timer 4 interrupt request occurs at timer 4 overflow.

16). When timer 3 overflow

set bit 0 of the timer 34 mode register (address 00F5
the execution of the STP instruction (f(X
3 count source). The internal STP state is released by timer 4 over­flow at these state, the internal clock is connected .
Because of this, the program starts with stable clock.
The structure of timer-related registers is shown in Figure 6.

70

Timer 12 mode register
(TM12MR : address 00F4

Timer 1 count source selection bit
0 : f (X
1 : 1024µs clock

Timer 2 count source selection bit
0 : Internal clock source
1 :

Timer 1 count stop bit
0 : Operation
1 : Stop

Timer 2 count stop bit
0 : Operation
1 : stop

Timer 2 internal count source
selection bit
0 : f (X
1 : Timer 1 overflow signal

Fix this bit to “0”

70

Timer 34 mode register
(TM34MR : address 00F5

Timer 3 count source selection bit
0 : f (X
1 : External clock source (bits)

Timer 4 internal count source
selection bit
0 : Timer 3 overflow signal
1 : f (X

Timer 3 count stop bit
0 : Operation
1 : Stop

Timer 4 count stop bit
0 : Operation
1 : Stop

Timer 4 count source selection bit
0 : Internal clock source
1 : f (X

IN)16 is selected as the timer

IN

) /16

External clock source from

IN

) /16

IN

) /16

IN

) /16

IN

) /2

16) to “0” before

16

)

P32/TIM2

pin

16

)

At reset, timers 3 and 4 are connected by hardware and “FF
automatically set in timer 3; “07
lected as the timer 3 count source. The internal reset is released by
timer 4 overflow at these state, the internal clock is connected .
At execution of the STP instruction, timers 3 and 4 are connected by
hardware and “FF
However, the f(X

16” is automatically set in timer 3; “0716” in timer 4.

IN)16 is not selected as the timer 3 count source. So

16” in timer 4. The f(XIN)/16 is se-

16” is

Timer 3 external count source
selection bit

3

0 : P3
1 : H

SYNC

Fig. 6 Structure of timer-related registers

/TIM3 pin input

pin input

11

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

Data bus

8

XIN

P32/TIM2

HSYNC

P33/TIM3

1/2 1/8

D.F.

D.F.

1/4096

T12M0

T12M4

T12M1

T12M3

T34M5

T12M2

Timer 1 latch (8)

8

Timer 1 (8)

Timer 2 latch (8)

8

Timer 2 (8)

Timer 3 latch (8)

8

8

8

8

8

FF16

Timer 1
interrupt request

Timer 2
interrupt request

Reset
STP instruction

T34M0

T34M2

T34M1

Timer 4 latch (8)

T34M

4








Selection gate : Connected to black
colored side at reset.

T12M : Timer 12 mode register
T34M : Timer 34 mode register

Notes 1 : “H” pulse width of external clock inputs TIM2 and TIM3 needs 4 machine cycles or more.

2 :When the external clock source is selected, timers 2 and 3 are counted at a rising edge of input signal.
3 :In the stop mode or the wait mode, external clock inputs TIM2 and TIM3 cannot be used.








T34M3

Fig. 7 Timer block diagram

Timer 3 (8)

8

Timer 4 (8)

Timer 3
interrupt request

8

8

0716

Timer 4
interrupt request

8

12

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

SERIAL I/O

M37210M3-XXXSP has a serial I/O.
A block diagram of the serial I/O is shown in Figure 8.
Synchronous input/output clock (S
S

IN) are used as port P4. The serial I/O mode registers (address

00DC

16) are 8-bit registers. Bits 0, 1 and 2 of these registers are

used to select a synchronous clock source.

XIN

P41 latch

P4

1/SCLK

P40 latch

P40/SOUT

P42/SIN








CLK), and the serial I/O pins (SOUT,

1/2 1/2

Synchronization

circuit

SM3

SM

5 : LSB

3

SM

SM6

Selection gate : Connected to black
colored side at reset.

↔

Bit 3 decides whether parts of P4 will be used as a serial I/O or not.
To use P4

2 as a serial input, set the directional register bit which cor-

responds to P4
ter, refer to the I/O pin section.
The serial I/O function is discussed below. The function of the serial
I/O differs depending on the clock source ; external clock or internal
clock.

SM2

Serial I/O counter (8)

MSB

Serial I/O shift register (8)

(address 00DD








2 to “0”. For more information on the directional regis-

Data bus

Frequency

divider

1/4 1/8 1/16

SM1
SM0

Serial I/O

interrupt request

16)

8

Fig. 8 Serial I/O block diagram

13

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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

The serial I/O counter is set to 7 when data is stored in the serial I/O
register. At each falling edge of the transfer clock, serial data is out­put to S

OUT. During the rising edge of this clock, data can be input

from S

IN and the data in the serial I/O register will be shifted 1 bit.

T r ansfer direction can be selected by bit 5 of serial I/O mode register.
After the transfer clock has counted 8 times, the serial I/O register will
be empty and the transfer clock will remain at a high le v el. At this time
the interrupt request bit will be set.
External clock- If an external clock is used, the interrupt request will
be sent after the transfer clock has counted 8 times but transfer clock
will not stop.
Due to this reason, the external clock must be controlled from the
outside. The external clock should not exceed 1MHz at a duty cycle

Sync. clock

Transfer clock

Serial I/O register

write signal

Serial I/O output

SOUT

Serial I/O input

SIN

D0 D1 D2 D3 D4 D5 D6 D7

of 50%. The timing diagram is shown in Figure 9. When using an ex­ternal clock for transfer, the external clock must be held at “H” level
when the serial I/O counter is initialized. When switching between the
internal clock and external clock, the switching must not be per­formed during transfer. Also, the serial I/O counter must be initialized
after switching.
Notes 1: On programming, note that the serial I/O counter is set by

writing to the serial I/O register with the bit managing in­structions as SEB and CLB instructions.

2: When an external clock is used as the synchronizing clock,

write transmit data to the serial I/O register at “H” of the
transfer clock input level.

(Note 1)

Notes 1 : If internal clock is selected, the Sout pin is at high impedance after transfer is completed.

2 : When an external clock is used as the synchronous clock, write the transmit data to the

serial I/O shift register at “H” of the transfer clock input level.

Fig. 9 Serial I/O timing (for LSB first)

Interrupt request bit set

14

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

70

Serial l/O mode register
(SM : address 00DC16)

Internal synchronous clock
selection bits
00 : f (XIN) /4 
01 : f (XIN) /16
10 : f (XIN) /32
11 : f (XIN) /64
Synchronous clock selection bit
0 : External clock
1 : Internal clock
Serial l/O port selection bit
0 : P40, P41
1 : SOUT1,SCLK signal output pins

Fix this bit to “0”
Transfer direction selection bit

0 : LSB first
1 : MSB first

Serial input pin selection bit
0 : Input from SIN pin
1 : Input from SOUT pin

MITSUBISHI MICROCOMPUTERS

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

Serial I/O common transmission/reception mode.
Write 1 to bit 6 of serial I/O mode register, and signals S
switch internal to be able to serial data transmission/reception.
Figure 11 shows signals on serial I/O common transmission/recep­tion mode.
Note : Receive the serial data after writing “FF

register.

IN and SOUT

16” to the serial I/O

Fig. 10 Structure of serial I/O mode register

P41/SCLK

P40/SOUT (/IN)

P4

2/SIN

Fig. 11 Signals on serial I/O common transmission/reception mode

Input or output The transmission mode

“1”

6

SM

“0”

The reception mode

clock1

Serial I/O shift register

Port P42 data

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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

PWM OUTPUT CIRCUIT
(1) Introduction

The M37210M3-XXXSP/FP and M37210M4-XXXSP are
equipped with one 14-bit PWM (DA) and eight 6-bit PWMs
(PWM0-PWM7), and the M37211M2-XXXSP is equipped with
six 6-bit PWMs (PWM0-PWM5). The 14-bit resolution gives DA
the minimum resolution bit width of 500ns (for f(X
and a repeat period of 8192µs. PWM0-PWM7 have a 6-bit reso­lution with minimum resolution bit width of 16ms and repeat pe­riod of 1024µs.
Block diagram of the PWM is shown in Figure 16.
The PWM timing generator section applies individual control
signals to DA and PWM0-7 using clock input X
as a reference signal.

IN) = 4MHz)

IN divided by 2

(2) Data Setting

The output pins PWM0-3 are in common with port P6 and
PWM4-7 are in common with port P0
For PWM output, each PWM output selection bit (bit 1 to 7 of
PWM output control register 1, bit 0, 1 of PWM output control
register 2, should be set. When DA is used for output, first set
the higher 8-bit of the DA-H register (address 00CE
lower 6-bit of the DA-L register (address 00CF
When one of the PWM0-7 is used for output, set the 6-bit in the
PWM0-7 register (address 00D0
00F8

16), respectively.

0-P03.

16), then the

16).

16 to 00D416, 00F616 to

(3) Transferring Data from Registers to PWM

Circuit

The data written to the PWM registers. 8 bits of the DA-H regis­ter is transferred to 14-bit PWM circuit when writing to lower 6
bits of the DA-L register.

(4) Operation of the 6-bit PWMs

The timing diagram of the eight 6-bit PWMs (PWM0-7) is shown
in Figure 13. One period (T) is composed of 64 (2
There are six different pulse types configured from bits 0 to 5
representing the significance of each bit. These are output

6

) segments.

within one period in the circuit internal section. Refer to Figure
13 (a).
Six different pulses can be output from the PWM.
These can be selected by bits 0 through 5. Depending on the
content of the 6-bit PWM latch, pulses from 5 to 0 are selected.
The PWM output is the difference of the sum of each of these
pulses. Several examples are shown in Figure 13 (b). Changes
in the contents of the PWM latch allows the selection of 64
lengths of high-level area outputs varying from 0/64 to 63/64. A
length of entirely high-level output cannot be output, i.e. 64/64.

(5) 14-bit PWM Operation

The output example of the 14-bit PWM is shown in Figure 14.
The 14-bit PWM divides the data within the PWM latch into the
lower 6 bits and higher 8 bits.
A high-level area within a length D
area of t = 256 τ =128µs as determined by data D
8 bits.
Thus, the time for the high-level area is equal to the time set by
the lower 8 bits or that plus τ. As a result, the short-area period
t ( = 128µs, approx. 7.8 kHz) becomes an approximately repeti­tive period.

H times τ is output every short

H of the higher

(6) Output after Reset

At reset the output of port P6 is in the high impedance state and
the contents of the PWM register and latch are undefined. Note
that after setting the PWM register, its data is transferred to the
latch.

Table 2. Relation between the low-order 6 bits of data and high-level

area increase space

6 low-order bits of data

0 0 0 0 0 0
0 0 0 0 0 1

0 0 0 0 1 0
0 0 0 1 0 0
0 0 1 0 0 0
0 1 0 0 0 0
1 0 0 0 0 0

Area longer by τ than that of other tm (m = 0 to 63)

LSB

Nothing
m = 32
m = 16, 48
m = 8, 24, 40, 56
m = 4, 12, 20, 28, 36, 44, 52, 60
m = 2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46, 50, 54, 58, 62

m = 1, 3, 5, 7, ................................................... 57, 59, 61, 63

16

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M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

Data bus

DA-H register
(address 00CE16)

bit 7 bit 0

(14-bit)

MSB

8

XIN

PWM0 register
(address 00D016)

bit 5

8

6-bit PWM circuit

6

14-bit PWM circuit

1/2

PW0

DA-L register

(address 00CF16)

14

Timing

generator

for PWM

bit 0

PN3










LSB

6

PN4

PW

D60

DA

1

D-A

PWM0

PN2

P60

Selection gate : connected to black
colored side at reset.

Pass gate










PW2

P61

D61

PWM1

PW3

P62

D62

PW4

P63

D63

PW5

P00

D00

PW6

P01

D01

PW7

P02

D02

PN0

P03

D03

PN1

Note : The M37211M2-XXXSP can not output the PWM.

Inside of is as same contents with the others.

PWM2

PWM3

PWM4

PWM5

PWM6(Note)

PWM7(Note)

PW : PWM output control register 1
PN : PWM output control register 2
D0 : Port P0 direction register
P0 : Port P0
D6 : Port P6 directional register
P6 : Port P6

Fig. 12 PWM block diagram

17

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M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

13579 19 39 59

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

00
(0)

0116
(1)

0616
(24)

3F16
(63)

2 6 10 14 18 22 26 30 34 38 42 46 50 54 58 62

4 12202836445260

8

16 48

16

24

32

(a) Pulses showing the weight of each bit

T = 64t

PWM output t = 10µs T = 1024µs

f (XIN) = 4MHz

40

56

Fig. 13 6-bit PWM timing

(b) Example of 6-bit PWM output

18

MITSUBISHI MICROCOMPUTERS

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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

Set “2C16” to DA-H register Set “2816” to DA-L register

[DA-H register]

“H” level area of

()

fundamental waveform

Fundamental
waveform

14-bit

PWM output

8-bit
counter

001011 00

bit 7

[DA latch]

These bits decide “H”

of fundamental waveform

Minimum bit

= ✕

()(

durations 0.5µs

0.5µs ✕ 44 0.5µs ✕ 45

2C 2B 2A 03 02 01 00

FF FE FD D6 D5 D4 D3 02 01 00

…

… …

bit 0

After writing of DA-L

bit 13 bit 0

00101100101 000

level area

High-order 8 bit
value of DA latch

[DA-L register]

These bits decide smaller intervals tm in which “H”

[“H” level area of fundamental waveform plus r]

is

10 010 0

bit 0

After writing

)

Waveform of smaller intervals tm specified by the lower 6 bits

0.5µs

14-bit

PWM output

8-bit
counter

2C 2B 2A 03 02 01

FF FE FD D6 D5 D4 D3 02 01 00

…

…

00

…

level area

The fundamental waveform of smaller intervals
tm which is not specified by the lower 6 bits is
not changed

14-bit PWM output

t0 t1 t2 t3 t4 t5 t59 t60 t61 t62 t63

Low-order 6-bit
output of DA latch

Fig. 14 14-bit PWM output example (f (XIN) = 4MHz)

0.5µs ✕ 45

µs

τ = 0.5

T = 8192µs

19

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

70

PWM output control register 1
(PW : address 00D5

DA, PWM count source STOP bit 
0 : Supply
1 : Stop

DA/PN4 output selection bit 
0 : DA (14-bit PWM) output
1 : PN4 (general-purpose) output

P60/PWM0 output selection bit 
0 : P60 (general-purpose) output
1 : PWM0 (6-bit PWM) output

P6

1/PWM1 output selection bit 

0 : P61 (general-purpose) output
1 : PWM1 (6-bit PWM) output

2/PWM2 output selection bit 

P6
0 : P62 (general-purpose) output
1 : PWM2 (6-bit PWM) output

P6

3/PWM3 output selection bit 

0 : P63 (general-purpose) output
1 : PWM3 (6-bit PWM) output

0/PWM4 output selection bit 

P0
0 : P00 (general-purpose) output
1 : PWM4 (6-bit PWM) output

16)

70

PWM output control register 2
(PN : address 00D616)

2/PWM6 output selection bit (Note) 

P0
0 : P02 (general-purpose) output
1 : PWM6 (6-bit PWM) output

3/PWM7 output selection bit (Note) 

P0
0 : P03(general-purpose) output
1 : PWM7 (6-bit PWM) output

DA output polarity selection bit 
0 : Positive polarity
1 : Negative polarity

6-bit PWM output polarity selection bit 
0 : Positive polarity
1 : Negative polarity

D-A pin general-purpose output register
0 : Output “L”
1 : Output “H”

P01/PWM5 output selection bit 
0 : P01 (general-purpose) output
1 : PWM5 (6-bit PWM) output

Note : Fix this bit to “0” (M37211M2-XXXSP).

Fig.15 Structure of PWM output control registers 1 and 2

20

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

A-D COMPARATOR

Block diagram of A-D comparator is shown in Figure 18. A-D com­parator consists of 5-bit D-A converter and comparator. The A-D con­trol register can generate 1/64 V
based on the settings of bits 0 to 4.
Table 3 gives the relation between the descriptions of A-D control
register bits 0 to 4 and the generated internal analog voltage. The
comparison result of the analog input voltage and the internal analog
voltage is stored in the A-D control register, bit 5.
After selection of an analog input pin by bits 0-2 of A-D mode register
(address 00EE
log voltage to be compared is then written in the A-D control register,
bit 0 to 3 and an analog input pin is selected. After 16 machine cycle,
the voltage comparison is completed.

70

16), the digital value corresponding to the internal ana-

CC-step internal analog voltage

A-D mode regiser
(ADM : address 00EE

16)

MITSUBISHI MICROCOMPUTERS

with ON-SCREEN DISPLAY CONTROLLER

70

A-D control register
(ADC : address 00EF

D-A converter set bits 
(refer to table 3)

Strage bit of comparison result
0 : Input voltage <
reference voltage
1 : Input voltage >
reference voltage

Fig. 16 Structure of A-D control register

Table 3. Relationship between the contents of A-D control register

and reference voltage

A-D control register

Bit4

Bit 3
0
0
0

Bit 2

Bit 1

Bit 0

0

0

0

0

0

0

0

0

1

Reference voltage Vref

0
1
0

16)

1/64 VCC
3/64 VCC
5/64 VCC

A-D input pin selection bits
0 0 0 : A-D1
0 0 1 : A-D2
0 1 0 : A-D3
0 1 1 : A-D4
1 0 0 : A-D5
1 0 1 : 
1 1 0 : 
1 1 1 :

Fig. 17 Structure of A-D mode register

A-D mode register

5/A-D1

P1
P16/A-D2

7/A-D3

P1

5/A-D4

P3

2/A-D5

P4







Bits 0 to 2

Analog
signal
switch

These are not
available

Comparator control

Data bus

Comparator

……………………

……………………

1

1

1

1

1

1

Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Bit 5

……………………

……………………

1

0

1

1

1

1

A-D control register

……………………
1
0
1

27/64 VCC
29/64 VCC
31/64 VCC

……………………

Fig. 18 A-D comparator block diagram

Switch tree

Resistor ladder

21

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

CRT DISPLAY FUNCTIONS
(1) Outline of CRT Display Functions

T able 4 outlines the CRT display functions of the M37210M3-XXXSP.
The M37210M3-XXXSP incorporates a 18 columns ✕ 2 lines CRT
display control circuit. CRT display is controlled by the CRT display
control register.
Up to 96 kinds of characters can be displayed, and colors can be
specified for each character. Four colors can be displayed on one
screen. A combination of up to 7 colors can be obtained by using
each output signal (R, G and B).
Characters are displayed in a 12 ✕ 16 dot configuration to obtain
smooth character patterns (refer to Figure 19).
The following shows the procedure how to display characters on the
CRT screen.

Table 4. Outline of CRT display functions

Parameter

Number of display
character

Character
configuration

Kinds of character
Character size

Kinds of color

Color

Coloring unit
Display expansion
Raster coloring

18 characters ✕ 2 lines

12 ✕ 16 dots (refer to Figure 19)
96

3 kinds
1 screen : 4 kinds
A character
Possible (multiline display)
Possible (maximum 7 kinds)

12 dots

Functions

➀ Set the character to be displayed in display RAM.
➁ Set the display color by using the color register.
➂ Specify the color register in which the display color is set by us-

ing the display RAM.

➃ Specify the vertical position and character size b y using the verti-

cal position register and the character size register.

➄ Specify the hor izontal position by using the horizontal position

register.

➅ Write the display enable bit to the designated bloc k display flag of

the CRT control register. When this is done, the CRT starts op-

eration according to the input of the V
The CRT display circuit has an extended display mode.
This mode allows multiple lines (more than 3 lines) to be displayed
on the screen by interrupting the display each time one line is dis­played and rewriting data in the block for which display is terminated
by software.
Figure 21 shows a block diagram of the CRT display control circuit.
Figure 20 shows the structure of the CRT display control register.

70

CRT control register
(CC : address 00EA

Display of all blocks control bit
0 : Display of all blocks off
1 : Display of all blocks on

Display of block 1 control bit
0 : Display of block 1 off
1 : Display of block 1 on

SYNC signal.

16)

(Note)

Fig. 19 CRT display character configuration

Display of block 2 control bit
0 : Display of block 2 off
1 : Display of block 2 on

Note : Display is controlled by logical product (AND) between the all-

blocks display control bit and each block display control bit

Fig. 20 Structure of CRT control register

16 dots

22

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

(Address 00EA16)

CRT control register

Addresses 00E116 to 00E216)

(

Vertical position registers

16

(Address 00E4

Character size register

(Address 00E0

Horizontal position register

(Address 00E5

Border selection register

)

16

)

16

)

OSC1 OSC2 H

Display oscillation

circuit

Display position control circuit

SYNC

V

SYNC

(Addresses 00E6
to 00E916)

Data bus

RAM for display 

9 bits × 18 × 2

16

Color registers

(Address 00EC

CRT port control register

16

)

ROM for display
12 bits × 16 × 96

Shift register

12 bits

Output circuit

R G B OUT

Display control

circuit

Shift register

12 bits

Fig. 21 Block diagram of CRT display control circuit

23

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

(2) Display Position

The display positions of characters are specified in units called a
“block”. There are two blocks, block 1 and block 2.
Up to 18 characters can be displayed in one block (refer to (4)
Memory for Display).
The display position of each block in both horizontal and vertical di­rections can be set by software.
The horizontal direction is common to all blocks, and is selected from
64-step display positions in units of 4Tc (Tc = oscillating cycle f or dis­play).
The display position in the vertical direction is selected from 128-step
display positions for each block in units of four scanning lines.
Block 2 is displayed after the display of block 1 perfectly (fig. 24(a)).
Then if the display of block 2 starts during the display of block 1, only
block 1 is displayed. As same, when multiline display, block 1 is dis­played after the display of block 2 perfectly (fig. 24(b)).
The vertical position can be specified from 128-step positions (four
scanning lines per step) for each block by setting values 00
to bits 0 to 6 in the vertical position register (addresses 00E116 and
00E2

15). Figure 22 shows the structure of the vertical position regis-

ter.

16 to 7F16

MITSUBISHI MICROCOMPUTERS

with ON-SCREEN DISPLAY CONTROLLER

70

Vertical position registers 1, 2
(CV1 : address 00E116)
(CV2 : address 00E216)

The vertical display start positions
128-step positions (0016 to 7F16)

Fig. 22 Structure of vertical position registers

The horizontal direction is common to all blocks, and can be speci­fied from 64-step display positions (4Tc per step (Tc = oscillating
cycle for display) by setting values 00
horizontal position register (address 00E0
structure of the horizontal position register.

70

Horizontal position register
(HR : address 00E016)


The horizontal display start positions
64-step positions (0016 to 3F16)

16 to 3F16 to bits 0 to 5 in the

16). Figure 23 shows the

Fig. 23 Structure of horizontal position register

24

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

(RH)

(a) Example when each block is separated

CV

CV1

1

CV2

CV2

Block 1

Block 2

Block 1

Block 2

No display

(b) Example when block 2 overlaps with block 1

Fig. 24 Display position

CV1

Block 1 (second)

No display

25

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

(3) Character Size

The size of characters to be displayed can be selected from three
sizes for each block. Use the character size register (address
00E4

16) to set a character size. The character size in block 1 can be

specified by using bits 0 and 1 in the character size register ; the
character size in block 2 can be specified by using bits 2 and 3. Fig­ure 25 shows the structure of the character size register.
The character size can be selected from three sizes : small size, me­dium size and large size. Each character size is determined by the
number of scanning lines in the height (vertical) direction and the
cycle of display oscillation ( = Tc) in the width (horizontal) direction.
The small size consists of [one scanning line] ✕ [1 Tc] ; the medium
size consists of [two scanning lines] ✕ [2 Tc] ; and the large size con­sists of [three scanning lines] ✕ [3 Tc].
Table 5 shows the relationship between the set values in the charac­ter size register and the character sizes.

MITSUBISHI MICROCOMPUTERS

with ON-SCREEN DISPLAY CONTROLLER

70

Character size register
(CS : address 00E416)

Character size of block 1 selection bits
00 : Minimum size
01 : Medium size
10 : Large size
11 : This is not available

Character size of block 2 selection bits
00 : Minimum size
01 : Medium size
10 : Large size
11 : This is not available

Fig. 25 Structure of character size register



Table 5. The relationship between the set values of the character size register and the character sizes

Set values of the character size register

CSn

CSn1

0
0
1
1

Note : The display start position in the horizontal direction is not affected by the character size. In other words, the horizontal display start position is common to

all blocks even when the character size varies with each block (refer to Figure 26).

0

0
1
0
1

Character

size

Minimum

Medium

Large

Width (horizontal) direction

Tc : oscillating cycle for display

1 Tc
2 Tc
3 Tc

This is not available

Height (vertical) direction

scanning lines

1
2
3

26

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

(4) Memory for Display

There are two types of memory for display : R OM of CRT display (ad­dresses 3000
ter dot data (masked) and display RAM (addresses 2000
20B1
following describes each type of display memory.

➀ ROM for display (addresses 3000

3DFF

The CRT display ROM contains dot pattern data f or characters to be
displayed. For characters stored in this ROM to be actually dis­played, it is necessary to specify them by writing the character code
inherent to each character (code determined based on the ad­dresses in the CRT display ROM) into the CRT display RAM.

16 to 35FF16, 380016 to 3DFF16) used to store charac-

16 to

16) used to specify the colors of characters to be displayed. The

16 to 35FF16 and 380016 to

16)

Minimum

Medium

The CRT display ROM has a capacity of 3K bytes. Because 32 bytes
are required for one character data, the ROM can contain up to 96
kinds of characters.
The CRT display ROM space is broadly divided into two areas. The
[vertical 16 dots] × [horizontal (left side) 8 dots] data of display char­acters are stored in addresses 3000
dots] × [horizontal (right side) 4 dots] data of display characters are
stored in addresses 3800
ever that the four upper bits in the data to be written to addresses
3800

16 to 3DFF16 must be set to “1” (by writing data F016 to FF16).

Table 6. Character code list

Character code

0016

0116

0216

16 to 3DFF16 (refer to Figure 27). Note how-

Contained up address of character data

Left 8 dots lines

300016
300F16
301016
301F16
302016
302F16

16 to 35FF16 ; the [vertical 16

Right 4 dots lines

380016

to

380F16
381016

to

381F16
382016

to

382F16

to

to

to

Large

Horizontal display start position

Fig. 26 Display start position of each character size

(horizontal direction)

0316

:

1016

1116

:

4F16

5016

:

5D16

5E16

5F16

303016

to

303F16

:

310016

to

310F16

311016

to

311F16

:

34F016

to

34FF16

350016

to

350F16

:

35D016

to

35DF16

35E016

to

35EF16
35E016

to

35FF16

383016

to

383F16

:

390016

to

390F16

391016

to

391F16

:

3CF016

to

3CFF16

3D0016

to

3D0F16

:

3DD016

to

3DDF16

3DE016

to

3DEF16
3DF016

to

3DFF16

27

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

The character code used to specify a character to be displayed is
determined based on the address in the CRT display ROM in which
that character is stored.
Assume that data for one character is stored at addresses 3XX0
3XXF

16 (XX denotes 0016 to 5F16) and addresses 3YY016 to 3YYF16

(YY denotes 8016 to DF16), then the character code for it is “XX16”.

bit 7

3XX016

3XXF16

00000000

0

0000100

0

000
0
0
0

0010 0000

0
0

1
0

1010

000

00

00

1

00

00000

10

10

00000001
000001 00
0000000
0000000
00000000

16 to

bit 0

00100000

0101

10001
10001
10000

11111

In other words, character code for any given character is configured
with two middle digits of the four-digit (hexnotated) addresses 300016
to 35FF16 where data for that character is stored.
Table 6 lists the character codes.

3XX016+80016

3XXF16+80016

bit 7

11110000

1
1
1
1
1

1111 0010

bit 3

1101000
111
111
11
11

1

11

1

11

1 11000

10100111
101111 00
1011001

1

1011000

1

10000111

bit 0

00001111

0000

0000

00001
00001
00001

0001111

Fig. 27 Display character stored area

28

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

➁ RAM for display (address 200016 to 20B116)

The CRT display RAM is allocated at addresses 2000
and is divided into a display character code specifying part and dis­play color specifying part for each block.
Table 7 shows the contents of the CRT display RAM.
When a character is to be displayed at the first character (leftmost)
position in block 1, for example, it is necessary to write the character
code to the seven low-order bits (bits 0 to 6) in address 2000
the color register No. to the two low-order bits (bits 0 and 1) in ad­dress 2080
four color registers in which the color to be displayed is set in ad­vance. For details on color registers, refer to (5) Color Registers.
The structure of the CRT display RAM is shown in Figure 27.

Table 7. The contents of the CRT display RAM

16. The color register No. to be written here is one of the

Block

Block 1

Block 2

Display position (from left)

1st character

2nd character

3rd character

:

16th character
17th character

18th character

Not used

1st character

2nd character

3rd character

:

16th character
17th character

18th character

Not used

16 to 20B116,

16 and

with ON-SCREEN DISPLAY CONTROLLER

Character code specification

200016

200116

200216

:

200F16
201016

201116

201216

:

201F16
202016

202116

202216

:

202F16
203016

203116

203216

:

203F16

MITSUBISHI MICROCOMPUTERS

Color specification

2080

16

208116

208216

:

208F16
209016

209116

209216

:

209F16
20A016

20A116
20A216

:

20AF16
20B016

20B116
20B216

:

20BF16

29

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

Block 1

[Character specification]
1st character : 200016

18th character : 201116

to

70

Character code (00
Specify 96 characters

16 to 5F16)

Block 2

[Color specification]
1st character : 208016

18th character : 209116

[Character specification]
1st character : 2020

18th character : 203116

[Color specification]
1st character : 20A016

18th character : 20B116

to

to

to

10

Specify color select mode
00 : Color register 0 specification

01 : Color register 1 specification
10 : Color register 2 specification
11 : Color register 3 specification

16

70

Character code (00
Specify 96 characters

10

Color register specification 
00 : Color register 0 specification

01 : Color register 1 specification
10 : Color register 2 specification
11 : Color register 3 specification

16 to 5F16)

Fig. 28 Structure of the CRT display RAM

30

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

(5) Color Registers

The color of a displayed character can be specified by setting the
color to one of the four color registers (CO0 to CO3 : addresses
00E6

16 to 00E916) and then specifying that color register with the

CRT display RAM.
There are three color outputs : R, G and B. By using a combination
of these outputs, it is possible to set 2
ors. However, because only four color registers are available, up to
four colors can be displayed at one time.
R, G and B outputs are set by using bits 1 to 3 in the color register.
Bit 5 is used to specify whether a character output or blank output.
Figure 29 shows the structure of the color register.

70

B signal output selection bit
0 : No character is output
1 : Character is output

G signal output selection bit
0 : No character is output
1 : Character is output

3

-1 (when no output) = 7 col-

Color registers 0,1,2,3
(CO0 : address 00E616)
(CO1 : address 00E716)
(CO2 : address 00E816)
(CO3 : address 00E916)


(6) Multiline Display

The M37210M3-XXXSP can normally display two lines on the CRT
screen by displaying two blocks at different vertical positions.
In addition, it allows up to 16 lines to be displayed by using a CRT
interrupt.
The CRT interrupt works in such a way that when display of one
block is terminated, an interrupt request is generated.
In other words, character display for a certain block is initiated when
the scanning line reaches the display position for that block (speci­fied with vertical position register) and when the range of that block
is exceeded, an interrupt is applied.

Note : A CRT interrupt does occurs at the end of display regardless

of display on or off. In other words, even if a block is set to off
display with the display control bit of the CRT control register
(address 00EA
Figure 30).

16), a CRT interrupt request occurs (refer to

R signal output selection bit
0 : No character is output
1 : Character is output

OUT signal output selection bit
0 : OUT pin outputs character 
1 : OUT pin outputs blank

Note : When the character bordering function is used, the contents

of this bit (bit 5) are invalied, and the OUT pin output be­comes a border output.

Fig. 29 Structure of color registers

(Note)

31

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

Block 1 (on display)

Block 2 (on display)

Block 1’ (on display)

Block 2’ (on display)

On display (“CRT interrupt” works after block)

Block 1 (off display)

Block 2 (off display)

Block 1’ (off display)

Block 2’ (off display)

Off display (“CRT interrupt” occurs after block)

“CRT interrupt”

“CRT interrupt”

“CRT interrupt”

“CRT interrupt”

“CRT interrupt”

“CRT interrupt”

“CRT interrupt”

“CRT interrupt”

(Note) : That is to say, “CRT interrupt” occurs even when it is off display by setting the display control flag of the CRT control

register (address 00EA

Fig. 30 Timing of CRT interrupt

16).

32

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

(7) Character Border Function

An border of a one clock (one dot) equivalent size can be added to a
character to be displayed in both horizontal and vertical directions.
The border is output from the OUT pin. In this case, bit 5 in the color
register (contents output from the OUT pin) is nullified, and the bor­der is output from the OUT pin instead.

Table 8. The relationship between the value set in the border selection register and the character border function

Border selection register

MDn0

0

1

Functions

Ordinary

Border including character

Border can be specified in units of block by using the border select
register (address 00E5
the values set in the border select register and the character border
function. Figure 32 shows the structure of the border select register.

70

16). Table 8 shows the relationship between

Example of output

R, G, B output
OUT output

R, G, B output
OUT output

Border selection register
(MD : address 00E516)


Block 1 OUT signal output border selection bit
0 : Same output as R, G, B is output
1 : Border output

is border.
is display by character data.

Fig. 31 Example of border

Block 2 OUT signal output border selection bit
0 : Same output as R, G, B is output
1 : Border output

Fig. 32 Structure of border selection register

33

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

(8) CRT Output Pin Control

CRT output pins R, G, B and OUT are respectively shared with port
P5

2, P53, P54 and P55. When the corresponding bits in the port P5

control register (address 00CB
for CRT output ; when the bits are set to “1”, the pins function as port
P5 (general- purpose output pins).
The polarities of CRT outputs (R, G, B and OUT, as well as H
and VSYNC) can be specified by using the CRT port control register
(address 00EC
Use bits 0 to 4 in the CRT port control register to set the output po­larities of H
cleared to “0”, a positive polarity is selected ; when the bits are set to
“1”, a negative polarity is selected.
Bits 5 to 7 in the CRT port control register are used to specify pin by
pin whether normal video signals or R-MUTE, G-MUTE, and B­MUTE signals are output from each pin (R, G, B). When set for R­MUTE, G-MUTE, and B-MUTE outputs, the whole background
colors of the screen become red, green, and blue.
Figure 33 shows the structure of the CRT port control register.

16).

SYNC, VSYNC, R/G/B and OUT. When these bits are

16) are cleared to “0”, the pins are set

SYNC

MITSUBISHI MICROCOMPUTERS

with ON-SCREEN DISPLAY CONTROLLER

70

Polarity register
(CRTP : address 00EC

SYNC input polarity selection bit

H
0 : Positive polarity
1 : Negative polarity

VSYNC input polarity selection bit
0 : Positive polarity
1 : Negative polarity

R/G/B output polarity selection bit
0 : Positive polarity
1 : Negative polarity

OUT output polarity selection bit
0 : Positive polarity
1 : Negative polarity

R pin output switch bit
0 : R signal output
1 : R-MUTE signal output

G pin output switch bit
0 : G signal output
1 : G-MUTE signal output

B pin output switch bit
0 : B signal output
1 : B-MUTE signal output

16)

Fig. 33 Structure of CRT port control register

34

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

INTERRUPT INTERVAL DETERMINATION FUNCTION

The M37210M3-XXXSP incorporates an interrupt interval determina­tion circuit. This interrupt inter val determination circuit has an 8-bit
binary up counter as shown in Figure 34.
Using this counter, it determines an interval or a pulse width on the
INT1 or INT2 (refer to Figure 36).
The following describes how the interrupt interval is determined.

1. The interrupt input to be determined (INT1 input or INT2 input) is
selected by using bit 2 in the interrupt interval determination con­trol register (address 00D8
INT1 input is selected ; when the bit is set to “1”, the INT2 input is
selected.

2. When the INT1 input is to be determined, the polarity is selected
by using bit 3 of the interrupt interval determination control regis­ter ; when the INT2 input is to be determined, the polarity is se­lected by using bit 4 of the interrupt interval determination control
register.
When the relevant bit is cleared to “0”, determination is made of
the interval of a positive polarity (rising transition) ; when the bit is
set to “1”, determination is made of the interval of a negative po-

16). When this bit is cleared to “0”, the

larity (falling transition).

3. The reference clock is selected by using bit 1 of the interrupt inter­val determination control register. When the bit is cleared to “0”, a
64ms clock is selected ; when the bit is set to “1”, a 32µ s clock is
selected (based on an oscillation frequency of 4MHz in either
case).

4. Simultaneously when the input pulse of the specified polarity (ris­ing or falling transition) occurs on the INT1 pin (or INT2 pin), the 8­bit binary up counter starts counting up with the selected
reference clock (64µs or 32µs).

5. Simultaneously with the next input pulse, the value of the 8-bit bi­nary up counter is loaded into the determination register (address
00D7

16) and the counter is immediately reset (0016). The refer-

ence clock is input in succession even after the counter is reset,
and the counter restarts counting up from “00

6. When count value “FE

16” is reached, the 8-bit binary up counter

16”.

stops counting. Then, simultaneously when the next reference
clock is input, the counter sets value “FF

16” to the determination

register.

32µs

64µs

RE

1

Control

circuit

RE0

INT2

INT1

(Note)








RE : Interrupt interval determination control register

Note : The pulse width of external interrupt INT1 and INT2 needs 5 or more machine cycles.

Selection gate : Connected to black
colored side at reset.

RE2








Fig. 34 Block diagram of interrupt interval determination circuit

8-bit binary up counter

8

Interrupt interval determination register

Address 00D7

16

8

Data bus

35

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

70

Interrupt interval determination control register
(RE : address 00D8

Interrupt interval determination circuit operation control bit
0 : Stop
1 : Operation

Reference clock selection bit (At f (XIN) = 4MHZ)
0 : 64ms
1 : 32ms

External interrupt input pin selection bit
0 : INT1 input
1 : INT2 input

INT1 pin input polarity switch bit
0 : Positive polarity input
1 : Negative polarity input

16

)

INT2 pin input polarity switch bit
0 : Positive polarity input
1 : Negative polarity input

Interrupt interval determination mode switch bit
0 : Interrupt interval determination mode
1 : Pulse width determination mode

Fig. 35 Structure of interrupt space distinguish control register

INT1 or 2 input

5

RE4 (RE3)

RE

0

0

0

1

1

0

1

1

REi : Bitsi (i = 3, 4, 5) of interrupt space distinguish control register (address 00D816)

count interval

Fig. 36 Interrupt space distinguish control register setting value and the measuring interval

36

MITSUBISHI MICROCOMPUTERS

000

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

RESET CIRCUIT

The M37210M3-XXXSP is reset according to the sequence shown in
Figure 39. It starts the program from the address formed by using the
content of address FFFF
tent of the address FFFE
RESET pin is held at “L” level for no less than 2µs while the power
voltage is 5V ± 10% and the crystal oscillator oscillation is stable and
then returned to “H” level. The internal initializations following reset
are shown in Figure 37.
An example of the reset circuit is sho wn in Figure 38. The reset input
voltage must be kept below 0.6V until the supply voltage surpasses

4.5V.

(1) Port P0 directional register
(2) Port P1 directional register
(3) Port P2 directional register
(4) Port P3
(5) Port P3 directional register
(6) Port P4
(7) Port P4 directional register
(8) Port P5
(9) Port P5 directional register
(

10

) Port P6

(

11

) Port P6 directional register

(

12

) 14DA-L register

(

13

) PWM0 register

(

14

) PWM1 register

(

15

) PWM2 register

(

16

) PWM3 register

(

17

) PWM4 register

(

18

) PWM output control register 1

PWM output control

(

19

)

register 2(Note 2)
Interrupt interval

(

20

)

determination register
Interrupt interval

(

21

)

determination control register

(22) Serial I/O mode register
(

23

) Horizontal position register

(

24

)

Vertical position register 1

(

25

)

Vertical position register 2

(

26

) Character size register

(

27

) Border selection register

(

28

) Color register 0

(

29

) Color register 1

1 6 as the high order address and the con-

16 as the low order address, when the

Address
(00C116)
(00C3
(00C5
(00C6
(00C7
(00C8
(00C9
(00CA
(00CB
(00CC
(00CD
(00CF
(00D0
(00D1
(00D2
(00D3
(00D4
(00D5
(00D6
(00D7
(00D8
(00DC
(00E0
(00E1
(00E2
(00E4
(00E5
(00E6
(00E7

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…

0016
0016
0016

00

000

0000

1111
1111

0016

00000

0016

0000

00

0000

000

0000

00

0000
0000

Power on

Power source

4.5V

voltage 0V

Reset input
voltage 0V

27

0.6V

Vcc

1

5

M51953AL

30

RESET

4

0.1 F

3

26

Vss

M37210M4-XXXSP

Fig. 38 Example of reset circuit

(30) Color register 2
(

31

) Color register 3

(

32

) CRT control register

(

33

) CRT port control register

(

34

) A-D mode register

(

35

) A-D control register

(

36

) Timer 1

(

37

) Timer 2

(

38

) Timer 3

(

39

) Timer 4

(

40

) Timer 12 mode register

(

41

) Timer 34 mode register

(

42

) PWM5 register

(

43

) PWM6 register (Note 3)

(

44

) PWM7 register (Note 3)

(

45

) CPU mode register

(

46

) Interrupt request register 1

(

47

) Interrupt request register 2

(

48

) Interrupt control register 1

(

49

) Interrupt control register 2

(

50

) Processor status register

(

51

) Program counter

Notes 1 : Since the contents of both registers other than those listed

above and the RAM are undefined at reset, it is necessary to
set initial values.

“0” is read from all bits which is not used.
2 : The M37211M2-XXXSP is
3 : The M37211M2-XXXSP dose not have this register.

(00E8
(00E9
(00EA
(00EC
(00EE
(00EF
(00F0
(00F1
(00F2
(00F3
(00F4
(00F5
(00F6
(00F7
(00F8
(00FB
(00FC
(00FD
(00FE
(00FF

(PS)

(PC

(PC

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

16)

…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…
…

M)

…

L)

0000
0000

0000

00
FF

16

0716
FF16
0716

00

0

00

0

111

11100

000000
0

0

0

00000

0

0

00

000

Contents of address

FFFF

16

Contents of address

FFFE

16

000
000
000
000

000
000

000

1

Fig. 37 Internal state at reset

37

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

X

φ

RESET

Internal RESET

SYNC

MITSUBISHI MICROCOMPUTERS

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

IN

Address

Data

Fig. 39 Reset sequence

32768 count of X

?

?

?PCHPCLPS

?

IN

clock cycle (Note 3)

00,S 00,S-1

00,S-2

FFFE FFFF

ADH,
AD

L

Reset address from the vector table

ADLAD

Note 1 : f (XIN) and f (φ) are in the relationship : f (XIN) = 2 · f (φ).

2 : A question mark (?) indicates an undefined state that

3 : Immediately after a reset, FF

H

depends on the previous state.

timer 3 and 07
clock (f (X
Reset state is canceled by the overflow signal of timer 4.

16 in timer 4 and timer 4, timer 3 and the

IN) divided by 16) are connected in series.

16 is automatically set in

38

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

I/O PORTS

(1) Port P0

Port P0 is an 8-bit I/O port with N-channel open-drain output.
As shown in the memory map (Figure 3), port P0 can be ac­cessed at zero page memory address 00C0
Port P0 has a directional register (address 00C1
used to program each individual bit as input (“0”) or as output
(“1”). If the pins are programmed as output, the output data is
latched to the port register and then output. When data is read
from the output port the output pin level is not read, only the
latched data in the port register is read. This allows a previously
output value to be read correctly even though the output voltage
level is shifted up or down.
Pins set as input are in the floating state and the signal levels can
thus be read. When data is written into the input port, the data is
latched only to the port latch and the pin still remains in the float­ing state.
Ports P0

0-P03 are in common with 6-bit PWM outputs PWM4-

PWM7. For the M37211M2, por ts P0
with 6-bit PWM outputs PWM4 and PWM5.

(2) Port P1

Port P1 has basically the same function as port P0 except the
output structure is CMOS output. But, pins P1
ports and in common with analog input pins A-D1-A-D3.

(3) Port P2

Port P2 has basically the same function as port P1.

16.

16) which can be

0 and P01 are in common

5-P17 are input

(4) Port P3

Port P3 are a 2-bit I/O port and a 4-bit input port with function
similar to port P2, but the output structure of P3

0, P31 is CMOS

output.
P3

2, P33 are in common with the external clock input pins of timer

2 and 3.
P3

4, P35 are in common with the external interrupt input pins

INT1, INT2 and P3

5 with the analog input pin of A-D comparator

A-D4.

(5) Port P4

Port P4 are a 2-bit I/O port and a 1-bit input port with function
similar to port P2, but the output structure is N-channel open­drain output.
When a serial I/O function is selected, P4
with pins S

OUT, SCLK and SIN.

0-P42 are in common

(6) OSC1, OSC2 pins

Clock input/output pins for CRT display function.

(7) H

SYNC, VSYNC pins

H

SYNC is a horizontal synchronizing signal input pin for CRT dis-

play.
V

SYNC is a vertical synchronizing signal input pin for CR T displa y.

(8) R, G, B, OUT pins

This is an 4-bit output pin for CRT display and in common with
P5

2-P55.

(9) Port P6

Port P6 is an 4-bit output port with function similar to port P0, but
the output structure is N-channel opendrain output.
This port is in common with 6-bit PWM output pin PWM0-PWM3.

(10) D-A pin

This is a 14-bit PWM output pin.

39

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

Port P0

Data bus

Port P10 – P14, P2, P30, P31

Data bus

Directional register

Port latch

Directional register

Port latch

N-channel open-drain output

Port P0

CMOS 3-state output

Port P10 – P14, P2, P30, P31

Port P40,P41

Data bus

Fig. 40 I/O pin block diagram (1)

Directional register

Port latch

N-channel open-drain output

SIN/SCLK

Port P40,P41

Note : P40, P41 can also be used as

serial I/O pins.

40

Port P6

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

N-channel open-drain output

Data bus

HSYNC, VSYNC

Port latch

Schmitt input

Port P6

Note : P6 can also be used as

6-bit PWM output pins.

D-A, R, G, B, OUT

CMOS output

Internal circuit

5 – P17

Port P1

Data bus

Note : P15 – P17 are in common with input Pins for A-D comparator.

2, P33 are in common with timer inputs.

P3

4, P35 are in common with external interrupt inputs.

P3

2 is in common with input pins of serial I/O pins.

P4

Fig. 41 I/O pin block diagram (2)

SYNC, VSYNC

H

Port P15 – P17

Internal circuit

TIM2, TIM3,
INT1, INT2,
or S

IN

Data bus

D-A, R, G, B, OUT

Note : Pins R, G, B, and OUT can also be

used as output ports P5

2 – P55.

Ports P32 – P35, P42

41

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

CLOCK GENERATING CIRCUIT

The built-in clock generating circuit is shown in Figure 44.
When the STP instruction is executed, the internal clock φ stops os­cillating at “H” level. At the same time, timers 3 and 4 are connected
in hardware and “FF

4. Select f(X
34 mode register to “0” before the execution of the STP instruction).
And besides, set the timer 3 and timer 4 interrupt enable bits to dis­abled (“0”) before execution of the STP instruction.
The oscillator is restarted when an external interrupt is accepted.
However, the internal clock φ keeps its “H” level until timer 4 over­flows.
This is because the oscillator needs a set-up period if a ceramic reso­nator or a quartz-crystal oscillator is used.
When the WIT instruction is executed, the internal clock φ stops in the
“H” level but the oscillator continues running. This wait state is
cleared when an interrupt is accepted (Note). Since the oscillation
does not stop, the next instructions are executed at once.
T o retur n from the stop or the wait state , set the interrupt enable bit to
“1” before executing the STP or the WIT instruction.
Note : In the wait mode, the following interrupts are invalid.

(1) V
(2) CRT interrupt
(3) Timer 2 interrupt using P3
(4) Timer 3 interrupt using P3

(5) Timer 4 interrupt using f(X
The circuit example using a ceramic resonator (or a quartz crystal
oscillator) is shown in Figure 42.
Use the circuit constants in accordance with the resonator
manufacture’s recommended values.

16” is set in the timer 3, “0716” is set in the timer

IN)/16 as the timer 3 count source (set bit 0 of the timer

SYNC interrupt

2/TIM2 pin input as count source
3/TIM3 pin input as count source

IN)/2 as count source

The example of external clock usage is shown in Figure 43 X
input, and X

OUT is open.

M37210M3-XXXSP

X

IN XOUT

24 25

C

IN COUT

Fig. 42 Ceramic resonator circuit example

M37210M3-XXXSP

X

IN

24

Vcc

External oscillation

circuit

Vss

Fig. 43 External clock input circuit example

IN is the

Interrupt request

Interrupt
disable flag I

Reset

STP instruction

1/2 1/8

XIN XOUT

Fig. 44 Clock generating circuit block diagram

SQ

R

T34M0

TIM3

WIT
instruction

T34M

SQ

R

2

Timer 3






SQ

Reset

STP instruction

R

Internal clock φ

Timer 4

Selection gate: Connected to black
colored side at reset.






42

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

PROGRAMMING NOTES

(1) The divide ratio of the timer is 1/ (n + 1).
(2) Even though the BBC and BBS instructions are executed imme-

diately after the interrupt request bits are modified (by the pro­gram), those instructions are only valid for the contents before
the modification. At least one instruction cycle is needed (such as
an NOP) between the modification of the interrupt request bits
and the execution of the BBC and BBS instructions.

(3) After the ADC and SBC instructions are executed (indecimal op-

eration mode), one instruction cycle (such as an NOP) is needed
before the SEC, CLC, or CLD instructions are executed.

(4) An NOP instruction is needed immediately after the execution of

a PLP instruction.

(5) In order to avoid noise and latch-up, connect a bypass capacitor

( ≈ 0.1µF) directly between the V
wire.

CC pin and VSS pin using a thick

DATA REQUIRED FOR MASK ORDERS

The following are necessary when ordering a mask ROM production.
(1) Mask ROM Order Confirmation Form
(2) Mark Specification Form
(3) Data to be written to ROM, in EPROM form (28-pin DIP type

27256, three identical copies)

PROM Programming Method

The built-in PROM of the blank One Time PROM version and built-in
EPROM version can be read or programmed with a general-purpose
PROM programmer using a special programming adapter.

Product
M37210E4SP
M37210E4FP

The PROM of the blank One Time PROM version is not tested
or screened in the assembly process and following processes. To
ensure proper operation after programming, the procedure shown
in Figure 45 is recommended to verify programming.

Programming with

PROM programmer

Name of Programming Adapter

PCA4754
PCA4756

Screening (Caution)
(150 for 40 hours)

Verification with

PROM programmer

Functional check in target device

Caution : The screening temperature is far higher than the

storage temperature. Never expose to 150°C ex­ceeding 100 hours.

Fig. 45 Programming and testing of One Time PROM version

43

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

ABSOLUTE MAXIMUM RATINGS

Symbol
VCC
VI

VI

VO

VO

IOH

IOL1

IOL2
IOL3
Pd
Topr
Tstg

Power source voltage
Input voltage CNVSS
Input voltage P00 – P07, P10 – P17, P20 – P27,

P30 – P35, P40 – P42, HSYNC,
VSYNC, RESET, OSC1, XIN

Output voltage P10 – P14, P20 – P27, P30, P31,

P40, P41, R, G, B, OUT, D-A,

XOUT, OSC2
Output voltage P60 – P63, P00 – P07
“H” average output current R, G, B, OUT, P10 – P14,

“L” average output current R, G, B, OUT, P10 – P14,

“L” average output current P60 – P63, P00 – P07
“L” average output current P24 – P27
Power dissipation
Operating temperature
Storage temperature

Parameter

P20 – P23, P30, P31,
D-A

P20 – P23, P30, P31, P40, P41
D-A

MITSUBISHI MICROCOMPUTERS

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

Conditions

All voltages are based on
V

SS.

Output transistors are
cut off.

Ta = 25°C

Ratings
– 0.3 to 6
– 0.3 to 6

– 0.3 to V

– 0.3 to VCC + 0.3

0 to 10 (Note 3)

CC + 0.3

– 0.3 to 13

0 to 1 (Note 1)

0 to 2 (Note 2)

0 to 1 (Note 2)

550

– 10 to 70

– 40 to 125

Unit

V
V

V

V

V

mA

mA

mA
mA

mW

°C
°C

RECOMMENDED OPERATING CONDITIONS

Symbol

VCC
VSS

VIH

VIL

VIL

IOH

IOL1
IOL2

IOL3
fCPU
fCRT
fhs
fhs

Notes1: The total current that flows out of the IC should be 20mA (max.).

Power source voltage (Note 4) During the CPU and the CRT operation
Power source voltage
“H” input voltage P00 – P07, P10 – P17, P20 – P27,

“L” input voltage P00 – P07, P10 – P17, P20 – P27,

“L” input voltage TIM2, TIM3, INT1, INT2, SIN, SCLK,

“H” average output current (Note 1) R, G, B, OUT,

“L” average output current (Note 2) R, G, B, OUT, P10 – P14,

“L” average output current (Note 2) P60 – P63, P00 – P07
“L” average output current (Note 3) P24 – P27
Oscillation frequency (for CPU operation)(Note 5)
Oscillation frequency (for CRT display)
Input frequency TIM2, TIM3, INT1, INT2
Input frequency SCLK

2: The total of I
3 :The total of I
4: Connect 0.022µF or more capacitor externally between the V

source noise.
Also connect 0.068µF or more capacitor externally between the V

5 :Use a quartz-crystal oscillator or a ceramic resonator for CPU oscillation circuit.

OL1 and IOL2 should be 30mA (max.).
OL of port P24-P27 should be 20mA (max.).

P30 – P35, P40 – P42, HSYNC,
VSYNC, RESET, XIN, OSC1,
TIM2, TIM3, INT1, INT2, SIN, SCLK

P30 – P35, P40 – P42

HSYNC, VSYNC, RESET, XIN, OSC1

P10 – P14, P20 – P27, P30, P31, D-A

P20 – P23, P30, P31, P40, P41, D-A

Parameter

CC – VSS power source pins so as to reduce power

CC = 5V ± 10%, Ta = –10 to 70°C unless otherwise noted)

(V

0.8V

CC – CNVSS pins.

Min.

4.5

3.6

4.0

Limits

Typ.

0

CC

0

0

Max.

5.0
0

V

0.4VCC

0.2VCC

4.0

5.0

100

5.5

10

8.1

6.0

CC

Unit

V
V

0

V

V

V

1

mA

2

mA

1

mA

mA
MHz
MHz

kHz

1

MHz

44

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

ELECTRIC CHARACTERISTICS

Symbol

ICC

VOH

VOL

VT +–VT–

IZH

I

IIZL

IOZH

Note : P32 – P35, have the hysteresis when these pins are used as interrupt input pins or timer input pins.

P40 – P42 have the hysteresis when these pins are used as serial I/O ports.

Power source current

“H” output voltage P1

“L” output voltage P10 – P14, P20 – P23, P30, P31,

“L” output voltage P60 – P63, P00 – P07

“L” output voltage P24 – P27

Hysteresis RESET
Hysteresis (Note) HSYNC, VSYNC, TIM2, TIM3,

INT1, INT2, SIN, SCLK

“H” input leak current RESET, P00 – P07,

P10 – P17, P20 – P27,
P30 – P35, P40 – P42, HSYNC, VSYNC

“L” input leak current RESET, P00 – P07,

P10 – P17, P20 – P27, P30 – P35,
P40 – P42, P60 – P63, HSYNC, VSYNC

“H” input leak current

P60 – P63, P00 – P07

Parameter

0 – P14, P20 – P27,

P30, P31, R, G, B, OUT, D-A

P40, P41, R, G, B, OUT, D-A

(VCC = 5V ± 10%, VSS = 0V, Ta = – 10 to 70°C, f (XIN) = 4MHz unless otherwise noted)

Test conditions

C

CC = 5.5V

V
f (XIN) = 4MHz

VCC = 5.5V
f (XIN) = 8MHz

At stop mode
V

CC = 4.5V

IOH = – 0.5mA
VCC = 4.5V

IOL = 0.5mA
VCC = 4.5V

IOL = 0.5mA
VCC = 4.5V

IOL = 10.0mA
VCC = 5.0V

CC = 5.0V

V

VCC = 5.5V
VI = 5.5V

VCC = 5.5V
VI = 0V

CC = 5.5V

V
VO = 12V

OFF

R

ON

T
C

OFF

R

ON

T

Min.

–
–
–
–
–

2.4

Limits

Typ.

10
20
20
30

–

0.5

0.5

Max.

20
40
40
60

300

0.4

0.4

3.0

0.7

1.3

10

Unit

mA

mA
µA

V

V

V

5

µA

5

µA

µA

45

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

PACKAGE OUTLINE

MITSUBISHI MICROCOMPUTERS

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

46

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

GZZ–SH06–09B < 25C0 >

740 FAMILY MASK ROM CONFIRMATION FORM

SINGLE-CHIP MICROCOMPUTER M37210M3-XXXSP/FP

MITSUBISHI ELECTRIC

Company

❈

Customer

name

Date
issued

Date :

TEL
( )

Mask ROM number

Date :

Section head
signature

Receipt

Note : Please fill in all items marked ❈.

Submitted by

Issuance

signature

❈ 1. Confirmation

Specify the name of the product being ordered and the type of EPROMs submitted.
Three EPROMs are required for each pattern.
If at least two of the three sets of EPROMs submitted contain identical data, we will produce masks based on
this data. We shall assume the responsibility for errors only if the mask ROM data on the products we produce
differs from this data. Thus, extreme care must be taken to verify the data in the submitted EPROMs.

Microcomputer name : M37210M3-XXXSP M37210M3-XXXFP

Checksum code for entire EPROM

(hexadecimal notation)

Supervisor
signature

Supervisor

EPROM type (indicate the type used)

27256

EPROM address

0000

16

Product name

ASCII code :

000F

1000

15FF

1800
1DFF

5000

7FFF

(1)
(2)

❈ 2. Mark specification

Mark specification must be submitted using the correct form for the type package being ordered fill out the appropriate
mark specification form (52P4B for M37210M3-XXXSP; 64P6N for M37210M3-XXXFP) and attach to the mask ROM
confirmation form.

❈ 3. Comments

‘M37210M3 –’

16

16

Character ROM1

16

16

Character ROM2

16

16

ROM (12K bytes)

16

Set “FF16” in the shaded area.
Write the ASCII codes that indicates the product name of “M37210M3–” to addresses 0000

16

to 000F16.

(1/3)

47

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

GZZ–SH06–09B < 25C0 >

740 FAMILY MASK ROM CONFIRMATION FORM

SINGLE-CHIP MICROCOMPUTER M37210M3-XXXSP/FP

MITSUBISHI ELECTRIC

Writing the product name and character ROM data onto EPROMs

Addresses 0000

16 to 000F16 store the product name, and addresses 100016 to 15FF16 and addresses 180016 to 1DFF16

store the character pattern.
If the name of the product contained in the EPROMs does not match the name on the mask ROM confirmation form, the
ROM processing is disabled. Write the data correctly.

1.

Inputting the name of the product with the ASCII code
ASCII codes ‘M37210M3-’ are listed on the right.
The addresses and data are in hexadecimal notation.

2.

Inputting the character ROM

Address

0000
000116
000216
000316
000416
000516
000616
000716

16

=

‘M’

4D

=

33

‘3’

3

‘7’

=
=

‘2’

3

=

3

‘1’
‘0’

3

=

‘M’=4D

=

‘3’

3

Address

=

D

‘–’

16

0008

16
16

000916
7
2

1

0

3

000A16

16
16

000B16

000C16

16

000D16

16

000E16

16

000F16

16

2
FF
FF

FF
FF
FF

FF
FF

16
16
16
16
16
16
16
16

Input the character ROM data by dividing it into character ROM1 and character ROM2. For the character ROM data,
see the next page and on.

48

(2/3)

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

GZZ–SH06–09B < 25C0>

740 FAMILY MASK ROM CONFIRMATION FORM

SINGLE-CHIP MICROCOMPUTER M37210M3-XXXSP/FP

MITSUBISHI ELECTRIC

The structure of character ROM (divided of 12✕16 dots font)

Example

Character code

“1A

16

”

Example

11A0

to

11AF

Character

ROM1

⇐

b

7

16

16

b6b5b4b3b2b1b

0
1

2
3

4
5
6

7
8

9
A
B

C
D

E
F

0

16

00
04

16

04

16

0A

16

0A

16

11

16

11

16

11

16

20

16

20

16

3F

16

40

16

40

16

40

16

00

16

00

16

Character

ROM2

Example

19A0

to

19AF

16

16

⇐

b

7

b6b5b4b3b2b1b

0
1

2
3

4
5
6

7
8

9
A
B

C
D

E
F

0

F0

16

F0

16

F0

16

F0

16

F0

16

F0

16

F0

16

F0

F

16

F8
F8

F8
F4

F4
F4

F0
F0

16
16

16
16
16

16
16

16
16

(3/3)

49

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

GZZ–SH06–10B < 25B0 >

740 FAMILY MASK ROM CONFIRMATION FORM

SINGLE-CHIP MICROCOMPUTER M37210M4-XXXSP

MITSUBISHI ELECTRIC

Company

❈

Customer

name

Date

issued

Date :

TEL
( )

Mask ROM number

Date :

Section head
signature

Receipt

Note : Please fill in all items marked ❈.

Submitted by

Issuance

signature

❈ 1. Confirmation

Specify the name of the product being ordered and the type of EPROMs submitted.
Three EPROMs are required for each pattern.
If at least two of the three sets of EPROMs submitted contain identical data, we will produce masks based on
this data. We shall assume the responsibility for errors only if the mask ROM data on the products we produce
differs from this data. Thus, extreme care must be taken to verify the data in the submitted EPROMs.

Checksum code for entire EPROM

(hexadecimal notation)

EPROM type (indicate the type used)

27256

EPROM address

0000

16

Product name

ASCII code :

000F16

100016

15FF16

180016
1DFF16

400016

7FFF16

‘M37210M4 –’

Character ROM1

Character ROM2

ROM (16K bytes)

Supervisor
signature

Supervisor

50

(1)

Set “FF16” in the shaded area.

(2)

Write the ASCII codes that indicates the product name of “M37210M4–” to addresses 0000

16

to 000F16.

❈ 2. Mark specification

Mark specification must be submitted using the correct form for the type package being ordered fill out the appropriate
mark specification form (52P4B for M37210M4-XXXSP) and attach to the mask ROM confirmation form.

❈ 3. Comments

(1/3)

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

GZZ–SH06–10B < 25B0 >

740 FAMILY MASK ROM CONFIRMATION FORM

SINGLE-CHIP MICROCOMPUTER M37210M4-XXXSP

MITSUBISHI ELECTRIC

Writing the product name and character ROM data onto EPROMs

Addresses 0000

16 to 000F16 store the product name, and addresses 100016 to 15FF16 and addresses 180016 to 1DFF16

store the character pattern.
If the name of the product contained in the EPROMs does not match the name on the mask ROM confirmation form, the
ROM processing is disabled. Write the data correctly.

1.

Inputting the name of the product with the ASCII code
ASCII codes ‘M37210M4-’ are listed on the right.
The addresses and data are in hexadecimal notation.

2.

Inputting the character ROM

Address

0000
000116
000216
000316
000416
000516
000616
000716

16

=

‘M’

4D

=

‘3’

3

3

‘7’

=
=

‘2’

3

=

3

‘1’

3

=

‘0’

‘M’=4D

=

‘4’

3

Address

=

D

‘–’

3

7

2
1
0

4

000A16

16

16

000B16
000C16

16

000D16

16

000E16

16

000F16

16

16

0008

16

000916

16

2
FF
FF

FF
FF
FF

FF
FF

16
16
16
16
16
16
16
16

Input the character ROM data by dividing it into character ROM1 and character ROM2. For the character ROM data,
see the next page and on.

(2/3)

51

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

GZZ–SH06–10B < 25B0 >

740 FAMILY MASK ROM CONFIRMATION FORM

SINGLE-CHIP MICROCOMPUTER M37210M4-XXXSP

MITSUBISHI ELECTRIC

The structure of character ROM (divided of 12✕16 dots font)

Example

Character code

“1A

16

”

Example

11A0

to

11AF

Character

ROM1

⇐

b

7

16

16

b6b5b4b3b2b1b

0
1

2
3

4
5
6

7
8

9
A
B

C
D

E
F

0

16

00
04

16

04

16

0A

16

0A

16

11

16

11

16

11

16

20

16

20

16

3F

16

40

16

40

16

40

16

00

16

00

16

Character

ROM2

Example

19A0

to

19AF

16

16

⇐

b

7

b6b5b4b3b2b1b

0
1

2
3

4
5
6

7
8

9
A
B

C
D

E
F

0

F0

16

F0

16

F0

16

F0

16

F0

16

F0

16

F0

16

F0

F

16

F8
F8

F8
F4

F4
F4

F0
F0

16
16

16
16
16

16
16

16
16

52

(3/3)

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

GZZ–SH06–11B < 25B1 >

740 FAMILY MASK ROM CONFIRMATION FORM

SINGLE-CHIP MICROCOMPUTER M37211M2-XXXSP

MITSUBISHI ELECTRIC

Company

❈

Customer

name

Date
issued

Date :

TEL
( )

Mask ROM number

Date :

Section head

signature

Receipt

Note : Please fill in all items marked ❈.

Submitted by

Issuance

signature

❈ 1. Confirmation

Specify the name of the product being ordered and the type of EPROMs submitted.
Three EPROMs are required for each pattern.
If at least two of the three sets of EPROMs submitted contain identical data, we will produce masks based on
this data. We shall assume the responsibility for errors only if the mask ROM data on the products we produce
differs from this data. Thus, extreme care must be taken to verify the data in the submitted EPROMs.

Checksum code for entire EPROM

(hexadecimal notation)

EPROM type (indicate the type used)

Supervisor
signature

Supervisor

27256

EPROM address

0000

16

Product name

ASCII code :

000F
1000

15FF
1800

1DFF
6000

7FFF

(1)
(2)

❈ 2. Mark specification

Mark specification must be submitted using the correct form for the type package being ordered fill out the appropriate
mark specification form (52P4B for M37211M2-XXXSP) and attach to the mask ROM confirmation form.

❈ 3. Note

(1)

(2)

❈ 4. Comments

‘M37211M2 –’

16

16

Character ROM1

16

16

Character ROM2

16

16

ROM (8K bytes)

16

Set “FF16” in the shaded area.
Write the ASCII codes that indicates the product name of “M37211M2–” to addresses 0000

16

to 000F16.

Set the stack page selection bit to “0”, because this bit is set to “1” after reset but the internal RAM is located at 0
page only.
Both P0

2

pin (9th pin) and P03 pin (10th pin) are not used as PWM output pins.

(1/3)

53

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

GZZ–SH06–11B< 25B1 >

740 FAMILY MASK ROM CONFIRMATION FORM

SINGLE-CHIP MICROCOMPUTER M37211M2-XXXSP

MITSUBISHI ELECTRIC

Writing the product name and character ROM data onto EPROMs

Addresses 0000

16 to 000F16 store the product name, and addresses 100016 to 15FF16 and addresses 180016 to 1DFF16

store the character pattern.
If the name of the product contained in the EPROMs does not match the name on the mask ROM confirmation form, the
ROM processing is disabled. Write the data correctly.

1.

Inputting the name of the product with the ASCII code
ASCII codes ‘M37211M2-’ are listed on the right.
The addresses and data are in hexadecimal notation.

2.

Inputting the character ROM

Address

0000
000116
000216
000316
000416
000516
000616
000716

16

=

‘M’

4D

=

3

‘3’

3

‘7’

=

‘2’

3

=
=

3

‘1’

3

‘1’

=

‘M’=4D

‘2’=32

Address

=

D

‘–’

16

0008

16

3

7

2

1

1

000916

16

000A16

16

000B16

16

000C16

16

000D16

16
16

000E16
000F16

16

2
FF
FF

FF
FF
FF

FF
FF

16
16
16
16
16
16
16
16

Input the character ROM data by dividing it into character ROM1 and character ROM2. For the character ROM data,
see the next page and on.

54

(2/3)

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

GZZ–SH06–11B < 25B1 >

740 FAMILY MASK ROM CONFIRMATION FORM

SINGLE-CHIP MICROCOMPUTER M37211M2-XXXSP

MITSUBISHI ELECTRIC

The structure of character ROM (divided of 12 ✕16 dots font)

Example

Character code

16

”

“1A

Example 11A0

to

11AF

Character

ROM1

⇐

b

7

16

16

b6b5b4b3b2b1b
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F

0

00

16

04

16

04

16

0A

16

0A

16

11

16

11

16

11

16

20

16

20

16

3F

16

40

16

40

16

40

16

00

16

00

16

Character

ROM2

Example 19A0

to

19AF

16

16

⇐

b

7

b6b5b4b3b2b1b
0
1
2
3
4
5
6
7

F

8
9
A
B
C
D
E
F

0

F0

16

F0

16

F0

16

F0

16

F0

16

F0

16

F0

16

F0

16

F8
F8
F8
F4
F4
F4
F0
F0

16
16
16
16
16
16
16
16
16

(3/3)

55

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

56

MITSUBISHI MICROCOMPUTERS

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP

M37210E4-XXXSP/FP, M37210E4SP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

with ON-SCREEN DISPLAY CONTROLLER

57

MITSUBISHI DATA BOOK

SINGLE-CHIP 8-BIT MICROCOMPUTERS Vol.3

Sep. First Edition 1996 H-DF319-B
Editioned by

Committee of editing of Mitsubishi Semiconductor Data Book
Published by

Mitsubishi Electric Corp., Semiconductor Division

This book, or parts thereof, may not be reproduced in any form without permission of
Mitsubishi Electric Corporation.

REVISION DESCRIPTION LIST

M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP,
M37210E4-XXXSP/FP, M37210E4SP/FP DATA SHEET

Rev. Rev.

No. date

1.0 First Edition 9708

2.0 Information about copyright note, revision number, release date added (last page). 971130

Revision Description

(1/1)