Datasheet M27W402 Datasheet (SGS Thomson Microelectronics)

M27W402

4 Mbit (256Kb x16) Low Voltage UV EPROM and OTP EPROM

■ 2.7V to 3.6V SUPPLY VOLTAGEin READ

OPERATION

■ ACCESS TIME:

–80nsatVCC= 3.0V to 3.6V
– 100ns at VCC= 2.7V to 3.6V

■ PIN COMPATIBLE with M27C4002

■ LOW POWERCONSUMPTION:

–15µA max Standby Current
– 15mA max Active Current at 5MHz

■ PROGRAMMING TIME 100µs/word

■ HIGHRELIABILITY CMOS TECHNOLOGY

– 2,000V ESD Protection
– 200mA Latchup Protection Immunity

■ ELECTRONIC SIGNATURE

– Manufacturer Code: 0020h
– Device Code: 0044h

40

1

FDIP40W (F) PDIP40 (B)

PLCC44 (K) TSOP40 (N)

Figure 1. Logic Diagram

40

1

10 x 20 mm

DESCRIPTION

The M27W402 is a low voltage 4 Mbit EPROM of­fered in the two range UV (Ultra Violet Erase) and
OTP (one time programmable). It is ideally suited
for microprocessorsystems requiringlarge data or
program storage and is organised as 262,144 by
16 bits.

The M27W402 operates in the read mode with a
supply voltageas low as2.7V at –40 to 85°C tem­perature range. The decrease in operating power
allows either a reduction of the size of the battery
or an increase in the time between battery re­charges.

The FDIP40W (window ceramic frit-seal package)
has a transparent lids which allow the user to ex­pose thechip to ultraviolet light to erase the bit pat­tern. A new pattern can then be written to the
device by following the programming procedure.

For applications wherethe content is programmed
only one time and erasure is not required, the
M27W402 is offered in PDIP40, PLCC44 and
TSOP40 (10 x 20 mm) packages.

V

18

A0-A17 Q0-Q15

E

G

V

CC

M27W402

V

SS

PP

16

AI01863

1/15March 2000

M27W402

Figure 2A. DIP Connections

V

1

PP

2

Q15

3
4

Q14

5

Q13
Q12

6

Q11

7

Q10

8

Q9

9

Q8

10

V

SS
Q7

Q6
Q5
Q4
Q3
Q2

Q0

M27W402

11
12
13
14
15
16
17
18
19

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
2120

AI02672

V

CC

A17E
A16
A15
A14
A13
A12
A11
A10
A9
V

SS

A8
A7
A6
A5
A4
A3
A2Q1
A1
A0G

Figure 2B. LCC Connections

Q13

Q14

Q15

CC

NC

VPPE

1

44

A17

V

Q12
Q11
Q10

Q9 A10
Q8

V

SS

12

M27W402

NC

Q6
Q5
Q4

23

G

A0

Q3

Q2

Q1

Q0

NC

A1

A16

A2

A15

A3

A14

34

A4

A13
A12
A11

A9
V

SS

NC
A8Q7
A7
A6
A5

AI01865

Figure 2C. TSOP Connections

A9
A10
A11
A12 A6
A13
A14
A15
A16
A17

V

CC

V

PP

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8

1

M27W402

10

(Normal)

11

E

20 21

40

31
30

AI01866

V

SS

A8
A7

A5
A4
A3
A2
A1
A0
G
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
V

SS

Table 1. Signal Names

A0-A17 Address Inputs

Q0-Q15 Data Outputs

E Chip Enable

G Output Enable

V

PP

V

CC

V

SS

NC Not Connected Internally

Program Supply

Supply Voltage

Ground

2/15

M27W402

Table 2. Absolute Maximum Ratings

(1)

Symbol Parameter Value Unit

T

A

T

BIAS

T

STG

(2)

V

IO

V

CC

(2)

V

A9

V

PP

Note: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute MaximumRatings” may

cause permanent damage to the device. These are stress ratings onlyand operation ofthe device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure toAbsolute Maximum Rating condi­tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SUREProgram and otherrelevant qual­ity documents.

2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V

3. Depends on range.

Ambient Operating Temperature
Temperature Under Bias –50 to 125 °C
Storage Temperature –65 to 150 °C

Input or Output Voltage (except A9) –2 to 7 V
Supply Voltage –2 to 7 V
A9 Voltage –2 to 13.5 V
Program Supply Voltage –2 to 14 V

+0.5V with possible overshoot to VCC+2V for a period less than 20ns.

CC

(3)

–40 to 85 °C

Table 3. Operating Modes

Mode E G A9

Read
Output Disable V
Program

V
Verify V
Program Inhibit
Standby
Electronic Signature

Note: X = VIHor VIL,VID= 12V ± 0.5V.

V

IL

IL

Pulse V

IL

IH

V

IH

V

IH

V

IL

V

IL

V

IH

IH

V

IL

V

IH

X
XV
X
XVPPData Out
X

XX

V

IL

V

ID

V

PP

V

or V

CC

SS

or V

CC

SS

V

PP

V

PP

V

or V

CC

SS

V

CC

Q15-Q0

Data Out

Hi-Z

Data In

Hi-Z
Hi-Z

Codes

Table 4. Electronic Signature

Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data

Manufacturer’s Code
Device Code

Note: Outputs Q15-Q8 are set to ’0’.

V

IL

V

IH

00100000 20h
01000100 44h

3/15

M27W402

Table 5. AC Measurement Conditions

High Speed Standard

Input Rise and Fall Times ≤ 10ns ≤ 20ns
Input Pulse Voltages 0 to 3V 0.4V to 2.4V
Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V

Figure 3. AC Testing Input Output Waveform

High Speed

3V

1.5V

0V

Standard

2.4V

0.4V

Table 6. Capacitance

Symbol Parameter Test Condition Min Max Unit

C

IN

C

OUT

Note: Sampled only, not 100% tested.

Input Capacitance
Output Capacitance V

(1)

(TA=25°C, f = 1 MHz)

2.0V

0.8V

AI01822

Figure 4. AC Testing Load Circuit

1.3V

1N914

3.3kΩ

DEVICE
UNDER

TEST

C

L

CL= 30pF for HighSpeed
CL= 100pF for Standard
CLincludes JIG capacitance

V

=0V

IN

=0V 12 pF

OUT

6pF

OUT

AI01823B

DEVICE OPERATION

The operation modes of theM27W402 are listed in
the Operating Modes table. A single power supply
is required in the read mode. All inputs are TTL
levels exceptfor VPPand 12Von A9 for Electronic
Signature.

Read Mode

The M27W402 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable(G) is the outputcontrol and should
be used to gate data to the output pins, indepen­dent of device selection. Assuming that the ad-

4/15

dresses are stable, the address access time
(t

) is equal to the delay from E to output

AVQV

(t

). Data is availableatthe outputaftera delay

ELQV

of t

from the falling edge of G, assuming that

GLQV

E has been lowand the addresses havebeen sta­ble for at least t

AVQV-tGLQV

.

Standby Mode

The M27W402 has a standby mode which reduc­es the supply current from 15mA to 15µAwith low
voltage operation VCC≤ 3.6V, see Read ModeDC
Characteristics table for details. The M27W402 is
placed in the standby mode by applying a CMOS
high signal to the E input. When in the standby
mode, the outputs are in a high impedance state,
independent of the G input.

M27W402

Table 7. Read Mode DC Characteristics

(1)

(TA= –40to 85°C; VCC= 2.7V to 3.6V; VPP=VCC)

Symbol Parameter Test Condition Min Max Unit

I

I

I

CC

I

CC1

I

CC2

I
V

V

IH

V

V

Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.

Input Leakage Current

LI

Output Leakage Current

LO

Supply Current

Supply Current (Standby) TTL

Supply Current (Standby) CMOS

Program Current

PP

Input Low Voltage –0.6

IL

(2)

Input High Voltage
Output Low Voltage

OL

Output High Voltage TTL

OH

2. Maximum DC voltage on Output is V

CC

+0.5V.

I

OUT

0V ≤ V

0V ≤ V

E=V

E>V

I

≤ V

IN

CC

≤ V

OUT

CC

,G=VIL,

IL

= 0mA, f = 5MHz,

≤ 3.6V

V

CC

E=V

IH

– 0.2V,

CC

V

≤ 3.6V

CC

V

PP=VCC

I

= 2.1mA

OL

= –400µA

OH

±10 µA
±10 µA

15 mA

1mA

15 µA

10 µA

0.2 V

CC

0.7 V

CCVCC

2.4 V

+ 0.5

0.4 V

V
V

Two Line Output Control

Because EPROMs are usually used in larger
memory arrays, the product features a 2 line con­trol function whichaccommodates the use of mul­tiple memory connection.

The two line control function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention

will not occur.

For the most efficient use of these two control
lines, Eshould be decodedand usedas the prima­ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system controlbus. This ensures that all deselect­ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.

System Considerations

The power switching characteristics of Advanced
CMOS EPROMs requirecareful decoupling of the
devices. The supply current, ICC, has three seg­ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the fallingand rising edges of E. Themagnitude of
the transient current peaks is dependent on the
output capacitive and inductive loading of the de­vice. The associated transient voltage peaks can
be suppressed by complying withthe two line out­put control and by properly selected decoupling
capacitors.It isrecommended that a 0.1µF ceram­ic capacitor be used on everydevice between V

CC

and VSS. This should be a high frequency capaci­tor of low inherent inductance and should be
placed as close to the device as possible. In addi­tion, a 4.7µF bulk electrolytic capacitor should be
used between VCCand VSSfor every eight devic­es. The bulk capacitor should be located near the
power supply connection point.Thepurpose of the
bulk capacitor is to overcome the voltage drop
caused bythe inductive effects of PCB traces.

5/15

M27W402

Table 8. Read Mode AC Characteristics

(1)

(TA= –40to 85°C; VCC= 2.7V to 3.6V; VPP=VCC)

M27W402

(3)

Symbol Alt Parameter

Test

Condition

VCC= 3.0V to 3.6V VCC= 2.7V to 3.6V VCC= 2.7V to 3.6V

Min Max Min Max Min Max

E=V

G=V

G=V

E=V

G=V

E=V

E=V

G=V

,

IL

IL

IL

IL

IL

IL

,

IL

IL

0 50 0 60 0 70 ns

0 50 0 60 0 70 ns

000ns

t

AVQV

t

ELQV

t

GLQV

(2)

t

EHQZ

(2)

t

GHQZ

t

AXQX

Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.

2. Sampled only, not 100% tested.

3. Speed obtained with High Speed AC measurement conditions.

Address Valid to

t

ACC

Output Valid
Chip Enable Low to

t

CE

Output Valid
Output Enable Low

t

OE

to Output Valid
Chip Enable High

t

DF

to Output Hi-Z
Output EnableHigh

t

DF

to Output Hi-Z
Address Transition

t

OH

to Output Transition

-100

80 100 120 ns

80 100 120 ns

50 60 70 ns

-120

(-150/-200)

Unit

Figure 5. Read Mode AC Waveforms

A0-A17

tAVQV

E

G

tELQV

Q0-Q15

VALID

tGLQV

VALID

tAXQX

tEHQZ

tGHQZ

Hi-Z

AI00731B

6/15

M27W402

Table 9. Programming Mode DC Characteristics

(1)

(TA=25°C; VCC= 6.25V ± 0.25V; VPP= 12.75V ± 0.25V)

Symbol Parameter Test Condition Min Max Unit

I

LI

I

CC

I

PP

V

IL

V

IH

V

OL

V

OH

V

ID

Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.

Table 10. Programming Mode AC Characteristics

Input Leakage Current

0V ≤ V

≤ V

IN

CC

±10 µA
Supply Current 50 mA
Program Current

E=V

IL

50 mA

Input Low Voltage –0.3 0.8 V

V

Input High Voltage 2

CC

+ 0.5

Output Low Voltage IOL= 2.1mA 0.4 V

I

Output High Voltage TTL

= –400µA

OH

2.4 V

A9 Voltage 11.5 12.5 V

(1)

(TA=25°C; VCC= 6.25V ± 0.25V; VPP= 12.75V ± 0.25V)

Symbol Alt Parameter Test Condition Min Max Unit

t

AVEL

t

QVEL

t

VPHEL

t

VCHEL

t

ELEH

t

EHQX

t

QXGL

t

GLQV

t
t

t

VPS

t

VCS

t

t

t

OES

t

Address Validto Chip Enable Low 2 µs

AS

Input Valid to Chip Enable Low 2 µs

DS

VPPHigh to Chip Enable Low
VCCHigh to Chip Enable Low
Chip Enable Program Pulse Width 95 105 µs

PW

Chip Enable High to Input Transition 2 µs

DH

2 µs
2 µs

Input Transition to Output Enable Low 2 µs
Output Enable Low to Output Valid 100 ns

OE

V

t

GHQZ

t

GHAX

Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.

2. Sampled only, not 100% tested.

t

Programming

The M27W402 hasbeen designed to be fully com­patible with the M27C4002and hasthe same elec­tronic signature. As a result the M27W402 can be
programmed as the M27C4002 on the same pro­gramming equipmentapplying 12.75V onVPPand

6.25V on VCCby the use of the same PRESTO II
algorithm. When delivered (andafter each ‘1’s era­sure for UV EPROM), all bits of the M27W402 are
in the ’1’ state. Data is introduced by selectively

Output Enable High to Output Hi-Z 0 130 ns

DFP

Output Enable High to Address

t

AH

Transition

though only ’0’s will be programmed, both ’1’s and
’0’scan be present in the dataword. The only way
tochange a ‘0’ toa ‘1’ bydie exposureto ultraviolet
light (UV EPROM). The M27W402 is in the pro­gramming modewhenVPPinput is at 12.75V, G is
at VIHand E is pulsed to VIL. The data to be pro­grammedis applied to16 bitsin parallelto thedata
output pins. The levels required for the address
and data inputs are TTL. VCCis specified to be

6.25V ± 0.25V.

programming ’0’s into the desired bit locations. Al-

0ns

7/15

M27W402

Figure 6. Programming and Verify Modes AC Waveforms

A0-A17

tAVEL

Q0-Q15

V

PP

V

CC

E

G

DATA IN

tQVEL

tVPHEL

tVCHEL

tELEH

Figure 7. Programming Flowchart

VCC= 6.25V, VPP= 12.75V

n=0

E = 100µs Pulse

NO

NO

VERIFY

YES

Last

NO

Addr

YES

CHECK ALL WORDS

1st: VCC=5V

2nd: VCC= 2.7V

++ Addr

YES

++n

=25

FAIL

VALID

DATA OUT

tEHQX

tGLQV

tQXGL

PROGRAM VERIFY

PRESTO II Programming Algorithm

PRESTO II Programming Algorithm allows the
whole array to be programmed with a guaranteed
margin, in a typical time of 26.5 seconds. Pro­gramming with PRESTO II consists of applying a
sequence of 100µs program pulses to each byte
until a correct verify occurs (see Figure 7).During
programming and verify operation, a MARGIN
MODE circuitis automatically activatedin order to
guarantee that each cell is programmed with
enough margin. No overprogram pulse is applied
since the verify in MARGIN MODE at VCCmuch
higher than 3.6V, provides necessary margin to
each programmedcell.

Program Inhibit

Programming of multiple M27W402s in parallel
with different datais also easilyaccomplished. Ex­cept for E, all likeinputs including G of the parallel
M27W402 may becommon. ATTLlow level pulse
applied to a M27W402’s E input, with VPPat

12.75V, will program that M27W402. A high level
E input inhibits the other M27W402s from being
programmed.

Program Verify

AI00726D

A verify (read) should be performed on the pro­grammed bitsto determine that theywere correct­ly programmed. The verify is accomplished with G
at VIL, E at VIH,VPPat 12.75V and VCCat 6.25V.

tGHQZ

tGHAX

AI00730

8/15

M27W402

On-Board Programming

The M27W402 can be directly programmed in the
application circuit. See the relevant Application
Note AN620.

Electronic Signature

The Electronic Signature (ES) mode allows the
reading out of a binary code froman EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically matchthe deviceto beprogrammed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C ± 5°C am­bient temperaturerange that is required when pro­gramming the M27W402. To activate the ES
mode, the programming equipment must force

11.5V to 12.5V on address line A9 of the
M27W402 with VPP=VCC= 5V. Two identifier
bytes maythen besequenced fromthe deviceout­puts bytoggling address lineA0from VILtoVIH. All
other address lines must be held at VILduring
Electronic Signature mode. Byte 0 (A0 = VIL) rep­resents the manufacturer code and byte 1
(A0 = VIH) the device identifier code. For the
STMicroelectronics M27W402,these two identifier
bytes are given in Table 4 and can be read-out on
outputs Q7 to Q0.

Note that the M27W402 and M27C4002 have the
same identifier bytes.

ERASUREOPERATION (applies to UV EPROM)

The erasure characteristics of the M27W402 are
such that erasure begins when the cells are ex­posed to light with wavelengths shorter than ap­proximately 4000 Å. It should be noted that
sunlight and some type of fluorescent lamps have
wavelengths in the 3000-4000 Å range. Research
shows that constant exposure to room level fluo­rescent lighting coulderase a typicalM27W402 in
about 3years, while it would takeapproximately 1
week to cause erasure when exposed to direct
sunlight. If the M27W402 isto be exposed tothese
types of lighting conditions forextended periods of
time, it is suggested thatopaquelabelsbeput over
the M27W402 window to prevent unintentional
erasure. The recommended erasureprocedure for
the M27W402 is exposureto shortwave ultraviolet
light which haswavelength 2537Å. The integrated
dose (i.e. UV intensityx exposure time) forerasure
should be a minimum of 15 W-sec/cm2. The era­sure time with this dosage is approximately 15 to
20 minutes using an ultraviolet lamp with 12000
µW/cm2power rating. The M27W402 should be
placed within 2.5cm (1inch) of thelamptubes dur­ing the erasure. Some lamps havea filter on their
tubes which should be removed before erasure.

9/15

M27W402

Table 11. OrderingInformation Scheme

Example: M27W402 -100 K 6 TR

Device Type

M27

SupplyVoltage

W = 2.7V to 3.6V

Device Function

402 = 4 Mbit (256Kb x16)

Speed

(1,2)

-100

-120 = 120 ns

= 100 ns

Not For New Design

(3)

-150 = 150 ns

-200 = 200 ns

Package

F = FDIP40W

(4)

B = PDIP40
K = PLCC44

N = TSOP40: 10 x20 mm

(4)

Temperature Range

6=–40to85°C

Options

TR = Tape& Reel Packing

Note: 1. High Speed, seeAC Characteristics section for further information.

2. This speed also guarantees 80ns access time at V

3. These speeds are replaced by the 120ns.

4. Packages option available on request. Please contact STMicroelectronics local Sales Office.

= 3.0V to3.6V.

CC

For a list of available options (Speed, Package, etc...) or for further information on any aspect of this de­vice, please contactthe STMicroelectronics Sales Office nearest to you.

Table 12. Revision History

Date Revision Details

July 1999 First Issue

FDIP42W Package Dimension, L Max added (Table 13)

03/15/00

10/15

TSOP40 Package Dimension changed (Table 16)
0to70°C Temperature Range deleted
Programming Time changed

M27W402

Table 13. FDIP40W - 40 pin Ceramic Frit-seal DIP with window, Package Mechanical Data

Symb

A 5.72 0.225
A1 0.51 1.40 0.020 0.055
A2 3.91 4.57 0.154 0.180
A3 3.89 4.50 0.153 0.177

B 0.41 0.56 0.016 0.022
B1 1.45 – – 0.057 – –

C 0.23 0.30 0.009 0.012
D 51.79 52.60 2.039 2.071

D2 48.26 – – 1.900 – –

E 15.24 – – 0.600 – –
E1 13.06 13.36 0.514 0.526

e 2.54 – – 0.100 – –
eA 14.99 – – 0.590 – –
eB 16.18 18.03 0.637 0.710

L 3.18 4.10 0.125 0.161

S 1.52 2.49 0.060 0.098

∅ 7.62 – – 0.300 – –

α 4° 11° 4° 11°

N40 40

Typ Min Max Typ Min Max

mm inches

Figure 8. FDIP40W - 40 pin Ceramic Frit-seal DIP with window, Package Outline

A2

B1 B e

A3A1A

L

α

C

eA

D2

eB

D

S

N

∅

1

Drawing is notto scale.

E1 E

FDIPW-a

11/15

M27W402

Table 14. PDIP40 - 40 pin Plastic DIP, 600 mils width, Package Mechanical Data

Symb

Typ Min Max Typ Min Max

A 4.45 – – 0.175 – –
A1 0.64 0.38 – 0.025 0.015 –
A2 3.56 3.91 0.140 0.154

B 0.38 0.53 0.015 0.021
B1 1.14 1.78 0.045 0.070

C 0.20 0.31 0.008 0.012

D 51.78 52.58 2.039 2.070

D2 48.26 – – 1.900 – –

E 14.80 16.26 0.583 0.640
E1 13.46 13.99 0.530 0.551
e1 2.54 – – 0.100 – –
eA 15.24 – – 0.600 –
eB 15.24 17.78 0.600 0.700

L 3.05 3.81 0.120 0.150

S 1.52 2.29 0.060 0.090

α 0° 15° 0° 15°

mm inches

N40 40

Figure 9. PDIP40 - 40 lead PlasticDIP, 600 mils width, Package Outline

A2A1A

L

B1 B e1

D2

α

C

eA

eB

D

S

N

E1 E

1

PDIP

Drawing is notto scale.

12/15

M27W402

Table 15. PLCC44 - 44 lead Plastic Leaded Chip Carrier, Package Mechanical Data

Symb

Typ Min Max Typ Min Max

A 4.20 4.70 0.165 0.185
A1 2.29 3.04 0.090 0.120
A2 – 0.51 – 0.020

B 0.33 0.53 0.013 0.021
B1 0.66 0.81 0.026 0.032

D 17.40 17.65 0.685 0.695

D1 16.51 16.66 0.650 0.656
D2 14.99 16.00 0.590 0.630

E 17.40 17.65 0.685 0.695
E1 16.51 16.66 0.650 0.656
E2 14.99 16.00 0.590 0.630

e 1.27 – – 0.050 – –

F 0.00 0.25 0.000 0.010

R 0.89 – – 0.035 – –

N44 44

CP 0.10 0.004

mm inches

Figure 10. PLCC44 - 44 lead Plastic Leaded Chip Carrier, Package Outline

D

D1

1N

Ne E1 E

F

D2/E2

0.51 (.020)

1.14 (.045)

Nd

R

PLCC

Drawing is notto scale.

A1

A2

B1

e

B

A

CP

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M27W402

Table 16. TSOP40 - 40 lead Plastic Thin Small Outline, 10 x 20 mm, Package Mechanical Data

mm inch

Symbol Typ Min Max Typ Min Max

A 1.200 0.0472
A1 0.050 0.150 0.0020 0.0059
A2 0.950 1.050 0.0374 0.0413

B 0.170 0.270 0.0067 0.0106

C 0.100 0.210 0.0039 0.0083
D 19.800 20.200 0.7795 0.7953

D1 18.300 18.500 0.7205 0.7283

e 0.500 – – 0.0197 – –

E 9.900 10.100 0.3898 0.3976

L 0.500 0.700 0.0197 0.0276

α 0° 5° 0° 5°

CP 0.100 0.0039

N32 1.3

Figure 11. TSOP40 - 40 lead Plastic Thin Small Outline, 10 x 20 mm, Package Outline

A2

1N

e

E

B

N/2

D1

D

DIE

A

CP

C

TSOP-a

Drawing is notto scale.

LA1 α

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