Page 1
Low Voltage UV EPROM and OTP EPROM
■ 2.7 to 3.6V LOW VOLTAGE in READ
OPERATION
■ READ ACCESS TIME:
–80ns at V
– 100ns at V
■ BYTE-WIDE or WORD-WIDE
CONFIGURABLE
■ 4 Mbit MASK ROM REPLACEMENT
■ LOW POWER CONSUMPTION
– Active Current 20mA at 8MHz
– Stand-by Current 15µA
■ PROGRAMMI N G VOLT AG E: 1 2.5V ± 0.25V
■ PROGRAMMING TIME: 50µs/word
■ ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: B8h
DESCRIPTION
The M27W400 is a low voltage 4 Mbit EPROM offered in the two range UV (Ultra Violet Erase) and
OTP (one time programmab le). It is ideally suited
for microprocessor systems requiring large data or
program storage. It is organised as either 512
Kwords of 8 bit or 256 Kwords of 16 bit. The pinout is compatible with the most common 4 Mbit
Mask ROM.
The M27W400 operates in the read mode with a
supply voltage as low as 2.7V at –40 to 85°C temperature range. The decrease in operating power
allows either a reduction of the size of the battery
or an increase in the time between battery recharges.
The FDIP40W (window ceramic frit-seal package)
has a transparent lid which all ows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the
device by following the programming procedure.
For application where the content is programmed
only one time and erasure is not required, the
M27W400 is offered in PDIP40 and PLCC44 packages.
= 3.0 to 3.6V
CC
= 2.7 to 3.6V
CC
M27W400
4 Mbit (512Kb x8 or 256Kb x16)
40
1
FDIP40W (F) PDIP40 (B)
PLCC44 (K)
Figure 1. Logic Diagram
18
A0-A17
E
G
BYTEV
PP
40
V
CC
M27W400
V
SS
1
Q15A–1
15
Q0-Q14
AI03096
1/15January 2000
Page 2
M27W400
Figure 2A. DIP Connections
A17 A8
1
2
A7
A6
3
4
A5
5
A4
A3
6
7
A2
A1
8
9
A0
E
10
M27W400
11
V
SS
G
12
13
Q0
14
Q8
15
Q1
16
Q9
17
Q2
18
19
Q3
Q11
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
2120
AI03097
A9
A10
A11
A12
A13
A14
A15
A16
BYTEV
V
SS
Q15A–1
Q7
Q14
Q6
Q13
Q5
Q12Q10
Q4
V
CC
PP
Figure 2B. LCC Connections
A7
A5
A6
A4
A3
A2
A1 A15
A0
E
12
V
SS
Q0
Q8
Q1
Q9
Q2
A17
M27W400
Q3
Q10
NC
1
23
Q11
NC
NC
44
NC
CC
V
A8
Q4
A9
Q12
A10
Q5
A11
34
Q13
A12
A13
A14
A16
BYTEV
V
SS
Q15A–1G
Q7
Q14
Q6
AI03604
PP
Table 1. Signal Names
A0-A17 Address Inputs
Q0-Q7 Data Outputs
Q8-Q14 Data Outputs
Q15A–1 Data Output / Address Input
E
G
BYTE
V
CC
V
SS
V
PP
Chip Enable
Output Enable
Byte Mode / Program Supply
Supply Voltage
Ground
DEVICE OPERATION
The operating modes of the M27W400 are listed in
the Operating Modes Table. A single power supply
is required in the read mode. All inputs are TTL
compatib le exc ept for V
and 12V on A9 for the
PP
Electronic Signature.
Read Mode
The M27W400 has two organisations, Wo rd-wide
and Byte-wide. The organisation is selected by the
signal level on the BYTE
VPP pin. When BYTEV
PP
is at VIH the Word-wide organisation is selected
and the Q15A–1 pin is used for Q15 Data Output.
When the BYTE
VPP pin is at VIL the Byte-wide organisation is selected and the Q15A–1 pin is used
for the Address Input A–1. When the memory is
logically regarded as 16 bit wid e, but read in the
Byte-wide organisation, then with A–1 at V
IL
the
lower 8 bits of the 16 bit data are selected and with
A–1 at V
the upper 8 bits of the 16 bit dat a are
IH
sele cte d.
2/15
Page 3
M27W400
Table 2. Absolute Maximum Ratings
(1)
Symbol Parameter Value Unit
T
A
T
BIAS
T
STG
(2)
V
IO
V
CC
(2)
V
A9
V
PP
Note: 1. Except for the rating “Operating Temperature Range”, s tr esses above those li sted in t he Table “Absolute M aximum Rat i ngs” may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indi cated in t he Operat ing sections of thi s specif i cation is not impl i ed. Exposure to Absolute Maximum Rating conditions for extended per iods may aff ect device reliabilit y. Refer also to the STMicroel ectronics SURE Program an d other relevan t qual ity docum en ts .
2. Minim um DC vo ltage on Inpu t or Out put is – 0.5V w ith po ssible undersh oot to –2.0V fo r a pe riod les s than 20ns. Ma ximu m DC
voltage on Output is V
3. Depends on range.
Ambient Operating Temperature
Temperature Under Bias –50 to 125 °C
Storage Temperature –65 to 150 °C
Input or Output Voltage (except A9) –2 to 7 V
Supply Voltage –2 to 7 V
A9 Voltage –2 to 13.5 V
Program Supply Voltage –2 to 14 V
+0.5V with possible overshoot to VCC +2V for a period l ess than 20ns.
CC
(3)
–40 to 125 °C
Table 3. Operating Modes
Mode E
Read Word-wide
Read Byte-wide Upper
Read Byte-wide Lower
Output Disable
Program
V
IL
Verify
Program Inhibit
Standby
Electronic Signature
Note: X = VIH or VIL, VID = 12V ± 0.5V.
V
IL
V
IL
V
IL
V
IL
Pulse V
V
IH
V
IH
V
IH
V
IL
V
V
V
V
V
V
V
BYTEV
G
IL
IL
IL
IH
IH
IL
IH
V
IH
V
IL
V
IL
X X Hi-Z Hi-Z Hi-Z
V
PP
V
PP
V
PP
A9 Q7-Q0 Q14-Q8 Q15A–1
PP
X Data Out Data Out Data Out
X Data Out Hi-Z
X Data Out Hi-Z
X Data In Data In Data In
X Data Out Data Out Data Out
X Hi-Z Hi-Z Hi-Z
V
IH
V
IL
X X X Hi-Z Hi-Z Hi-Z
IL
V
IH
V
ID
Codes Codes Code
Table 4. Electronic Signature
Identifier A0
Manufacturer’s Code
Device Code
V
IL
V
IH
Q15
or Q7
Q14
or Q6
Q13
or Q5
Q12
or Q4
Q11
or Q3
Q10
or Q2
Q9 or Q1Q8 or
Q0
Hex Data
00100000 20h
10111000 B8h
3/15
Page 4
M27W400
Table 5. AC Measurement Conditions
High Speed Standard
Input Rise and Fall Times ≤ 10ns ≤ 20ns
Input Pulse Voltages 0 to 3V 0.4V to 2.4V
Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V
Figure 3. Tes ting Inp ut Output Wav ef orm
High Speed
3V
1.5V
0V
Standard
2.4V
0.4V
Table 6. Capacitance
Symbol Parameter Test Condition Min Max Unit
C
IN
C
OUT
Note: 1. Sampled only, not 100% tested.
Input Capacitance (except BYTEVPP)V
Input Capacitance (BYTE
Output Capacitance
(1)
(TA = 25 °C, f = 1 MHz)
2.0V
0.8V
AI01822
VPP)V
Figure 4. AC Testing Load Circuit
1.3V
1N914
3.3kΩ
DEVICE
UNDER
TEST
CL
CL = 30pF for High Speed
CL = 100pF for Standard
CL includes JIG capacitance
V
IN
IN
OUT
= 0V
= 0V
= 0V
10 pF
120 pF
12 pF
OUT
AI01823B
The M27W400 has two control functions, both of
which must be logically ac tive in order to obtain
data at the outputs. In addition the Word-wide or
Byte- wide organisation must be selected.
Chip Enable (E
used for device selection. Output Enable (G
) is the power control and should be
) is the
output control and should be used to gate data to
the output pins in dependent of device selection.
Assuming that the addresses are s table, the address access time (t
4/15
) is equal to the delay
AVQV
from E to output (t
output after a delay of t
, assuming that E has been low and the ad-
of G
dresses have been stable for at least t
). Data is available at the
ELQV
from the falling e dge
GLQV
AVQV-tGLQV
Standby Mode
The M27W400 has a standby mode which reduc-
es the supply current from 20mA to 15µA. The
M27W400 is placed in the standby mode by applying a CMOS high signal to the E
input. When in the
standby mode, the outputs are in a high impedance state, independent of the G
input.
.
Page 5
M27W400
Table 7. Read Mode DC Characteristics
(1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 2.7 to 3.6V; VPP = VCC)
Symbol Parameter Test Condition Min Max Unit
I
I
I
CC
I
CC1
I
CC2
I
V
V
IH
V
V
Note: 1. VCC must be ap pl i e d simultaneously wit h or before VPP and removed simultane ously or aft er VPP.
Input Leakage Current
LI
Output Leakage Curren t
LO
Supply Current
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
PP
Input Low Voltage –0.6
IL
(2)
Input High Voltage
Output Low Voltage
OL
Output High Voltage TTL
OH
2. Maximum DC voltage on Output i s V
CC
+0.5 V.
I
OUT
I
OUT
0V ≤ V
0V ≤ V
E
E
E
≤ V
IN
CC
≤ V
OUT
= VIL, G = VIL,
= 0mA, f = 8MHz
= VIL, G = VIL,
= 0mA, f = 5MHz
E
= V
> VCC – 0.2V
V
PP
I
= 2.1mA
OL
I
= –400µA
OH
= V
CC
IH
CC
±1 µA
±10 µA
20 mA
15 mA
1mA
15 µA
10 µA
0.2 V
CC
0.7 V
CCVCC
2.4 V
+ 0.5
0.4 V
V
V
Two Line Outp ut C ontrol
Because EPROMs are usually used in larger
memory arrays, this product features a 2-line control function which accommodates the use of multiple memory connection. The two-line control
function allows:
a. the lowest possible memory power dissipation
b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control
lines, E
ry device selecting function, while G
should be decoded and used as the prima-
should be
made a common connectio n to all devices in the
array and connected to the READ
line from the
system control bus. This ensures that all deselected memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
supplies to the devices. The supply current I
CC
has three segments of importance to the system
designer: the standby current, the active current
and the transient peaks that are produced by the
falling and rising edges of E
. The magnitude of the
transient current peaks is dependent on the capacitive and inductive loadi ng of the device outputs. The associated transient voltage peaks can
be suppressed by complying with the two line output control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceramic capacitor is used on every device between V
CC
and VSS. This should be a high frequency type of
low inherent inductance and should be placed as
close as possible to the device. In addition, a
4.7µF electrolytic capacitor should be used between V
and VSS for every eight devices. This
CC
capacitor should be mounted near the power supply connection point. The purpose of this capacitor
is to overcome the voltage d r op caus ed by the inductiv e effects of PCB traces.
5/15
Page 6
M27W400
Table 8. Read Mode AC Characteristics
(1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 2.7 to 3.6V; VPP = VCC)
M27W400
(3)
-100
Symbol Alt Parameter Test Condition
t
AVQV
t
BHQV
t
ELQV
t
GLQV
(2)
t
BLQZ
(2)
t
EHQZ
(2)
t
GHQZ
t
AXQX
t
BLQX
Note: 1. VCC must be ap pl i e d simultaneously wit h or before VPP and removed simultane ously or aft er V
2. Sampled only, not 100% tested.
3. Speed obt ai ned with High Speed measurement conditions.
Address Valid to Output
t
ACC
Valid
BYTE High to Output
t
ST
Valid
Chip Enable Low to
t
CE
Output Valid
Output Enable Low to
t
OE
Output Valid
t
BYTE Low to Output Hi-Z
STD
Chip Enable High to
t
DF
Output Hi-Z
Output Enable High to
t
DF
Output Hi-Z
Address Transition to
t
OH
Output Transition
BYTE Low to Output
t
OH
Transition
= VIL, G = V
E
= VIL, G = V
E
= V
G
= V
E
E
= VIL, G = V
= V
G
= V
E
= VIL, G = V
E
= VIL, G = V
E
IL
IL
IL
IL
V
= 3.0
CC
to 3.6V
VCC = 2.7
to 3.6V
Min Max Min Max Min Max
IL
IL
80 100 120 ns
80 100 120 ns
80 100 120 ns
40 50 60 ns
IL
40 50 60 ns
040050060ns
040050060ns
555ns
IL
555ns
IL
PP
-120
VCC = 2.7 to
3.6V
Unit
6/15
Page 7
Figure 5. Word-Wide Read Mode AC Waveforms
M27W400
A0-A17
E
G
Q0-Q15
Note: BYTEVPP = VIH.
VALID
tAVQV
tGLQV
tELQV
Figure 6. Byte-Wide Read Mode AC Waveforms
A–1,A0-A17
VALID
VALID
tAXQX
tEHQZ
tGHQZ
Hi-Z
AI01636
VALID
E
G
Q0-Q7
Note: BYTEVPP = V
tAVQV
tGLQV
tELQV
IL.
tAXQX
tEHQZ
tGHQZ
Hi-Z
AI01637
7/15
Page 8
M27W400
Figure 7. BYTE Transition AC Waveforms
A0-A17
A–1
tAVQV
BYTEV
PP
Q0-Q7
tBLQX
Q8-Q15
tBLQZ
Note: C hi p Enable (E) and Output En able (G) = VIL.
Table 9. Programming Mode DC Characteri stics
VALID
VALID
(1)
Hi-Z
tAXQX
tBHQV
DATA OUT
DATA OUT
AI01638B
(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.5V ± 0.25V)
Symbol Parameter Test Condition Min Max Unit
0 ≤ V
E
= V
I
= 2.1mA
OL
I
= –2.5mA
OH
IN
≤ V
IL
CC
±1 µA
50 mA
V
+ 0.5
CC
0.4 V
3.5 V
I
LI
I
CC
I
PP
V
V
V
OL
V
OH
V
Note: 1. VCC must be ap pl i e d simultaneously wit h or before VPP and removed simultane ously or aft er VPP.
Input Leakage Current
Supply Current 50 mA
Program Current
Input Low Voltage –0.3 0.8 V
IL
Input High Voltage 2.4
IH
Output Low Voltage
Output High Voltage TTL
A9 Voltage 11.5 12.5 V
ID
V
Programming
When delivered (and after each erasure for UV
EPROM), all bits of the M27W400 are in the ’1’
state. Data is introduced by selectively program ming ’0’s into the desired bit locations. Although
only ’0’s wil l be programmed, both ’1’s and ’0’ s can
be present in the data word. The only way to
8/15
change a ’0’ to a ’1’ is by die exposition to ultraviolet light (UV EPROM). The M27W400 is in the programming mode when V
at V
and E is p ulse d to VIL. The data to b e pro-
IH
input is at 12.5V, G is
PP
grammed is applied to 16 bits in parallel to the data
output pins. The levels required for the address
and data inputs are TTL. V
is specified to be
CC
6.25V ± 0.25V.
Page 9
M27W400
Table 10. Programming Mode AC Characteristics
(1)
(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.5V ± 0.25V)
Symbol Alt Parameter Test Condition Min Max Unit
t
AVEL
t
QVEL
t
VPHAV
t
VCHAV
t
ELEH
t
EHQX
t
QXGL
t
GLQV
(2)
t
GHQZ
t
GHAX
Note: 1. V
2. Sampled only, not 100% tested.
t
Address Valid to Chip Enable Low 2 µs
AS
t
Input Valid to Chip Enable Low 2 µs
DS
t
t
t
t
must be ap pl i ed simultaneously wi t h or before VPP and removed simultaneously or after VPP.
CC
VPS
VCS
t
PW
t
DH
OES
t
OE
DFP
t
AH
VPP High to Address Valid
VCC High to Address Valid
Chip Enable Program Pulse Width 45 55 µs
Chip Enable High to Input Transition 2 µs
Input Transition to Output Enable Low 2 µs
Output Enable Low to Output Valid 120 ns
Output Enable High to Output Hi-Z 0 130 ns
Output Enable High to Address
Transition
2µs
2µs
0ns
Figure 8. Programming and Verify Mod es AC Wavefor ms
A0-A17
Q0-Q15
BYTEV
V
CC
E
G
PP
tVPHAV
tVCHAV
VALID
tAVEL
DATA IN DATA OUT
tQVEL
tELEH
PROGRAM VERIFY
tEHQX
tQXGL
tGLQV
tGHQZ
tGHAX
AI01639
9/15
Page 10
M27W400
Figure 9. Programming Flowchart
VCC = 6.25V, VPP = 12.5V
n = 0
E = 50µs Pulse
NO
NO
VERIFY
YES
NO
Last
Addr
YES
CHECK ALL WORDS
BYTEVPP =V
1st: VCC = 5V
2nd: VCC = 2.7V
IH
++ Addr
YES
++n
= 25
FAIL
AI03600
On-B oard Programmi ng
The M27W400 can be directly programmed in the
application circuit. See the relevant Application
Note AN620.
Electronic Signature
The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufac turer and type. This m ode
is intended for use by program ming equipme nt to
automatically match the device to be programmed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the M27W400. To activate the ES
mode, the programming equipment must force
11.5V to 12.5V on address line A9 of the
M27W400, with V
PP=VCC
= 5V. Two identifier
bytes may then be sequenced from the device outputs by toggling address line A0 from V
other address lines must be held at V
to VIH. All
IL
during
IL
Electronic Signature mode.
Byte 0 (A0 = V
code and byte 1 (A0 = V
) represents the manufacturer
IL
) the device identifier
IH
code. For the STMicroelectronics M27W400,
these two identifier bytes are given in Table 4 and
can be read-out on outputs Q7 to Q0.
PRESTO III P rog ra m mi ng Algorithm
The PRESTO III Programming Algorithm allows
the whole array to be program ed with a guaranteed margin in a typical time of 26 secon ds. Programming with PRESTO I II con sists of a pplying a
sequence of 50µs program pulses to e ach word
until a correct verify occurs (see Figure 9). During
programing and verify operation a MARGIN
MODE circuit is automatically activated to guarantee that each cell is programed with e nough margin. No overpromise pulse is applied since the
verify in MARGIN MODE provides the necessary
margin to each programmed cell.
Program Inhibit
Programming of multiple M27W400s in parallel
with different data is also easily accomplished. Except fo r E
, all like inputs including G of the parallel
M27W400 may be common. A TTL low level pulse
applied to a M27W400's E
will program th at M27W400. A hig h level E
input and VPP at 12.5V,
input
inhibits the other M27W400s from being programmed.
Program Verify
A verify (read) should be performed on the programmed bits to determine that they were correctly programmed. The verify is accomplished with E
at VIH and G at VIL, VPP at 12.5V and VCC at
6.25V.
ERASURE OPERATION (applies to UV EPROM)
The erasure characteristics of the M27W400 is
such that erasure begins when the cells are exposed to light with waveleng ths shorter than approximately 4000 Å. It should be noted that
sunlight and some type of fluorescent lamps have
wavelengths in the 3000-4000 Å range. Research
shows that constant exposure to room level fluorescent lighting could erase a typical M27W400 in
about 3 years, while it would take approximately 1
week to cause erasure when exposed to direct
sunlight. If the M27W400 is to be exposed to these
types of lighting conditions for extended periods of
time, it is suggested that opaque labels be put over
the M27W400 window to prevent unintentional
erasure. The recommended erasure procedure for
M27W400 is exposure to short wave ultraviolet
light which has a wav eleng th of 2537 Å. The integrated dose (i.e. UV intensity x exposure time) for
erasure should be a minimum of 30 W-sec/cm
The erasure time with this dosage is approximately 30 to 40 minutes using an ultraviolet lamp with
12000 µW/cm
2
power rating. The M27W400
should be placed within 2.5cm (1 inch) of t he l amp
tubes during the erasure. Some lamps have a filter
on their tubes which should be removed before
erasure.
2
.
10/15
Page 11
Table 11. Ordering Information Scheme
Example: M27W400 -100 X F 6 TR
Device Type
M27
Supply Voltage
W = 2.7 to 3.6V
Device Function
400 = 4 Mbit (512Kb x8 or 256Kb x16)
Speed
(1,2)
-100
-120 = 120ns
V
blank = ± 10%
X = ± 5%
Package
F = FDIP40W
B = PDIP40
K = PLCC44
Tolerance
CC
= 100 ns
(3)
M27W400
Temperature Range
6 = –40 to 85 °C
Options
TR = Tape & Reel Packing
Note: 1. High Speed, see AC Characteris t ic s section for further inf ormation .
2. This speed also guarantees 80 ns access time at V
3. For Ceramic Packa ge please cont act our Sale s Of fice.
= 3.0 to 3.6V.
CC
For a list of available options (Speed, Pac kage, etc...) or for furthe r information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you.
Table 1. Revision History
Date Revision Details
November 1999 First Issue
From TARGET SPECIFICATION to DATA SHEET
01/19/00
120ns speed class added
Temperature Range 1 removed
Note 3 added (Table 11)
11/15
Page 12
M27W400
Table 12. FDIP40W - 40 lead Ceramic Frit-seal DIP with window, Package Mechanical Data
Symb
A 5.72 0.225
A1 0.51 1.40 0.020 0.055
A2 3.91 4.57 0.154 0.180
A3 3.89 4.50 0.153 0.177
B 0.41 0. 56 0.016 0.022
B1 1.45 – – 0.057 – –
C 0.23 0.30 0.009 0.012
D 51.79 52.60 2.039 2.0 71
D2 48.26 – – 1.900 – –
E 15.24 – – 0.600 – –
E1 13.06 13.36 0.514 0.526
e 2.54 – – 0.100 – –
ea. 14.99 – – 0.590 – –
be 16 .18 18.03 0.637 0.710
L 3.18 – 0.125 –
S 1.52 2. 49 0.060 0.098
∅ 8.13 – – 0.320 – –
α 4° 11° 4° 11°
N40 40
Typ Min Max Typ Min Max
mm inches
Figure 10. FDIP40W - 40 lead Ceramic Frit-seal DIP with window, Package Outline
A2
B1 B e
A3
A1AL
α
C
eA
D2
eB
D
S
N
∅
1
Drawing is not to scale.
E1 E
FDIPW-a
12/15
Page 13
M27W400
Table 13. PDIP40 - 40 pin Plastic DIP, 600 mils width, Package Mechanical Data
Symb
Typ Min Max Typ Min Max
A4.45 – – 0.175 – –
A1 0.64 0.38 – 0.025 0.0 15 –
A2 3.56 3.91 0.140 0.154
B 0.38 0. 53 0.015 0.021
B1 1.14 1.78 0.045 0.070
C 0.20 0.31 0.008 0.012
D 51.78 52.58 2.039 2.0 70
D2 48.26 – – 1.900 – –
E 14.80 16.26 0.583 0.640
E1 13.46 13.99 0.530 0.551
e1 2.54 – – 0.1 00 – –
ea. 15.24 – – 0.600 –
be 15 .24 17.78 0.600 0.700
L 3.05 3.81 0.120 0.150
S 1.52 2. 29 0.060 0.090
α 0° 15° 0° 15°
N40 40
mm inches
Figure 11. PDIP40 - 40 lead Plastic DIP, 600 mils width, Package Outline
A2
A1AL
B1 B e1
D2
α
eA
eB
D
S
N
E1 E
1
Drawing is not to scale.
C
PDIP
13/15
Page 14
M27W400
Table 14. PLCC44 - 44 lead Plastic Leaded Chip Carrier, Package Mechanical Data
Symb
Typ Min Max Typ Min Max
A 4.20 4. 70 0.165 0.185
A1 2.29 3.04 0.090 0.120
A2 – 0.51 – 0.020
B 0.33 0. 53 0.013 0.021
B1 0.66 0.81 0.026 0.032
D 17.40 17.65 0.685 0.6 95
D1 16.51 16.66 0.650 0.6 56
D2 14.99 16.00 0.590 0.6 30
E 17.40 17.65 0.685 0.695
E1 16.51 16.66 0.650 0.656
E2 14.99 16.00 0.590 0.630
e 1.27 – – 0.050 – –
F 0. 00 0.25 0.000 0.010
mm inches
R 0.89 – – 0.035 – –
N44 44
CP 0.10 0.004
Figure 12. PLCC44 - 44 lead Plastic Leaded Chip Carrier, Package Outline
D
D1
1 N
Ne E1 E
A2
F
D2/E2
A1
B
0.51 (.020)
1.14 (.045)
Nd
A
B1
e
PLCC
Drawing is not to scale.
14/15
R
CP
Page 15
M27W400
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