Datasheet M27V160 Datasheet (SGS Thomson Microelectronics)

Low Voltage UV EPROM and OTP EPROM

■ 3V to 3.6V LOW VOLTAGE in READ

OPERATION

■ ACCESS TIME: 100ns

■ BYTE-WIDE or WORD-WIDE

CONFIGURABLE

■ 16 Mbit MASK ROM REPLACEMENT

■ LOW POWER CONSUMPTION

– Active Current 30mA at 8MHz
– Standby Current 60µA

■ PROGRAMMING VOLTAGE: 12.5V ± 0.25V

■ PROGRAMMING TIME: 50µs/word

■ ELECTRONIC SIGNATURE

– Manufacturer Code: 20h
– Device Code: B1h

DESCRIPTION

The M27V160 is a low voltage 16 Mbit EPROM of­fered in the two ranges UV (ultra violet erase) and
OTP (one time programmable). It is ideally suited
for microprocessor systems requiringlarge data or
program storage. It is organised as either 2 Mbit
words of 8 bit or 1 Mbit words of 16 bit. The pin-out
is compatible with a 16 Mbit Mask ROM.

The M27V160 operates in the read mode with a
supply voltage as low as 3V. The decrease in op­erating power allows either a reduction of the size
of the battery or an increase in the time between
battery recharges.

The FDIP42W (window ceramic frit-seal package)
has a transparent lid which allows the user to ex­pose the chiptoultraviolet light to erase thebitpat­tern. A new pattern can then be written rapidly to
the device by following the programming proce­dure.

For applications where the content is programmed
only one time and erasure is not required, the
M27V160 is offered in PDIP42 and SO44 packag­es.

M27V160

16 Mbit (2Mb x8 or 1Mb x16)

42

1

FDIP42W (F) SO44 (M)

42

1

PDIP42 (B)

Figure 1. Logic Diagram

V

CC

20

A0-A19

BYTEV

E

G

PP

M27V160

V

SS

44

1

Q15A–1

15

Q0-Q14

AI01898

1/15March 2000

M27V160

Figure 2A. DIP Connections

A18 A19

1
2

A7

3
4

A6

5

A5
A4

6

A3

7

A2

8

A1

9

A0

10

M27V160

V

SS

Q0
Q8
Q1
Q9

Q10

Q3

Q11

E

11
12

G

13
14
15
16
17
18
19
20
21

42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22

AI01899

A8A17
A9
A10
A11
A12
A13
A14
A15
A16
BYTEV
V

SS

Q15A-1
Q7
Q14
Q6
Q13
Q5Q2
Q12
Q4
V

CC

PP

Figure 2B. SO Connections

NC NC

A17 A8

A7
A6
A5
A4
A3
A2
A1
A0

V

SS

Q0
Q8

Q9

Q10

Q3

Q11

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17Q1
18
19
20
21

M27V160

E

G

44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
2322

AI01900

A19A18

A9
A10
A11
A12
A13
A14
A15
A16
BYTEV
V

SS

Q15A-1
Q7
Q14
Q6
Q13
Q5Q2
Q12
Q4
V

CC

PP

Table 1. Signal Names

A0-A19 Address Inputs
Q0-Q7 Data Outputs
Q8-Q14 Data Outputs
Q15A–1 Data Output / Address Input
E Chip Enable
G
BYTEV

PP

V

CC

V

SS

NC Not Connected Internally

2/15

Output Enable
Byte Mode / Program Supply
Supply Voltage
Ground

DEVICE OPERATION

The operating modes of the M27V160 are listed in
the OperatingModes Table.A single power supply
is required in the read mode. All inputs are TTL
compatible except for VPPand 12V on A9 for the
Electronic Signature.

Read Mode

The M27V160 has two organisations, Word-wide
and Byte-wide.The organisation is selected bythe
signal level on the BYTEVPPpin. When BYTEV

PP

is at VIHthe Word-wide organisation is selected
and the Q15A–1 pin is used for Q15 Data Output.
When the BYTEVPPpinis at VILthe Byte-wide or­ganisation is selected and theQ15A–1 pin isused
for the Address Input A–1. When the memory is
logically regarded as 16 bit wide, but read in the
Byte-wide organisation, then with A–1 at VILthe
lower 8bits of the 16bit data are selected and with
A–1 at VIHthe upper 8 bits of the 16 bit data are
selected.

M27V160

Table 2. Absolute Maximum Ratings

(1)

Symbol Parameter Value Unit

T

A

T

BIAS

T

STG

(2)

V

IO

V

CC

(2)

V

A9

V

PP

Note: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may

cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi­tions for extended periods may affect device reliability. Refer also tothe STMicroelectronics SURE Program andotherrelevant qual­ity documents.

2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V

3. Depends on range.

Ambient Operating Temperature
Temperature Under Bias –50 to 125 °C
Storage Temperature –65 to 150 °C

Input or Output Voltage (except A9) –2 to 7 V
Supply Voltage –2 to 7 V
A9 Voltage –2 to 13.5 V
Program Supply Voltage –2 to 14 V

+0.5V with possible overshoot to VCC+2V for a period less than 20ns.

CC

(3)

–40 to 125 °C

Table 3. Operating Modes

Mode E G

Read Word-wide
Read Byte-wide Upper V
Read Byte-wide Lower
Output Disable V
Program

V
Verify
Program Inhibit
Standby
Electronic Signature

Note: X = VIHor VIL,VID= 12V ± 0.5V.

V

IL

IL

V

IL

IL

Pulse V

IL

V

IH

V

IH

V

IH

V

IL

V
V
V

V

V

V

X X X Hi-Z Hi-Z Hi-Z

V

BYTEV

PP

IL

IL

IL

IH

IH

IL

IH

IL

V

IH

V

IL

V

IL

X X Hi-Z Hi-Z Hi-Z

V

PP

V

PP

V

PP

V

IH

A9 Q15A–1 Q14-Q8 Q7-Q0

X Data Out Data Out Data Out
XVIHHi-Z Data Out
X

V

IL

Hi-Z Data Out

X Data In Data In Data In
X Data Out Data Out Data Out
X Hi-Z Hi-Z Hi-Z

V

ID

Code Codes Codes

Table 4. Electronic Signature

Identifier A0

Manufacturer’s Code
Device Code

Q15

and

Q7

V

IL

V

IH

Q14

and

Q6

Q13
and

Q5

00100000 20h
10110001 B1h

The M27V160 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. In addition the Word-wide or
Byte- wide organisation must be selected.

Chip Enable (E) isthe power control andshould be
used fordevice selection. Output Enable (G) is the
output control and should be used to gate data to

Q12

and

Q4

Q11
and

Q3

Q10
and

Q2

Q9

and

Q1

Q8

andQ0Hex Data

the output pins independent of device selection.
Assuming that the addresses are stable, the ad­dress access time (t
from E to output (t

ELQV

output after a delay of t

) is equal to the delay

AVQV

). Data is available at the

from the falling edge

GLQV

of G, assuming that E has been low and the ad­dresseshavebeen stable forat least t

AVQV-tGLQV

3/15

.

M27V160

Table 5. AC Measurement Conditions

High Speed Standard

Input Rise and Fall Times ≤ 10ns ≤ 20ns
Input Pulse Voltages 0 to 3V 0.4V to 2.4V
Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V

Figure 3. AC Testing Input Output Waveform

High Speed

3V

1.5V

0V

Standard

2.4V

0.4V

Table 6. Capacitance

Symbol Parameter Test Condition Min Max Unit

C

IN

C

OUT

Note: 1. Sampled only, not 100% tested.

(1)

(TA=25°C, f = 1 MHz)

Input Capacitance (except BYTEVPP)V
Input Capacitance (BYTEV
Output Capacitance

2.0V

0.8V

AI01822

)V

PP

Figure 4. AC Testing Load Circuit

1.3V

1N914

Ω

3.3k

DEVICE
UNDER

TEST

C

L

CL= 30pFfor High Speed
CL= 100pFfor Standard
CLincludes JIG capacitance

V

IN

IN

OUT

=0V
=0V

=0V

10 pF

120 pF

12 pF

OUT

AI01823B

Standby Mode

The M27V160 hasa standby mode which reduces
the active currentfrom 20mAto 20µA with low volt-
age operation VCC≤ 3.6V, see Read Mode DC
Characteristics table for details.The M27V160 is
placed in the standby mode by applying a CMOS
high signal to the E input. When in the standby
mode, the outputs are in a high impedance state,
independent of the G input.

Two Line Output Control

Because EPROMs are usually used in larger
memory arrays, this product features a 2 line con­trol function which accommodates the use of mul­tiple memory connection. The two line control
function allows:

4/15

a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention

will not occur.

For the most efficient use of these two control
lines, Eshould be decoded and used asthe prima­ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect­ed memory devices are intheir low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.

M27V160

Table 7. Read Mode DC Characteristics

(1)

(TA= 0 to 70°C or –40 to 85°C; VCC= 3.3V ± 10%; VPP=VCC)

Symbol Parameter Test Condition Min Max Unit

I

I

I

CC

I

CC1

I

CC2

I
V

V

IH

V

V

Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.

Input Leakage Current

LI

Output Leakage Current

LO

E=V

0V ≤ V

0V ≤ V

,G=VIL,I

IL

f = 8MHz, V

Supply Current

E=V

,G=VIL,I

IL

f = 5MHz, V
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current

PP

Input Low Voltage –0.3

IL

(2)

Input High Voltage
Output Low Voltage

OL

Output High Voltage TTL

OH

2. Maximum DC voltage on Output is V

CC

+0.5V.

E>V

CC

I

OH

≤ V

IN

CC

≤ V

OUT

E=V

CC

CC

IH

CC

OUT

≤ 3.6V

OUT

≤ 3.6V

= 0mA,

= 0mA,

–0.2V,VCC≤ 3.6V

V

PP=VCC

I

= 2.1mA

OL

= –400µA

±1 µA

±10 µA

30 mA

20 mA

1mA
60 µA
10 µA

0.2V

CC

0.7V

CC

VCC+1

0.4 V

2.4 V

V
V

System Considerations

The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
supplies to the devices. The supply current I

CC

has three segments of importance to the system
designer: the standby current, the active current
and the transient peaks that are produced by the
falling and rising edges of E. The magnitude of the
transient current peaks is dependent on the ca­pacitive and inductive loading of the device out­puts. The associated transient voltage peaks can
be suppressed by complying with the two line out-

put control and by properly selected decoupling
capacitors.It is recommended thata 0.1µF ceram­ic capacitor is used on every device between V

CC

and VSS. This should be a high frequency type of
low inherent inductance and should be placed as
close as possible to the device. In addition, a

4.7µF electrolytic capacitor should be used be­tween VCCand VSSfor every eight devices. This
capacitor should be mounted near the power sup­ply connection point. The purposeof this capacitor
is to overcome the voltage drop caused by the in­ductive effects of PCB traces.

5/15

M27V160

Table 8. Read Mode AC Characteristics

(1)

(TA= 0 to 70°C or –40 to 85°C; VCC= 3.3V ± 10%; VPP=VCC)

Symbol Alt Parameter TestCondition

E=V
E=V

G=V

E=V

E=V

G=V

E=V

E=V

E=V

,G=V

IL

,G=V

IL

,G=V

IL

,G=V

IL

,G=V

IL

IL

IL

IL

IL

IL

IL

IL

IL

IL

t

AVQVtACC

t

BHQV

t

ELQV

t

GLQV

(2)

t

BLQZ

(2)

t

EHQZ

(2)

t

GHQZ

t

AXQX

t

BLQX

Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after V

2. Sampled only, not 100% tested.

3. Speed obtained with High Speed measurement conditions.

Address Valid to Output Valid

t

BYTE High to Output Valid

ST

t

Chip Enable Low to Output Valid

CE

Output Enable Low to Output

t

OE

Valid

t

BYTE Low to Output Hi-Z

STD

t

Chip Enable High to Output Hi-Z

DF

Output Enable High to Output

t

DF

Hi-Z
Address Transition to Output

t

OH

Transition

t

BYTE Low to Output Transition

OH

(3)

-100

Min Max Min Max Min Max

100 120 150 ns
100 120 150 ns
100 120 150 ns

50 60 60 ns

45 50 50 ns

045050050ns

045050050ns

555ns

555ns

M27V160

-120

PP

-150

Unit

Figure 5. Word-Wide Read Mode AC Waveforms

A0-A19

E

G

Q0-Q15

Note: BYTEVPP=VIH.

VALID

tAVQV

tGLQV

tELQV

VALID

tAXQX

tEHQZ

tGHQZ

Hi-Z

AI00741B

6/15

Figure 6. Byte-Wide Read Mode AC Waveforms

M27V160

A–1,A0-A19

E

G

Q0-Q7

Note: BYTEVPP=VIL.

VALID

tAVQV

tGLQV

tELQV

Figure 7. BYTE Transition AC Waveforms

A0-A19

VALID

tAXQX

tEHQZ

tGHQZ

Hi-Z

AI00742B

VALID

A–1

tAVQV

BYTEV

PP

Q0-Q7

tBLQX

Q8-Q15

tBLQZ

Note: Chip Enable (E) and Output Enable (G) = VIL.

VALID

Hi-Z

tAXQX

tBHQV

DATA OUT

DATA OUT

AI00743C

7/15

M27V160

Table 9. Programming Mode DC Characteristics

(1)

(TA=25°C; VCC= 6.25V ± 0.25V; VPP= 12.5V ± 0.25V)

Symbol Parameter Test Condition Min Max Unit

I

LI

I

CC

I

PP

V
V

V

OL

V

OH

V

Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.

Input Leakage Current
Supply Current 50 mA
Program Current
Input Low Voltage –0.3 0.8 V

IL

Input High Voltage 2.4 VCC+ 0.5 V

IH

Output Low Voltage
Output High Voltage TTL IOH= –2.5mA 3.6 V
A9 Voltage 11.5 12.5 V

ID

Table 10. Programming Mode AC Characteristics

0 ≤ V

I

OL

(1)

≤ V

IN

E=V

IL

= 2.1mA

CC

±1 µA

50 mA

0.4 V

(TA=25°C; VCC= 6.25V ± 0.25V; VPP= 12.5V ± 0.25V)

Symbol Alt Parameter Test Condition Min Max Unit

t

AVEL

t

QVEL

t

VPHAV

t

VCHAV

t

ELEH

t

EHQX

t

QXGL

t

GLQV

(2)

t

GHQZ

t

GHAX

Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.

2. Sampled only, not 100% tested.

t
t

t

VPS

t

VCS

t

t

t

OES

t

t

DFP

t

Address Validto Chip Enable Low 2 µs

AS

Input Valid to Chip Enable Low 2 µs

DS

VPPHigh to Address Valid
VCCHigh to Address Valid
Chip Enable Program Pulse Width 45 55 µs

PW

Chip Enable High to Input Transition 2 µs

DH

2 µs
2 µs

Input Transition to Output Enable Low 2 µs
Output Enable Low to Output Valid 120 ns

OE

Output Enable High to Output Hi-Z 0 130 ns
Output Enable High to Address

AH

Transition

0ns

Programming

The M27V160 has been designed to be fully com­patible with the M27C160. As a result the
M27V160 can be programmed as the M27C160
on the same programming equipments applying

12.75V on VPPand 6.25Von VCCbythe use of the
same PRESTO III algorithm. When delivered (and
after each erasure for UV EPROM), all bits of the
M27V160 are in the ’1’state. Data is introducedby
selectively programming ’0’s to the desired bit lo-

8/15

cations. Although only ’0’s will be programmed,
both ’1’s and ’0’scan be present in the data word.
The only way to change a ’0’to a ’1’is by die expo­sure to ultraviolet light (UV EPROM). The
M27V160 is in the programming mode when V

pp

input is at 12.5V, G is at VIHand Eis pulsedto VIL.
The data to be programmed is applied to 16 bits in
parallel tothedata output pins. The levels required
for the address and data inputs are TTL. VCCis
specified to be 6.25V ± 0.25V.

Figure 8. Programming and Verify Modes AC Waveforms

M27V160

A0-A19

Q0-Q15

BYTEV

PP

tVPHAV

V

CC

tVCHAV

E

G

Figure 9. Programming Flowchart

VCC= 6.25V, VPP= 12.5V

n=0

E=50µs Pulse

NO

NO

VERIFY

YES

Last

NO

Addr

YES

CHECK ALL WORDS

BYTEVPP=V

1st: VCC=5V
2nd: VCC=3V

IH

++ Addr

YES

++n

=25

FAIL

VALID

tAVEL

DATA IN DATA OUT

tQVEL

tELEH

PROGRAM VERIFY

tEHQX

tQXGL

PRESTO III Programming Algorithm

The PRESTO III Programming Algorithm allows
the whole array to be programed with a guaran­teed margin in a typical time of 52.5 seconds. Pro­gramming with PRESTO III consists of applying a
sequence of 50µs program pulses to each word
until a correct verify occurs (see Figure 9).

During programing and verify operation a MAR­GIN MODE circuit is automatically activated to
guarantee thateach cell isprogramed with enough
margin. Nooverprogram pulse is applied sincethe
verify in MARGIN MODE at VCCmuch higher than

3.6V provides the necessary margin to each pro­grammed cell.

Program Inhibit

Programming of multiple M27V160s in parallel
with different data is also easily accomplished. Ex­cept for E,all likeinputs including G of the parallel
M27V160 may be common.A TTL low level pulse
applied to a M27V160’s E input and VPPat 12.5V,
will program that M27V160.A high level E input in­hibits the other M27V160s from being pro­grammed.

Program Verify

A verify (read) should be performed on the pro-

AI00901B

grammed bits to determine that they were correct­ly programmed. The verify is accomplished with E
at VIHand G at VIL,VPPat 12.5V and VCCat

6.25V.

tGLQV

tGHQZ

tGHAX

AI00744

9/15

M27V160

On-Board Programming

The M27V160 can be directly programmed in the
application circuit. See the relevant Application
Note AN620.

Electronic Signature

The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically matchthe device to be programmed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C ± 5°C am­bient temperaturerange that is required when pro­gramming theM27V160. To activatethe ES mode,
the programming equipment must force 11.5V to

12.5V on address line A9 of the M27V160, with
VPP=VCC=5V.

Two identifier bytes may then be sequenced from
the device outputs by toggling address line A0
from VILto VIH. All other address lines must be
held at VILduring Electronic Signature mode.

Byte 0 (A0 = VIL) represents the manufacturer
code and byte 1 (A0 = VIH) the device identifier
code. Forthe STMicroelectronicsM27V160,these
two identifier bytes aregiven in Table 4 andcan be
read-out on outputs Q7 to Q0. Note that the
M27V160 and M27C160 have the same identifier
bytes.

ERASUREOPERATION (applies to UV EPROM)

The erasure characteristics of the M27V160 is
such that erasure begins when the cells are ex­posed to light with wavelengths shorter than ap­proximately 4000 Å. It should be noted that
sunlight and some type of fluorescent lamps have
wavelengths in the 3000-4000 Å range. Research
shows that constant exposure to room level fluo­rescent lighting could erase a typical M27V160 in
about 3 years, while it would take approximately 1
week to cause erasure when exposed to direct
sunlight. If the M27V160 is to be exposed to these
types of lighting conditions for extended periods of
time, itis suggested that opaquelabels beputover
the M27V160 windowto prevent unintentional era­sure. The recommended erasure procedure for
M27V160 is exposure to short wave ultraviolet
light which has a wavelength of 2537 Å. The inte­grated dose (i.e. UV intensity x exposure time) for
erasure should be a minimum of 30 W-sec/cm2.
The erasure time with this dosage is approximate­ly 30 to 40 minutes using an ultraviolet lamp with
12000 µW/cm2power rating. The M27V160
should be placed within 2.5cm (1 inch) of the lamp
tubes during the erasure. Somelamps havea filter
on their tubes which should be removed before
erasure.

10/15

Table 11. Ordering Information Scheme

Example: M27V160 -100 X M 1 TR

Device Type

M27

Supply Voltage

V = 3V to 3.6V

Device Function

160 = 16 Mbit (2Mb x 8 or 1Mb x 16)

Speed

(1)

= 100 ns

-100

-120 = 120 ns

-150 = 150 ns

Tolerance

V

CC

blank = 3.3V ± 10%
X = 3.3V ± 5%

M27V160

Package

F = FDIP42W

(2)

B = PDIP42
M = SO44

(2)

Temperature Range

1=0to70°C
6=–40to85°C

Options

TR = Tape& Reel Packing

Note: 1. High Speed, see AC Characteristics section for further information.

2. Packages option available on request. Please contact STMicroelectronics local Sales Office.

For a list of available options (Speed, Package, etc...) or for further information on any aspect of this de­vice, please contact the STMicroelectronics Sales Office nearest to you.

11/15

M27V160

Table 12. FDIP42W - 42 pin Ceramic Frit-seal DIP, with window, Package Mechanical Data

Symb

A – 5.72 – 0.225
A1 0.51 1.40 0.020 0.055
A2 3.91 4.57 0.154 0.180
A3 3.89 4.50 0.153 0.177

B 0.41 0.56 0.016 0.022
B1 1.45 – – 0.057 – –

C 0.23 0.30 0.009 0.012

D 54.41 54.86 2.142 2.160
D2 50.80 – – 2.000 – –

E 15.24 – – 0.600 – –
E1 14.50 14.90 0.571 0.587

e 2.54 – – 0.100 – –
eA 14.99 – – 0.590 – –
eB 16.18 18.03 0.637 0.710

L 3.18 4.10 0.125 0.161

S 1.52 2.49 0.060 0.098
K 9.40 – – 0.370 – –

K1 11.43 – – 0.450 – –

α 4° 11° 4° 11°
N42 42

Typ Min Max Typ Min Max

mm inches

Figure 10. FDIP42W - 42 pin Ceramic Frit-seal DIP, with window, Package Outline

A2

B1 B e1

A3A1A

L

α

C

eA

D2

eB

D

S

N

E1 E

K

1

Drawing is not to scale.

K1

FDIPW-b

12/15

Table 13. PDIP42 - 42 pin Plastic DIP, 600 mils width, Package Mechanical Data

Symb

A – 5.08 – 0.200
A1 0.25 – 0.010 –
A2 3.56 4.06 0.140 0.160

B 0.38 0.53 0.015 0.021
B1 1.27 1.65 0.050 0.065

C 0.20 0.36 0.008 0.014

D 52.20 52.71 2.055 2.075
D2 50.80 – – 2.000 – –

E 15.24 – – 0.600 – –
E1 13.59 13.84 0.535 0.545

e1 2.54 – – 0.100 – –
eA 14.99 – – 0.590 – –
eB 15.24 17.78 0.600 0.700

L 3.18 3.43 0.125 0.135
S 0.86 1.37 0.034 0.054
α 0° 10° 0° 10°
N42 42

Typ Min Max Typ Min Max

mm inches

M27V160

Figure 11. PDIP42 - 42 pin Plastic DIP, 600 mils width, Package Outline

A2A1A

L

B1 B e1

D2

α

eA
eB

D

S

N

E1 E

1

Drawing is not to scale.

C

PDIP

13/15

M27V160

Table 14. SO44 - 44 lead Plastic Small Outline, 525 mils body width, Package Mechanical Data

Symb

Typ Min Max Typ Min Max

A 2.42 2.62 0.095 0.103

A1 0.22 0.23 0.009 0.010
A2 2.25 2.35 0.089 0.093

B 0.50 0.020
C 0.10 0.25 0.004 0.010
D 28.10 28.30 1.106 1.114
E 13.20 13.40 0.520 0.528

e 1.27 – – 0.050 – –
H 15.90 16.10 0.626 0.634

L 0.80 – – 0.031 – –
α 3° ––3°––
N44 44

CP 0.10 0.004

mm inches

Figure 12. SO44 - 44 lead Plastic Small Outline, 525 mils body width, Package Outline

A2

A

C

B

e

CP

D

N

E

H

1

LA1 α

SO-b

Drawing is not to scale.

14/15

M27V160

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of useofsuch information nor for any infringement of patents or other rights of third parties whichmay result from itsuse. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in lifesupport devices or systems without express written approval of STMicroelectronics.

The ST logo is registered trademark of STMicroelectronics

2000 STMicroelectronics - All Rights Reserved



All other names are the property of their respective owners.

Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco -

Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.

STMicroelectronics GROUP OF COMPANIES

http://www.st.com

15/15