The M27W102 is a low voltage 1 Mbit EPROM
offeredinthetworangesUV(ultravioleterase)and
OTP (one time programmable).It is ideallysuited
formicroprocessorsystemsrequiring large data or
programstorageandisorganizedas 65,536words
by 16 bits.
The M27V102 operates in the read mode with a
supply voltage as low as 3V. The decrease in
operating power allows either a reduction of the
size of the battery or an increase in the time between batteryrecharges.
The FDIP40W(window ceramic frit-seal package)
has a transparent lid which allows the user to
expose the chip to ultraviolet light to erase the bit
pattern. A new pattern can then be written to the
deviceby following theprogramming procedure.
For application where the content is programmed
only one time and erasure is not required, the
M27V102 is offered in PDIP40, PLCC32 and
TSOP40(10 x 14 mm) packages.
DEVICEOPERATION
Theoperating modes of the M27V102are listedin
theOperating Modestable. Asingle powersupply
is required in the read mode. All inputs are TTL
levelsexcept for Vpp and 12V onA9 for Electronic
Signature.
ReadMode
The M27V102 has two control functions, both of
whichmustbelogicallyactiveinordertoobtaindata
attheoutputs. ChipEnable(E) isthepowercontrol
and should be used for device selection. Output
Enable(G)isthe outputcontrolandshouldbe used
to gate data to the output pins, independent of
deviceselection. Assumingthatthe addressesare
stable,the addressaccesstime(t
thedelayfrom Etooutput(t
at the output after a delay of t
). Datais available
ELQV
OE
) is equal to
AVQV
from the falling
edge of G, assuming that E has been low and the
addresses have been stable for at least t
.
t
GLQV
AVQV
-
2/15
Page 3
M27V102
Table 2. Absolute MaximumRatings
(1)
SymbolParameterValueUnit
T
A
T
BIAS
T
STG
V
IO
V
CC
V
A9
V
PP
Notes: 1. Except for therating ”Operating Temperature Range”, stresses above those listed in theTable ”AbsoluteMaximum Ratings”
2. Minimum DC voltage on Input or Output is –0.5V withpossible undershootto –2.0Vfor a periodless than 20ns. Maximum DC
3. Depends on range.
Ambient Operating Temperature
Temperature Under Bias–50 to 125
Storage Temperature–65 to 150°C
(2)
Input or Output Voltages (except A9)–2 to 7V
Supply Voltage–2 to 7V
(2)
A9 Voltage–2 to 13.5V
Program Supply Voltage–2 to 14V
may cause permanent damage to thedevice. These are stress ratings only and operation of the device at these or any other
conditions above those indicatedin the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extendedperiods may affectdevice reliability.Refer also to the STMicroelectronics SURE Programand other
relevant qualitydocuments.
voltage on Output is V
+0.5Vwith possible overshoot to VCC+2V for a periodless than 20ns.
CC
(3)
–40 to 125°C
°
C
Table 3. OperatingModes
ModeEGPA9V
ReadV
Output DisableV
ProgramV
VerifyV
Program InhibitV
StandbyV
Electronic SignatureV
Note: X=VIHor VIL,VID= 12V±0.5V
PP
IL
IL
IL
IL
IH
IH
IL
V
IL
V
IH
XV
V
IL
XXXVPPHi-Z
XXXV
V
IL
V
IH
XXV
PulseXV
IL
V
IH
V
IH
XV
CC
CC
or V
or V
PP
SS
SS
XVPPData Output
or V
CC
SS
V
ID
V
CC
Q0 - Q15
Data Output
Hi-Z
Data Input
Hi-Z
Codes
Table 4. ElectronicSignature
IdentifierA0Q7Q6Q5Q4Q3Q2Q1Q0Hex Data
Manufacturer’s CodeV
Device CodeV
IL
IH
00100000 20h
10001100 8Ch
StandbyMode
TheM27V102hasastandbymode whichreduces
the active current from 15mA to 20µA with low
voltageoperationV
≤ 3.6V,see Read Mode DC
CC
Characteristics table for details. The M27V102 is
placedin thestandbymodeby applyinga TTLhigh
signal to the E input. When in the standby mode,
the outputs are in a high impedance state, independentof the G input.
Two Line Output Control
BecauseEPROMs areusuallyusedin largermemory arrays, this product features a 2 line control
functionwhich accommodatesthe use of multiple
memoryconnection. Thetwo line control function
allows:
a. the lowestpossible memory powerdissipation,
b. complete assurancethat outputbus contention
will not occur.
3/15
Page 4
M27V102
Table 5. AC MeasurementConditions
High SpeedStandard
Input Rise and Fall Times
Input Pulse Voltages0 to 3V0.4V to 2.4V
Input and Output TimingRef. Voltages1.5V0.8V and 2V
≤
10ns
≤
20ns
Figure3. AC TestingInput Output Waveform
High Speed
3V
1.5V
0V
Standard
2.4V
0.4V
Table6. Capacitance
SymbolParameterTest ConditionMinMaxUnit
C
IN
C
OUT
Note: 1. Sampled only, not 100% tested.
Input CapacitanceVIN=0V6pF
Output CapacitanceV
(1)
(TA=25°C, f = 1 MHz )
2.0V
0.8V
AI01822
Figure4. AC Testing LoadCircuit
1.3V
1N914
3.3kΩ
DEVICE
UNDER
TEST
C
L
CL= 30pF for High Speed
CL= 100pFfor Standard
CLincludes JIG capacitance
=0V12pF
OUT
OUT
AI01823B
Forthe mostefficientuseof thesetwocontrollines,
E should be decoded and used as the primary
deviceselecting function,while G shouldbe made
a common connection to all devices in the array
and connected to the READ line from the system
controlbus. Thisensuresthatall deselectedmemory devices are in their low power standby mode
and that the outputpinsare only active whendata
is requiredfrom a particularmemory device.
SystemConsiderations
The power switching characteristics of Advanced
CMOS EPROMsrequire carefuldecouplingof the
devices. The supply current, I
, has three seg-
CC
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
thefallingand risingedgesof E. Themagnitudeof
4/15
transientcurrentpeaksisdependentonthe capacitive and inductive loading of the device at the
output.
The associated transient voltage peaks can be
suppressedby complying with the two line output
control and by properly selected decoupling capacitors. It is recommended thata 0.1µF ceramic
capacitor be used on every device between V
CC
andVSS. Thisshouldbea highfrequencycapacitor
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7µF bulk electrolytic capacitor should be used
betweenVcc and V
for everyeight devices.The
SS
bulk capacitor should be located near the power
supply connection point. The purpose of the bulk
capacitoris to overcome the voltage drop caused
by the inductiveeffectsof PCBtraces.
Page 5
M27V102
Table 7. Read Mode DC Characteristics
(1)
(TA=0 to 70 °C or –40 to 85 °C;VCC= 3.3V ± 10%; VPP=VCC)
SymbolParameterTestConditionMinMaxUnit
I
I
LO
I
CC
I
CC1
I
CC2
I
PP
V
V
IH
V
V
Notes: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
Table 8A. Read ModeAC Characteristics
Input Leakage Current0V ≤ VIN≤ V
LI
Output Leakage Current0V ≤ V
,G=VIL,I
E=V
Supply Current
IL
f = 5MHz, V
Supply Current (Standby) TTLE = V
Supply Current (Standby)
CMOS
E>V
– 0.2V,V
CC
Program CurrentVPP=V
Input Low Voltage–0.30.8V
IL
(2)
Input High Voltage2VCC+1V
Output Low VoltageIOL= 2.1mA0.4V
OL
Output High VoltageTTLIOH= –400µA2.4V
OH
Output High Voltage CMOSI
2. Maximum DCvoltage on Output is V
CC
+0.5V
(1)
= –100µAV
OH
OUT
CC
≤ V
CC
= 0mA,
OUT
≤ 3.6V
CC
IH
3.6V20
≤
CC
CC
– 0.7VV
CC
±10µA
±10µA
15mA
1mA
10
(TA=0 to 70 °C or –40 to 85 °C;VCC= 3.3V ± 10%; VPP=VCC)
A
µ
A
µ
SymbolAltParameterTest Condition
-90
(3)
MinMaxMinMax
t
t
AVQV
t
ELQV
t
GLQV
(2)
t
EHQZ
(2)
t
GHQZ
t
AXQX
Notes: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously with or afterV
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurementconditions.
Address Valid to Output ValidE = VIL,G=V
ACC
tCEChip Enable Low to Output ValidG = V
tOEOutput Enable Low to Output ValidE = V
tDFChip Enable High to Output Hi-ZG = V
tDFOutput Enable Highto Output Hi-ZE = V
(TA=0 to 70 °C or –40 to 85 °C;VCC= 3.3V ± 10%; VPP=VCC)
M27V102
SymbolAltParameterTest Condition
-120-150-200
Min Max Min Max Min Max
t
AVQV
t
ELQV
t
GLQV
t
EHQZ
t
GHQZ
t
AXQX
Notes: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously with or afterV
t
Address Valid to Output ValidE = VIL,G=V
ACC
tCEChip Enable Low to OutputValidG = V
tOEOutput Enable Low to Output ValidE = V
(2)
tDFChip Enable High to Output Hi-ZG = V
(2)
tDFOutput Enable High to Output Hi-ZE = V
Address Transition to Output
t
OH
Transition
2. Sampled only, not 100% tested.
IL
IL
IL
IL
IL
E=V
,G=VIL000ns
IL
120150200ns
120150200ns
506090ns
040050070ns
040050070ns
Figure5. Read ModeAC Waveforms
A0-A15
tAVQV
VALID
tAXQX
VALID
Unit
PP.
E
tGLQV
G
tELQV
Q0-Q15
Programming
The M27V102has been designed to be fullycompatible with the M27C1024 and has the same
elecronicsignature.As a result the M27V102 can
be programmed as the M27C1024 on the same
programming equipmentsapplying12.75V on V
PP
and6.25Von VCCbythe useof thesamePRESTO
II algorithm. When delivered (and after each ’1’s
erasure for UV EPROM), all bits of the M27V102
arein the’1’state.Data isintroducedbyselectively
tEHQZ
tGHQZ
Hi-Z
AI00705B
programming ’0’s into the desired bit locations.
Although only ’0’s will be programmed, both ’1’s
and’0’s can bepresent in thedata word. The only
way to change a ’0’ to a ’1’ is by die exposure to
ultraviolet light (UV EPROM). The M27V102 is in
the programming mode when V
12.75V,E is at V
and P is pulsedto VIL. The data
IL
input is at
PP
to be programmed is applied to 16 bits in parallel
tothe data outputpins. Thelevels requiredfor the
addressand data inputs are TTL.V
to be 6.25V ±
0.25V.
is specified
CC
6/15
Page 7
M27V102
Table 9. ProgrammingMode DC Characteristics
(1)
(TA=25°C; VCC=6.25V ± 0.25V;VPP=12.75V ± 0.25V)
SymbolParameterTest ConditionMinMaxUnit
I
LI
I
CC
I
PP
V
IL
V
IH
V
OL
V
OH
V
ID
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously with or afterVPP.
Input Leakage Current0≤V
Supply Current50mA
Program CurrentE = V
Input Low Voltage–0.30.8V
Input High Voltage2VCC+ 0.5V
Output Low VoltageIOL= 2.1mA0.4V
Output High VoltageTTLIOH= –400µA2.4V
A9 Voltage11.512.5V
Table 10. ProgrammingMode AC Characteristics
(1)
V
≤
IN
IH
IL
10
±
50mA
(TA=25°C; VCC=6.25V ± 0.25V;VPP=12.75V ± 0.25V)
SymbolAltParameterTest ConditionMinMaxUnit
t
AVPL
t
AS
Address Validto Program Low2µs
A
µ
t
QVPL
t
VPHPL
t
VCHPL
t
ELPL
t
PLPH
t
PHQX
t
QXGL
t
GLQV
(2)
t
GHQZ
t
GHAX
Notes: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously with or afterVPP.
2. Sampled only, not 100% tested.
t
t
VPS
t
VCS
t
CES
t
t
t
OES
t
t
DFP
t
DS
PW
DH
OE
AH
Input Validto Program Low2µs
VPPHigh to ProgramLow2µs
VCCHigh to Program Low2µs
Chip Enable Low to Program Low2µs
Program Pulse Width95105µs
Program High to Input Transition2µs
Input Transition to Output Enable
Low
2
Output EnableLow to Output Valid100ns
Output EnableHigh to Output Hi-Z0130ns
Output EnableHigh to Address
Transition
0ns
s
µ
7/15
Page 8
M27V102
Figure6. Programmingand VerifyModes AC Waveforms
A0-A15
tAVPL
Q0-Q15
tQVPL
V
PP
tVPHPL
V
CC
tVCHPL
E
tELPL
P
tPLPH
G
Figure7. ProgrammingFlowchart
VCC= 6.25V, VPP= 12.75V
n=0
P = 100µs Pulse
NO
NO
VERIFY
YES
Last
NO
Addr
YES
CHECK ALLWORDS
1st: VCC=6V
2nd: VCC= 4.2V
++ Addr
YES
++n
=25
FAIL
VALID
DATA INDATA OUT
tPHQX
tGLQV
tQXGL
PROGRAMVERIFY
PRESTOII ProgrammingAlgorithm
PRESTO II Programming Algorithm allows programming of the whole array with a guaranteed
margin,in a typical time of 6.5 seconds.Programming with PRESTO II consists of applying a sequenceof100µsprogrampulsestoeachworduntil
a correct verify occurs (see Figure 7). During programmingand verifyoperation,a MARGINMODE
circuitis automaticallyactivatedin orderto guarantee that each cell is programmed with enough
margin. No overprogrampulseis appliedsince the
verifyin MARGIN MODEat V
3.6V provides necessary margin to each programmedcell.
ProgramInhibit
ProgrammingofmultipleM27V102sin parallelwith
differentdata is also easily accomplished. Except
for E, all like inputs including G of the parallel
M27V102may be common. ATTLlow level pulse
appliedto aM27V102’sP input,withE lowand V
at12.75V,will programthat M27V102. Ahigh level
E input inhibits the other M27V102s from being
programmed.
ProgramVerify
AI00707C
A verify (read) should be performed on the programmedbits todeterminethattheywere correctly
programmed. The verify is accomplished with E
tGHQZ
tGHAX
AI00706
muchhigher than
CC
PP
8/15
Page 9
M27V102
and G at VIL, P at VIH,VPPat 12.75V and VCCat
6.25V.
On-BoardProgramming
The M27V102 can be directly programmed in the
application circuit. See the relevant Application
NoteAN620.
ElectronicSignature
The Electronic Signature (ES) mode allows the
reading outof a binarycode from an EPROMthat
will identify its manufacturer and type. This mode
is intended for use by programmingequipment to
automaticallymatchthe deviceto be programmed
withits correspondingprogrammingalgorithm.The
ES mode is functional in the 25°C± 5°Cambient
temperaturerange that is required whenprogramming the M27V102. To activatethe ES mode, the
programmingequipmentmustforce 11.5Vto 12.5V
onaddressline A9of the M27V102with V
PP=VCC
=5V. Twoidentifierbytes maythen besequenced
fromthedeviceoutputsby togglingaddresslineA0
fromV
at V
(A0=V
byte1 (A0=V
toVIH. Allotheraddresslinesmustbeheld
IL
during Electronic Signature mode. Byte 0
IL
) represents the manufacturer code and
IL
) the deviceidentifiercode. For the
IH
STMicroelectronicsM27V102,thesetwo iden-tifier
bytes are givenin Table4 and can be read-out on
outputs Q0 to Q7. Note that the M27V102 and
M27C1024have the same identifier bytes.
ERASUREOPERATION (appliesto UVEPROM)
Theerasurecharacteristicsof theM27V102issuch
that erasurebegins when the cells areexposed to
light with wavelengths shorter than approximately
4000Å. It shouldbe noted thatsunlight and some
type offluorescentlamps have wavelengthsin the
3000-4000Årange.Researchshowsthat constant
exposure to room level fluorescent lighting could
erasea typical M27V102in about 3 years, whileit
wouldtakeapproximately1 weekto causeerasure
when exposed to direct sunlight. If the M27V102
is to be exposed to these types of lighting conditions for extended periodsof time, it is suggested
that opaque labels be put over the M27V102 window to preventunintentionalerasure. The recommended erasure procedure for the M27V102 is
exposure to short wave ultraviolet light which has
wavelength2537 Å. The integrated dose (i.e. UV
intensityx exposuretime) for erasure should be a
minimumof 15 W-sec/cm
this dosage is approximately 15 to 20 minutes
usingan ultravioletlampwith12000µW/cm
2
. The erasuretime with
2
power
rating. The M27V102should be placed within 2.5
cm (1 inch) of the lamp tubes during the erasure.
Some lamps have a filter on their tubes which
shouldbe removed beforeerasure.
9/15
Page 10
M27V102
ORDERING INFORMATION SCHEME
Example:M27V102-90K1TR
Speed
(1)
-90
-100100 ns
-120120 ns
-150150 ns
-200200 ns
Note: 1. High Speed, see AC Characteristicssection for furtherinformation.
90 ns
Package
FFDIP40W
BPDIP40
KPLCC44
NTSOP40
8 x 14mm
Temperature Range
10 to 70 °C
6–40 to 85°C
Option
TRTape& Reel
Packing
Fora listofavailableoptions(Speed,Package,etc...)or forfurtherinformationon anyaspectofthisdevice,
pleasecontact the STMicroelectronics Sales Officenearest to you.
10/15
Page 11
FDIP40W - 40 pin Ceramic Frit-seal DIP, with window
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
ofuse ofsuch information nor for any infringement of patents or other rights of third parties which may resultfrom its use. Nolicense is granted
by implicationor otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in thispublicationare subject to
change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express writtenapproval of STMicroelectronics.
The ST logois a registeredtrademark of STMicroelectronics.
1998 STMicroelectronics - AllRights Reserved
Australia - Brazil - Canada - China - France- Germany- Italy- Japan -Korea - Malaysia - Malta- Morocco - The Netherlands - Singapore -
Spain - Sweden - Switzerland - Taiwan- Thailand - United Kingdom -U.S.A.
STMicroelectronics GROUP OF COMPANIES
15/15
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