Page 1
M27C801
8 Mbit (1Mb x 8) UV EPROM and OTP EPROM
■ 5V
10% SUPPLY VOLTAGE in READ
±
OPERATION
■ ACCESS TIME: 45ns
■ LOW POWER CONSUMPTION:
– Active Current 35mA at 5MHz
– Standby Current 100µA
■ PROGRAMMING VOLTAGE: 12.75V
■ PROGRAMMING TIME: 50
■ ELECTRONIC SIGNATURE
s/word
µ
0.25V
±
– Manufacturer Code: 20h
– Device Code: 42h
DESCRIPTION
The M27C801 is an 8 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It isideally suited for applications where fast turn-around and pattern experimentation are important requirements and is
organized as 1,048,576 by 8 bits.
The FDIP32W (window ceramic frit-seal package)
has transparent lid which allows the user to expose the chipto ultraviolet light to erasethebitpattern. A new pattern can then be written to the
device by following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M27C801 is offered in PDIP32, PLCC32 and
TSOP32 (8 x 20 mm) packages.
32
1
FDIP32W (F)
PLCC32 (C)
32
1
PDIP32 (B)
TSOP32 (N)
8 x 20 mm
Figure 1. Logic Diagram
V
CC
20
A0-A19 Q0-Q7
8
GV
PP
E
M27C801
V
SS
AI01267
1/16March 2000
Page 2
M27C801
Figure 2A. DIP Connections
A19 V
1
2
A15
3
A12
4
A7
5
A6
6
A5
7
A4
8
9
10
11
12
13
14
15
16
M27C801
A3
A2
A1
A0
Q0
Q2
SS
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
AI01268
CC
A18A16
A17
A14
A13
A8
A9
A11
GV
A10
E
Q7
Q6
Q5Q1
Q4
Q3V
PP
Figure 2B. PLCC Connections
CC
A16
A7
A6
A5
A4
A3
A2
A1
A0
Q0
A12
9
Q1
A19
A15
1
M27C801
17
Q2
Q3
SS
V
V
32
Q4
A18
Q5
A17
25
Q6
A14
A13
A8
A9
A11
GV
A10
E
Q7
AI01814
PP
Figure 2C. TSOP Connections
A11 GV
A9
A8
A13
A14
A17
A18
V
CC
A19
A16
A15
A12
A7
A6
A5
A4 A3
1
M27C801
8
(Normal)
9
16 17
32
25
24
AI01269
A10
E
Q7
Q6
Q5
Q4
Q3
V
SS
Q2
Q1
Q0
A0
A1
A2
PP
Table 1. Signal Names
A0-A19 Address Inputs
Q0-Q7 Data Outputs
E Chip Enable
GV
V
V
PP
CC
SS
Output Enable / Program Supply
Supply Voltage
Ground
2/16
Page 3
M27C801
Table 2. Absolute Maximum Ratings
(1)
Symbol Parameter Value Unit
T
A
T
BIAS
T
STG
(2)
V
IO
V
CC
(2)
V
A9
V
PP
Note: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Referalso to the STMicroelectronics SUREProgram andotherrelevant quality documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V
3. Depends on range.
Ambient Operating Temperature
Temperature Under Bias –50 to 125 °C
Storage Temperature –65 to 150 °C
Input or Output Voltage (except A9) –2 to 7 V
Supply Voltage –2 to 7 V
A9 Voltage –2 to 13.5 V
Program Supply Voltage –2 to 14 V
+0.5V with possible overshoot to VCC+2V for a period less than 20ns.
CC
(3)
–40 to 125 °C
Table 3. Operating Modes
Mode E
Read
Output Disable V
Program
V
Program Inhibit V
Standby
Electronic Signature
Note: X = VIHor VIL,VID= 12V ± 0.5V.
V
IL
IL
Pulse V
IL
IH
V
IH
V
IL
GV
V
V
pp
V
IL
IH
PP
PP
A9 Q7-Q0
X Data Out
X Hi-Z
X Data In
X Hi-Z
X X Hi-Z
V
IL
V
ID
Codes
Table 4. Electronic Signature
Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturer’s Code
Device Code
V
IL
V
IH
00100000 20h
01000010 42h
3/16
Page 4
M27C801
Table 5. AC Measurement Conditions
High Speed Standard
Input Rise and Fall Times ≤ 10ns ≤ 20ns (10% to 90%)
Input Pulse Voltages 0 to 3V 0.4 to 2.4V
Input and Output Timing Ref. Voltages 1.5V 0.8 and 2V
Figure 3. AC Testing Input Output Waveform
High Speed
3V
1.5V
0V
Standard
2.4V
0.4V
Table 6. Capacitance
Symbol Parameter Test Condition Min Max Unit
C
IN
C
OUT
Note: 1. Sampled only,not 100% tested.
(1)
(TA=25°C, f = 1 MHz)
Input Capacitance
Output Capacitance V
2.0V
0.8V
AI01822
Figure 4. AC Testing Load Circuit
1.3V
1N914
3.3kΩ
DEVICE
UNDER
TEST
C
L
CL= 30pF for High Speed
CL= 100pF for Standard
CLincludes JIG capacitance
V
=0V
IN
=0V 12 pF
OUT
6pF
OUT
AI01823B
DEVICE OPERATION
The operating modes of the M27C801 are listed in
the Operating Modes table. A single power supply
is required in the read mode. All inputs are TTL
levels except for GVPPand 12V on A9 for Electronic Signature and Margin Mode Set or Reset.
Read Mode
The M27C801 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable(G) is the output control and should
be used to gate data to the output pins, independent of device selection. Assuming that the ad-
4/16
dresses are stable, the address access time
(t
) is equal to the delay from E to output
AVQV
(t
). Data is availableat the outputafter a delay
ELQV
of t
from the falling edge of G, assuming that
GLQV
E has been low and the addresses havebeen stable for at least t
AVQV-tGLQV
.
Standby Mode
The M27C801 has a standby mode which reduces
the supply current from 35mA to 100µA.
The M27C801 is placed in the standby mode by
applying a CMOS high signal to the E input. When
in the standby mode, the outputs are in a high impedance state, independent of the GVPPinput.
Page 5
M27C801
Table 7. Read Mode DC Characteristics
(1)
(TA= 0 to 70°C or –40 to 85°C; VCC=5V±10%)
Symbol Parameter Test Condition Min Max Unit
I
I
LO
I
CC
I
CC1
I
CC2
I
PP
V
V
IH
V
Input Leakage Current
LI
Output Leakage Current
Supply Current
Supply Current (Standby) TTL
Supply Current (Standby) CMOS E > VCC– 0.2V 100 µA
Program Current
Input Low Voltage –0.3 0.8 V
IL
(2)
Input High Voltage 2 VCC+1 V
Output Low Voltage IOL= 2.1mA 0.4 V
OL
Output High Voltage TTL
V
OH
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
2. Maximum DC voltage on Output is V
Table 8A. Read Mode AC Characteristics
Output High Voltage CMOS I
+0.5V.
CC
(1)
0V ≤ V
0V ≤ V
OUT
E=V
,GVPP=VIL,
IL
= 0mA, f = 5MHz
I
OUT
E=V
V
PP=VCC
I
= –1mA
OH
= –100µAV
OH
≤ V
IN
CC
≤ V
CC
±10 µA
±10 µA
35 mA
IH
1mA
10 µA
3.6 V
– 0.7 V
CC
(TA= 0 to 70 °C or –40 to 85 °C; VCC=5V±10%)
M27C801
Symbol Alt Parameter
t
AVQVtACC
t
ELQV
t
GLQV
(2)
t
EHQZ
(2)
t
GHQZ
t
AXQX
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after V
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.
Address Valid to Output Valid
t
Chip Enable Low to Output Valid
CE
t
Output Enable Low to Output Valid
OE
t
Chip Enable High to Output Hi-Z
DF
t
Output Enable High to Output Hi-Z
DF
Address Transition to Output
t
OH
Transition
Test
Condition
E=V
IL
GV
PP=VIL
GV
PP=VIL
E=V
IL
GV
PP=VIL
E=V
IL
E=V
IL
GV
PP=VIL
,
,
(3)
-45
-60 -70
Min Max Min Max Min Max
45 60 70 ns
45 60 70 ns
25 30 35 ns
025025030ns
025025030ns
000ns
PP.
Unit
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, the product features a 2 line control function which accommodates the use of multiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control
lines, Eshould bedecoded and used as the primary device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. Thisensures that all deselected memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
5/16
Page 6
M27C801
Table 8B. Read Mode AC Characteristics
(1)
(TA= 0 to 70°C or –40 to 85°C; VCC=5V±10%)
M27C801
Symbol Alt Parameter Test Condition
Min Max Min Max
t
AVQV
t
ELQV
t
GLQV
t
EHQZ
t
GHQZ
t
AXQX
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
t
Address Validto Output Valid
ACC
t
Chip Enable Low to Output Valid
CE
Output Enable Low to Output
t
OE
Valid
(2)
t
Chip Enable High to Output Hi-Z GVPP=V
DF
(2)
2. Sampled only, not 100% tested.
Output Enable High to Output
t
DF
Hi-Z
Address Transition to Output
t
OH
Transition
E=V
GV
E=V
,GVPP=V
IL
PP=VIL
E=V
IL
E=V
IL
,GVPP=V
IL
IL
80 100 ns
80 100 ns
40 50 ns
IL
0 35 0 40 ns
0 35 0 40 ns
00ns
IL
Figure 5. Read Mode AC Waveforms
A0-A19
tAVQV
VALID
tAXQX
VALID
Unit-80 -100/-120/-150
E
tGLQV
G
tELQV
Q0-Q7
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs requirecareful decoupling of the
devices. The supply current, ICC, has three segments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the fallingand rising edgesof E. The magnitudeof
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output. The associatedtransient voltage peaks
can be suppressed by complying with the two line
tEHQZ
tGHQZ
Hi-Z
AI01583B
outputcontrol and by properly selected decoupling
capacitors.It is recommended thata 0.1µF ceramic capacitorbe used on every device between V
CC
and VSS. This should be a high frequency capacitor of low inherent inductance and should be
placed as close to the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be
used between VCCand VSSfor every eight devices. The bulkcapacitor should be located near the
power supplyconnection point. The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
6/16
Page 7
M27C801
Table 9. Programming Mode DC Characteristics
(1)
(TA=25°C; VCC= 6.25V±0.25V; VPP= 12.75V±0.25V)
Symbol Parameter Test Condition Min Max Unit
(1)
V
IL
I
OL
≤ VIN≤ V
E=V
IL
= 2.1mA
IH
±10 µA
50 mA
V
+ 0.5
CC
0.4 V
I
I
CC
I
PP
V
V
V
V
OH
V
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
Input Leakage Current
LI
Supply Current 50 mA
Program Current
Input Low Voltage –0.3 0.8 V
IL
Input High Voltage 2
IH
Output Low Voltage
OL
Output High Voltage TTL IOH= –1mA 3.6 V
A9 Voltage 11.5 12.5 V
ID
Table 10. MARGIN MODE AC Characteristics
(TA=25°C; VCC= 6.25V±0.25V; VPP= 12.75V±0.25V)
Symbol Alt Parameter Test Condition Min Max Unit
t
A9HVPH
t
VPHEL
t
A10HEH
t
A10LEH
t
EXA10X
t
EXVPX
t
VPXA9X
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
t
t
t
AS10VA10
t
AS10VA10
t
AH10
t
t
VA9High to VPPHigh
AS9
VPPHigh to Chip Enable Low
VPS
Chip Enable Transition to V
Chip Enable Transition to VPPTransition
VPH
VPPTransition to VA9Transition
AH9
2 µs
2 µs
High to Chip Enable High (Set) 1 µs
Low to Chip Enable High (Reset)
Transition
A10
1 µs
1 µs
2 µs
2 µs
V
Programming
When delivered (and after each erasure for UV
EPROM), all bits of the M27C801 are in the ’1’
state. Data is introduced by selectively programming ’0’s into the desired bit locations. Although
only ’0’ will be programmed, both ’1’sand ’0’s can
be present in the data word. The only way to
change a ’0’to a’1’is bydie exposure to ultraviolet
light (UV EPROM). The M27C801 is in the programming mode when VPPinput is at 12.75V and
E is pulsed to VIL. The data to be programmed is
applied to 8 bitsin parallel to the data output pins.
The levels required for the address and data inputs are TTL. VCCis specified to be 6.25V ±
0.25V.
7/16
Page 8
M27C801
Figure 6. MARGIN MODE AC Waveforms
V
CC
A8
A9
tA9HVPH tVPXA9X
GV
PP
E
A10 Set
A10 Reset
tVPHEL
tA10HEH
tA10LEH
tEXVPX
tEXA10X
AI00736B
Note: A8 High level = 5V; A9 High level = 12V.
Table 11. Programming Mode DC Characteristics
(1)
(TA=25°C; VCC= 6.25V ± 0.25V; VPP= 12.75V ± 0.25V)
Symbol Alt Parameter Test Condition Min Max Unit
t
AVEL
t
QVEL
t
VCHEL
t
VPHEL
t
VPLVPH
t
ELEH
t
EHQX
t
EHVPX
t
VPLEL
t
ELQV
(2)
t
EHQZ
t
EHAX
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
t
t
t
VCS
t
OES
t
PRT
t
t
t
OEH
t
t
t
DFP
t
Address Validto Chip Enable Low 2 µs
AS
Input Valid to Chip Enable Low 2 µs
DS
VCCHigh to Chip Enable Low
VPPHigh to Chip Enable Low
VPPRise Time
Chip Enable Program Pulse Width (Initial) 45 55 µs
PW
Chip Enable High to Input Transition 2 µs
DH
Chip Enable High to VPPTransition
VPPLow to Chip Enable Low 2 µs
VR
Chip Enable Low to Output Valid 1 µs
DV
2 µs
2 µs
50 ns
2 µs
Chip Enable High to Output Hi-Z 0 130 ns
Chip Enable High to Address Transition 0 ns
AH
8/16
Page 9
Figure 7. Programming and Verify Modes AC Waveforms
M27C801
A0-A19
tAVEL
Q0-Q7
tQVEL
V
CC
tVCHEL
GV
PP
tVPHEL
E
Figure 8. Programming Flowchart
VCC= 6.25V, VPP= 12.75V
SET MARGIN MODE
n=0
E=50µs Pulse
NO
NO
VERIFY
YES
Last
NO
Addr
YES
RESETMARGIN MODE
CHECK ALL BYTES
1st: VCC=6V
2nd: VCC= 4.2V
++ Addr
YES
++n
=25
FAIL
VALID
DATA IN DATA OUT
tEHQX
tEHVPX tELQV
tVPLEL
tELEH
PROGRAM VERIFY
PRESTO IIB Programming Algorithm
PRESTO IIB Programming Algorithm allows the
whole array to be programmed with a guaranteed
margin, in atypical time of 52.5 seconds. This can
be achieved with STMicroelectronics M27C801
due to several design innovations to improve programming efficiency andto provideadequate margin for reliability. Before starting the programming
the internal MARGIN MODE circuit is set in order
to guarantee that each cell is programmed with
enough margin. Then a sequence of 50µs program pulses are applied to each byte until a correct verify occurs. No overprogram pulses are
applied since the verify in MARGIN MODE provides the necessary margin.
Program Inhibit
Programming of multiple M27C801s in parallel
with different data is also easily accomplished. Except for E, all like inputs including GVPPof theparallel M27C801 may be common. A TTL low level
pulse applied to a M27C801’s E input, with VPPat
12.75V, will program that M27C801. A high level E
input inhibits the other M27C801s from being programmed.
Program Verify
A verify (read) should be performed on the programmed bits to determine that theywere correct-
AI01271B
ly programmed. The verify is accomplished with G
at VIL. Data should be verified with t
falling edge of E.
tEHAX
tEHQZ
AI01270
ELQV
after the
9/16
Page 10
M27C801
On-Board Programming
The M27C801 can be directly programmed in the
application circuit. See the relevant Application
Note AN620.
Electronic Signature
The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically matchthe device to be programmed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C±5°C ambient temperaturerange that is required when programming the M27C801. To activate the ES
mode, the programming equipment must force
11.5V to 12.5V on address line A9 of the
M27C801. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VILto VIH. All other address
lines must be held at VILduring Electronic Signature mode. Byte 0 (A0 = VIL) represents the manufacturer code and byte 1 (A0 = VIH) the device
identifier code. For the STMicroelectronics
M27C801, these two identifier bytes are given in
Table 4and can be read-out on outputs Q7 to Q0.
ERASUREOPERATION(applies to UV EPROM)
The erasure characteristics of the M27C801 is
such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 Å. It should be noted that
sunlight and some type of fluorescent lamps have
wavelengths in the 3000-4000Å range.
Research shows that constant exposure to room
level fluorescent lighting could erase a typical
M27C801 in about 3 years, while it wouldtake approximately 1 week to cause erasure when exposed to direct sunlight. If the M27C801 is to be
exposed to these types of lighting conditions for
extended periods of time, it is suggested that
opaque labelsbe put over the M27C801 window to
prevent unintentional erasure. The recommended
erasureprocedure for the M27C801 is exposure to
short wave ultraviolet light which has wavelength
2537 Å. The integrated dose (i.e. UV intensity x
exposure time) for erasure should be a minimum
of 30 W-sec/cm2. The erasure time with this dosage is approximately 30 to 40 minutes using an ultraviolet lamp with 12000µW/cm2power rating.
The M27C801 should be placed within 2.5 cm (1
inch) of the lamp tubes during the erasure. Some
lamps have a filter on their tubes which should be
removed before erasure.
10/16
Page 11
Table 12. Ordering Information Scheme
Example: M27C801 -45 K 1 TR
Device Type
M27
Supply Voltage
C=5V±10%
Device Function
801 = 8Mbit (1Mb x8)
Speed
(1)
=45ns
-45
-60 = 60 ns
-70 = 70 ns
-80 = 80 ns
-100 = 100 ns
-120 = 120 ns
-150 = 150 ns
M27C801
Package
F = FDIP32W
B = PDIP32
K = PLCC32
N = TSOP32: 8 x 20 mm
Temperature Range
1=0to70°C
6=–40to85°C
Options
X = Additional Burn-in
TR = Tape& Reel Packing
Note: 1. High Speed, see AC Characteristics section for further information.
For a list of available options (Speed, Package, etc...) or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you.
Table 1. Revision History
Date Revision Details
September 1998 First Issue
03/21/00 FDIP32W Package changed
11/16
Page 12
M27C801
Table 13. FDIP32W - 32 pin Ceramic Frit-seal DIP with window, Package Mechanical Data
Symb
A 5.72 0.225
A1 0.51 1.40 0.020 0.055
A2 3.91 4.57 0.154 0.180
A3 3.89 4.50 0.153 0.177
B 0.41 0.56 0.016 0.022
B1 1.45 – – 0.057 – –
C 0.23 0.30 0.009 0.012
D 41.73 42.04 1.643 1.655
D2 38.10 – – 1.500 – –
E 15.24 – – 0.600 – –
E1 13.06 13.36 0.514 0.526
e 2.54 – – 0.100 – –
eA 14.99 – – 0.590 – –
eB 16.18 18.03 0.637 0.710
L 3.18 0.125
S 1.52 2.49 0.060 0.098
Ø 7.11 – – 0.280 – –
α 4° 11° 4° 11°
N32 32
Typ Min Max Typ Min Max
mm inches
Figure 9. FDIP32W - 32 pin Ceramic Frit-seal DIP with window, Package Outline
A2
B1 B e
A3A1A
L
α
C
eA
D2
eB
D
S
N
∅
1
Drawing is not to scale.
E1 E
FDIPW-a
12/16
Page 13
M27C801
Table 14. PDIP32 - 32 pin Plastic DIP, 600 mils width, Package Mechanical Data
Symb
Typ Min Max Typ Min Max
A – 5.08 – 0.200
A1 0.38 – 0.015 –
A2 3.56 4.06 0.140 0.160
B 0.38 0.51 0.015 0.020
B1 1.52 – – 0.060 – –
C 0.20 0.30 0.008 0.012
D 41.78 42.04 1.645 1.655
D2 38.10 – – 1.500 – –
E 15.24 – – 0.600 – –
E1 13.59 13.84 0.535 0.545
e1 2.54 – – 0.100 – –
eA 15.24 – – 0.600 – –
eB 15.24 17.78 0.600 0.700
L 3.18 3.43 0.125 0.135
S 1.78 2.03 0.070 0.080
α 0° 10° 0° 10°
N32 32
mm inches
Figure 10. PDIP32 - 32 pin Plastic DIP, 600 mils width, Package Outline
A2A1A
L
B1 B e1
D2
α
eA
eB
D
S
N
E1 E
1
Drawing is not to scale.
C
PDIP
13/16
Page 14
M27C801
Table 15. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data
Symb
A 2.54 3.56 0.100 0.140
A1 1.52 2.41 0.060 0.095
A2 – 0.38 – 0.015
B 0.33 0.53 0.013 0.021
B1 0.66 0.81 0.026 0.032
D 12.32 12.57 0.485 0.495
D1 11.35 11.56 0.447 0.455
D2 9.91 10.92 0.390 0.430
E 14.86 15.11 0.585 0.595
E1 13.89 14.10 0.547 0.555
E2 12.45 13.46 0.490 0.530
e 1.27 – – 0.050 – –
F 0.00 0.25 0.000 0.010
R 0.89 – – 0.035 – –
N32 32
Nd 7 7
Ne 9 9
CP 0.10 0.004
Typ Min Max Typ Min Max
mm inches
Figure 11. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline
D
D1
1N
Ne E1 E
F
D2/E2
0.51 (.020)
1.14 (.045)
Nd
R
PLCC
Drawing is not to scale.
A1
A2
B1
e
B
A
CP
14/16
Page 15
M27C801
Table 16. TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package Mechanical Data
Symb
Typ Min Max Typ Min Max
A 1.20 0.047
A1 0.05 0.17 0.002 0.006
A2 0.95 1.05 0.037 0.041
B 0.15 0.27 0.006 0.011
C 0.10 0.21 0.004 0.008
D 19.80 20.20 0.780 0.795
D1 18.30 18.50 0.720 0.728
E 7.90 8.10 0.311 0.319
e 0.50 – – 0.020 – –
L 0.50 0.70 0.020 0.028
α 0° 5° 0° 5°
N32 32
CP 0.10 0.004
mm inches
Figure 12. TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package Outline
A2
1N
e
E
B
N/2
D1
D
DIE
A
CP
C
TSOP-a
Drawing is not to scale.
LA1 α
15/16
Page 16
M27C801
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of useofsuch information nor for any infringement of patents orother rights of third parties which may result from itsuse. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces allinformation previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is registered trademark of STMicroelectronics
2000 STMicroelectronics - All Rights Reserved
All other names are the property of their respective owners.
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco -
Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.
STMicroelectronics GROUP OF COMPANIES
http://www.st.com
16/16
Loading...