Datasheet M27C405 Datasheet (SGS Thomson Microelectronics)

5V ± 10% SUPPLYVOLTAGEin READ
OPERATION

PIN COMPATIBLEwith the 4 Mbit,
SINGLE VOLTAGEFLASHMEMORY

FASTACCESSTIME: 70ns
LOW POWER CONSUMPTION:
– Active Current30mA at 5MHz
– StandbyCurrent100µA
PROGRAMMING VOLTAGE:12.75V ± 0.25V
PROGRAMMINGTIMES
– Typical48sec.(PRESTOII Algorithm)
– Typical27sec.(On-Board Programming)
ELECTRONICSIGNATURE
– ManufacturerCode: 20h
– Device Code: B4

M27C405

4 Mbit (512Kb x 8) OTP EPROM

32

1

PDIP32 (B)

TSOP32 (N)

8 x 20mm

PLCC32 (K)

DESCRIPTION

The M27C405 is a 4 Mbit EPROM offered in the
OTP (one time programmable) range. It is ideally
suited for microprocessorsystems requiring large
programs,in the applicationwhere the contents is
stableand needstobe programmedonly one time
and is organisedas 524,288by 8 bits.

The M27C405 is pin compatible with the industry
standard 4 Mbit, single voltage Flash memory. It
canbe consideredas aFlashLowCostsolutionfor
productionquantities.

The M27C405 is offered in PDIP32,PLCC32 and
TSOP32(8 x 20 mm) packages.

Table1. SignalNames

A0-A18 Address Inputs
Q0-Q7 Data Outputs
E Chip Enable
G Output Enable
V

PP

V

CC

V

SS

Program Supply
Supply Voltage
Ground

Figure1. LogicDiagram

V

19

A0-A18 Q0-Q7

E

G

V

CC

M27C405

V

SS

PP

8

AI01601

March 1999 1/15

M27C405

Figure2A. DIPPin Connections

A18 V
A16
A15
A12

A7
A6
A5
A4
A3
A2
A1
A0

Q0

Q2
SS

1
2
3
4
5
6
7
8

M27C405

9
10
11
12
13
14
15
16

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

AI01602

CC

V

PP

A17
A14
A13
A8
A9
A11
G
A10
E
Q7
Q6
Q5Q1
Q4
Q3V

Figure2B. LCC Pin Connections

PP

CC

A18

32

Q3

V

Q4

V

Q5

A7
A6
A5
A4
A3
A2
A1
A0

Q0

A16

A12

A15

1

9

M27C405

Q1

Q2

V

17

SS

A17

25

Q6

A14
A13
A8
A9
A11
G
A10
E
Q7

AI01603

Figure2C. TSOPPin Connections

A11 G

A9

A8
A13
A14
A17

V

PP

V

CC

A18
A16
A15
A12

A7

A6

A5

A4 A3

1

M27C405

8

(Normal)

9

16 17

32

25
24

AI01604

A10
E
Q7
Q6
Q5
Q4
Q3
V

SS

Q2
Q1
Q0
A0
A1
A2

DEVICEOPERATION

Themodesof operationsoftheM27C405arelisted
in the OperatingModes table. A single power sup­plyis requiredin the read mode.All inputsare TTL
levels except for V

and 12Von A9 for Electronic

pp

Signature.

Read Mode

The M27C405 has two control functions, both of
which must be logically active in order to obtain
data at the outputs.Chip Enable(E) is the power
control and should be used for device selection.
OutputEnable (G) is the outputcontroland should
be used to gate data to the output pins, inde­pendent of device selection. Assuming that the
addresses are stable, the address access time

)is equaltothedelayfromEtooutput(t

(t

AVQV

Datais availableat theoutputafter a delayoft

ELQV

GLQV

from the falling edge of G, assuming that E has
been low and the addresses have been stable for
at least t

AVQV-tGLQV

.

StandbyMode

TheM27C405hasa standby mode which reduces
the active current from 30mA to 100µA. The
M27C405is placedin the standbymodeby apply­inga CMOShigh signalto the Einput.When in the
standbymode, the outputsareinahigh impedance
state,independentofthe G input.

).

2/15

M27C405

Table2. AbsoluteMaximumRatings

(1)

Symbol Parameter Value Unit

T

A

T

BIAS

T

STG

V

IO

V

CC

V

A9

V

PP

Notes: 1. Exceptfor the rating”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings”

2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0Vfor a period less than 20ns. Maximum DC

3. Depends on range.

Ambient Operating Temperature
TemperatureUnder Bias –50 to 125 °C
Storage Temperature –65 to 150

(2)

Input or Output Voltages (except A9) –2 to 7 V
Supply Voltage –2 to 7 V

(2)

A9 Voltage –2 to 13.5 V
Program Supply Voltage –2 to 14 V

may causepermanent damage to thedevice. These are stress ratings only and operation of the device at these or any other
conditions above thoseindicated inthe Operating sections of this specificationis not implied.Exposure to AbsoluteMaximum
Rating conditions for extendedperiods may affect device reliability.Refer also to the STMicroelectronics SURE Program and other
relevant quality documents.

voltage on Output is V

+0.5V with possible overshoot to VCC+2V for a period lessthan20ns.

CC

(3)

–40 to 125 °C

°

C

Table3. OperatingModes

Mode E G A9 V

Read V
Output Disable V
Program V
Verify V
Program Inhibit V
Standby V
Electronic Signature V

Note:X =VIHor VIL,VID= 12V ± 0.5V

IL

IL

Pulse V

IL

IH

IH

IH

IL

PP

V

IL

V

IH

IH

V

IL

V

IH

XXV

V

IL

XV
XV

CC

CC

or V
or V

SS

SS

XVPPData In
XVPPData Out
XVPPHi-Z

or V

CC

SS

V

ID

V

CC

Q0 - Q7

Data Out

Hi-Z

Hi-Z

Codes

Table4. ElectronicSignature

Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data

Manufacturer’s Code V
Device Code V

IL

IH

00100000 20h
10110100 B4h

Two Line Output Control

BecauseOTP EPROMsare usually used in larger
memoryarrays, this productfeatures a 2 linecon­trol function which accommodatesthe use of mul­tiple memory connection. The two line control
functionallows:

a. the lowest possiblememorypower dissipation,
b. complete assurancethat output bus contention

will not occur.

Forthemostefficientuse of thesetwocontrollines,
E should be decoded and used as the primary
deviceselectingfunction,whileG should be made
a common connection to all devices in the array
and connected to the READ line from the system
controlbus.This ensures that alldeselectedmem­ory devices are in their low power standby mode
and that the output pins are only activewhen data
is required from a particularmemory device.

3/15

M27C405

Table5. AC MeasurementConditions

High Speed Standard

Input Rise and Fall Times
Input Pulse Voltages 0 to 3V 0.4V to 2.4V
Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V

≤

10ns

≤

20ns

Figure3. AC TestingInput Output Waveform

High Speed

3V

1.5V

0V

Standard

2.4V

0.4V

Table6. Capacitance

(1)

(TA=25°C, f = 1 MHz )

2.0V

0.8V

AI01822

Figure4. AC TestingLoad Circuit

1.3V

1N914

3.3kΩ

DEVICE

UNDER

TEST

C

L

CL= 30pF for High Speed
CL= 100pF for Standard
CLincludes JIG capacitance

Symbol Parameter Test Condition Min Max Unit

C

IN

C

OUT

Note: 1. Sampled only, not 100% tested.

Input Capacitance VIN=0V 6 pF
Output Capacitance V

=0V 12 pF

OUT

OUT

AI01823B

4/15

M27C405

Table7. Read Mode DC Characteristics

(1)

(TA=0 to 70 °Cor –40 to 85 °C; VCC=5V±10%;VPP=VCC)

Symbol Parameter Test Condition Min Max Unit

I

LI

I

LO

I

CC

I

CC1

I

CC2

I

PP

V

IL

V

IH

V

OL

V

OH

Notes: 1. VCCmust be applied simultaneouslywith or before VPPand removed simultaneously or after V

2. Maximum DC voltage on Output is VCC+0.5V.

Input Leakage Current 0V ≤ VIN≤ V
Output Leakage Current 0V≤V

Supply Current

E=V

= 0mA, f = 5MHz

I

OUT

Supply Current (Standby) TTL E = V

≤

OUT

,G=VIL,

IL

IH

CC

V

CC

Supply Current (Standby) CMOS E > VCC–0.2V 100 µA
Program Current VPP=V

CC

Input Low Voltage –0.3 0.8 V

(2)

Input High Voltage 2 VCC+1 V
Output Low Voltage IOL= 2.1mA 0.4 V
Output High Voltage TTL IOH= –400µA 2.4 V
Output High VoltageCMOS I

= –100µAV

OH

CC

– 0.7V V

PP.

±10 µA

10

±

30 mA

1mA

10

A

µ

A

µ

Table8A. ReadModeAC Characteristics

(1)

(TA=0 to 70 °Cor –40 to 85 °C; VCC=5V±10%;VPP=VCC)

M27C405

Symbol Alt Parameter Test Condition

Address Validto

t

AVQV

t

ELQV

t

GLQV

t

EHQZ

t

GHQZ

t

AXQX

Notes: 1. VCCmust be applied simultaneouslywith or before VPPand removed simultaneously or after V

t

ACC

Output Valid
Chip Enable Low to

t

CE

Output Valid
Output Enable Low

t

OE

to Output Valid

(2)

(2)

2. Sampled only, not 100% tested.

3. In case of 70ns speed see High Speed AC Measurement conditions.

Chip Enable High to

t

DF

Output Hi-Z
Output Enable High

t

DF

to Output Hi-Z
Address Transitionto

t

OH

Output Transition

E=V

E=V

,G=V

IL

G=V

E=V

G=V

E=V

,G=V

IL

IL

IL

IL

IL

IL

IL

-70

(3)

-80 -90

Min Max Min Max Min Max

70 80 90 ns

70 80 90 ns

35 40 40 ns

030030030ns

030030030ns

000ns

Unit

PP.

5/15

M27C405

Table8B. ReadModeAC Characteristics

(1)

(TA=0 to 70 °Cor –40 to 85 °C; VCC=5V±10%;VPP=VCC)

M27C405

Symbol Alt Parameter TestCondition

Address Validto

t

AVQV

t

ELQV

t

GLQV

t

EHQZ

t

GHQZ

t

AXQX

Notes: 1. VCCmust be applied simultaneouslywith or before VPPand removed simultaneously or after V

t

ACC

Output Valid
Chip Enable Low to

t

CE

Output Valid
Output Enable Low

t

OE

to Output Valid

(2)

(2)

2. Sampled only, not 100% tested.

Chip Enable High to

t

DF

Output Hi-Z
Output Enable High

t

DF

to Output Hi-Z
Address Transitionto

t

OH

Output Transition

E=V

G=V

E=V

G=V

E=V

E=V

,G=V

IL

IL

IL

IL

,G=V

IL

IL

IL

IL

-100 -120 -150

Min Max Min Max Min Max

100 120 150 ns

100 120 150 ns

50 60 60 ns

030040050ns

030040050ns

000ns

Unit

PP.

Figure5. ReadMode AC Waveforms

A0-A18

tAVQV

E

G

tELQV

Q0-Q7

VALID

tGLQV

VALID

tAXQX

tEHQZ

tGHQZ

Hi-Z

AI00724B

6/15

M27C405

Table9. ProgrammingMode DC Characteristics

(1)

(TA=25°C; VCC=6.25V ± 0.25V;VPP=12.75V ± 0.25V)

Symbol Parameter Test Condition Min Max Unit

I

LI

I

CC

I

PP

V

IL

V

IH

V

OL

V

OH

V

ID

Note: 1. VCCmust be applied simultaneouslywith or before VPPand removed simultaneously or after VPP.

Input Leakage Current 0≤V
Supply Current 50 mA
Program Current E = V
Input Low Voltage –0.3 0.8 V
Input High Voltage 2 VCC+ 0.5 V
Output Low Voltage IOL= 2.1mA 0.4 V
Output High Voltage TTL IOH= –400µA 2.4 V
A9 Voltage 11.5 12.5 V

Table10. ProgrammingMode AC Characteristics

(1)

V

≤

IN

CC

IL

10

±

50 mA

(TA=25°C; VCC=6.25V ± 0.25V;VPP=12.75V ± 0.25V)

Symbol Alt Parameter Test Condition Min Max Unit

t

AVEL

t

AS

Address Validto Chip Enable Low 2

A

µ

s

µ

t

t

t

t

t

t

t

t

t

DS

VPS

VCS

PW

DH

OES

OE

DFP

AH

t

QVEL

t

VPHEL

t

VCHEL

t

ELEH

t

EHQX

t

QXGL

t

GLQV

t

GHQZ

t

GHAX

Notes: 1. VCCmust be applied simultaneouslywith or before VPPand removed simultaneously or after VPP.

2. Sampled only, not 100% tested.

Input Validto Chip Enable Low 2
VPPHigh to Chip Enable Low 2
VCCHighto Chip Enable Low 2
Chip Enable Program Pulse

Width
Chip Enable High to Input

Transition
Input Transition to Output Enable

Low
Output Enable Low to Output

Valid
Output Enable High to Output

Hi-Z
Output Enable High to Address

Transition

s

µ

s

µ

s

µ

95 105

2

2

s

µ

s

µ

s

µ

100 ns

0 130 ns

0ns

7/15

M27C405

Figure6. Programmingand VerifyModes AC Waveforms

A0-A18

tAVPL

Q0-Q7

V

PP

V

CC

E

G

DATA IN DATA OUT

tQVEL

tVPHEL

tVCHEL

tELEH

PROGRAM VERIFY

SystemConsiderations

The power switching characteristics of Advanced
CMOS OTP EPR OMs require careful decoupl ing of
the devices. The supply current, I

, has three

CC

segments that are of interest to the system de­signer:thestandbycurrentlevel,theactivecurrent
level, and transient current peaks that are pro­duced by the falling and rising edges of E. The
magnitude of the transient current peaks is de­pendenton the capacitiveand inductiveloading of
the device at theoutput.

The associated transient voltage peaks can be
suppressed by complying with the two line output
control and by properly selected decoupling ca­pacitors. It is recommendedthat a 0.1µF ceramic
capacitor be used on every device between V

CC

andVSS. Thisshouldbe a highfrequencycapacitor
of low inherent inductanceand should be placed
as close to the device as possible. In addition, a

VALID

tEHQX

tGLQV

tQXGL

tGHQZ

tGHAX

AI00725

4.7µF bulk electrolytic capacitor should be used
betweenV

andVSSforevery eight devices.The

CC

bulk capacitor should be located near the power
supply connection point.The purpose of the bulk
capacitoris to overcome the voltagedrop caused
by the inductiveeffectsof PCBtraces.

Programming

Whendelivered, all bits of theM27C405 are in the
’1’state.Datais introducedbyselectivelyprogram­ming ’0’s into the desired bit locations. Although
only’0’swillbe programmed,both ’1’sand ’0’s can
be present in the data word. The M27C405 is in
the programming mode when V

12.75V,G is atV

andE ispulsed to VIL. Thedata

IH

PP

tobe programmedis appliedto 8 bitsin parallelto
the data output pins. The levels required for the
addressand data inputs are TTL.V

CC

to be 6.25V ± 0.25V.

input is at

is specified

8/15

M27C405

Figure7. ProgrammingFlowchart

VCC= 6.25V, VPP= 12.75V

n=0

E =100µs Pulse

NO

NO

VERIFY

YES

Last

NO

Addr

YES

CHECK ALL BYTES

1st: VCC=6V

2nd: VCC= 4.2V

++ Addr

YES

++n

=25

FAIL

AI00760B

Figure8. On-BoardProgrammingFlowchart

VPP=

12.75V

SET MARGIN MODE

n=0

E=10µs Pulse

NO

NO

VERIFY

?

YES

E=10µs Pulse

Last

NO

Addr

YES

CHECK ALL BYTES

VPP=V

CC

++ Addr

YES

++n

=25

FAIL

PRESTOII ProgrammingAlgorithm

PRESTO II Programming Algorithm allows the
wholearray to beprogrammed with a guaranteed
margin,in a typicaltimeof 52.5 seconds.Program­ming with PRESTO II consists of applying a se­quenceof 100µs programpulsesto eachbyteuntil
a correctverify occurs(see Figure 7). During pro­grammingand verifyoperation,a MARGINMODE
circuitis automaticallyactivatedin ordertoguaran­tee that each cell is programmed with enough
margin. Nooverprogrampulseisappliedsince the
verify in MARGIN MODE provides the necessary
margin to each programmedcell.

ProgramInhibit

Programmingof multipleM27C405sinparallelwith
differentdata is also easily accomplished. Except
for E, all like inputs including G of the parallel
M27C405may be common.A TTL low level pulse
appliedtoaM27C405’sEinput,withV

at12.75V,

PP

will program that M27C405. A high level E input
inhibits the other M27C405s from being pro­grammed.

AI01349

ProgramVerify

A verify (read) should be performed on the pro­grammedbitsto determinethat theywere correctly
programmed. The verify is accomplishedwithG at
V

, E at VIH,VPPat 12.75Vand VCCat6.25V.

IL

On-Board Programming

Programming the M27C405 may be performed
directly in the application circuit, however this re­quires modification to the PRESTO II Algorithm
(see Figure 8). For in-circuit programming V

CC

determinedby theuser and normallyis compatible
withother componentsusing thesamesupplyvolt­age.It isrecommendedthatthe maximumvalueof

which remains compatible with the circuit is

V

CC

used.
Typically V

ing V

CC

=5.5V for programmingsystems us-

CC

=5V is recommended. The value of V

CC

does not affect the programming, it gives a higher
testcapability in VERIFYmode.

V

must be kept at 12.75 volts to maintain and

PP

enablethe programming.

is

9/15

M27C405

Warning: compatibilitywith FLASH Memory

Compatibilityissues may arise when replacingthe
compatibleSingle Supply4 MegabitFLASH Mem­ory (the M29F040)by theM27C405.

The V
”W”pinoftheM29F040.TheM27C405V

pin of the M27C405 corresponds to the

PP

PP

pincan
withstandvoltages up to 12.75V,whilethe ”W”pin
ofthe M29F040is a normalcontrolsignalinputand
may be damaged if a high voltage is applied;
specialprecautionsmust be taken whenprogram­ming in-circuit.

However if an already programmed M27C405 is
used,this can be directlyputin placeof theFLASH
Memoryas theV
mode, is set to V

Changes to PRESTO II.

input,whennotinprogramming

PP

or VSS.

CC

The duration of the pro­gramming pulse is reduced to 20µs, making the
programming time of the M27C405 comparable
with the counterpartFLASHMemory.

ElectronicSignature

The Electronic Signature (ES) mode allows the
readingout of a binarycode froman OTP EPROM
that will identify its manufacturer and type. this
mode is intendedfor use by programming equip­mentto automaticallymatch the device to be pro­grammed with its corresponding programming
algorithm.Thismodeisfunctionalinthe25°C ± 5°C
ambient temperaturerange that is required when
programming the M27C405. To activate the ES
mode, the programming equipment must force

11.5Vto 12.5VonaddresslineA9 of theM27C405
withV

PP=VCC

=5V.Twoidentifierbytesmaythenbe
sequenced from the device outputs by toggling
address line A0 from V
lines must be held at V
ture mode. Byte 0 (A0=V
facturer code and byte 1 (A0=V

to VIH. All other address

IL

during Electronic Signa-

IL

) representsthe manu-

IL

) the device

IH

identifier code . F or the STMicroelectronics
M27C405, these two identifier bytes are given in
Table 4 and can be read-outon outputsQ0 to Q7.

10/15

ORDERINGINFORMATION SCHEME

Example: M27C405 -80 K 1 TR

M27C405

Speed

(1)

-70

70 ns

-80 80 ns

-90 90 ns

-100 100 ns

-120 120 ns

-150 150 ns

Note: 1. High Speed, see AC Characteristics section for further information.

Package

B PDIP32
K PLCC32

N TSOP32

8 x 20mm

TemperatureRange

1 0 to 70°C
6 –40 to 85°C

Option

TR Tape& Reel

Packing

Fora listof availableoptions(Speed, Package,etc...)or forfurtherinformationonanyaspectofthis device,
pleasecontact the STMicroelectronicsSales Office nearest to you.

11/15

M27C405

PDIP32 - 32 pin Plastic DIP,600 mils width

Symb

Typ Min Max Typ Min Max

A – 5.08 – 0.200
A1 0.38 – 0.015 –
A2 3.56 4.06 0.140 0.160

B 0.38 0.51 0.015 0.020
B1 1.52 – – 0.060 – –

C 0.20 0.30 0.008 0.012
D 41.78 42.04 1.645 1.655

D2 38.10 – – 1.500 – –

E 15.24 – – 0.600 – –
E1 13.59 13.84 0.535 0.545

e1 2.54 – – 0.100 – –
eA 15.24 – 0.600 – –
eB 15.24 17.–78 0.600 0.700

L 3.18 3.43 0.125 0.135
S 1.78 2.03 0.070 0.080
α 0° 10° 0° 10°

N32 32

mm inches

Drawing is not to scale.

12/15

B1 B e1

D2

D

S

N

1

A2A1A

E1 E

L

α

C

eA
eB

PDIP

PLCC32- 32 lead Plastic Leaded Chip Carrier, rectangular

M27C405

Symb

Typ Min Max Typ Min Max

A 2.54 3.56 0.100 0.140
A1 1.52 2.41 0.060 0.095
A2 – 0.38 – 0.015

B 0.33 0.53 0.013 0.021
B1 0.66 0.81 0.026 0.032

D 12.32 12.57 0.485 0.495
D1 11.35 11.56 0.447 0.455
D2 9.91 10.92 0.390 0.430

E 14.86 15.11 0.585 0.595
E1 13.89 14.10 0.547 0.555
E2 12.45 13.46 0.490 0.530

e 1.27 – – 0.050 – –

F 0.00 0.25 0.000 0.010

R 0.89 – – 0.035 – –

N32 32
Nd 7 7
Ne 9 9

CP 0.10 0.004

mm inches

D

D1

1N

Ne E1 E

Nd

PLCC

Drawing is not to scale.

R

F

0.51 (.020)

1.14 (.045)

D2/E2

A1

A2

B1

e

B

A

CP

13/15

M27C405

TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20mm

Symb

Typ Min Max Typ Min Max

A 1.20 0.047
A1 0.05 0.15 0.002 0.007
A2 0.95 1.05 0.037 0.041

B 0.15 0.27 0.006 0.011

C 0.10 0.21 0.004 0.008
D 19.80 20.20 0.780 0.795

D1 18.30 18.50 0.720 0.728

E 7.90 8.10 0.311 0.319

e 0.50 - - 0.020 - -

L 0.50 0.70 0.020 0.028

α

N32 32

CP 0.10 0.004

mm inches

0

°

5

°

0

°

5

°

Drawing is not to scale.

1N

E

N/2

D1

D

DIE

TSOP-a

A2

e

B

A

CP

C

LA1 α

14/15

M27C405

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
ofuse ofsuch information nor for any infringementof patentsor other rights of third parties which may result from its use. No licenseis granted
by implicationor otherwise under any patent or patent rights of STMicroelectronics. Specificationsmentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical componentsin life support devices or systems without express written approval of STMicroelectronics.

The ST logo is a registered trademark of STMicroelectronics

 1999 STMicroelectronics - AllRights Reserved

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15/15