Datasheet M27C322 Datasheet (SGS Thomson Microelectronics)

32 Mbit (2Mb x16) UV EPROM and OTP EPROM

■ 5V ± 10% SUPPLY VOLTAGE in READ

OPERATION

■ ACCESS TIME: 80ns

■ WORD-WIDE CONFIGURABLE

■ 32 Mbit MASK ROM REPLACEMENT

■ LOW POWER CONSUMPTION

– Active Current 50mA at 5MHz
– Stand-by Current 100µA

■ PROGRAMMING VOLTAGE: 12V ± 0.25V

■ PROGRAMMING TIME: 50µs/word

■ ELECTRONIC SIGNATURE

– Manufacturer Code: 0020h
– Device Code: 0034h

DESCRIPTION

The M27C322 is a 32 Mbit EPROM of fe red i n the
UV range (ultra violet erase). It is ideally suited for
microprocessor systems requiring large data or
program storage. It is organised as 2 MWords of
16 bit. The pin-out is compatible with a 32 Mbit
Mask ROM.

The FDIP42W (window ceramic frit-seal package)
has a transparent lid which all ows the user to ex­pose the chip to ultraviolet light to erase the bit pat­tern. A new pattern can then be written rapidly to
the device by following the programming proce­dure.

For applications where the content is programmed
only one time and erasure is not required, the
M27C322 is offered in PDIP42 package.

42

1

FDIP42W (F) PDIP42 (P)

42

Figure 1. Logic Diagram

V

CC

21

A0-A20

GV

E

PP

M27C322

M27C322

1

16

Q0-Q15

V

SS

AI02156

1/13April 2000

M27C322

Figure 2A. DIP Connections

A18 A19

GV

A7
A6
A5
A4
A3
A2
A1
A0

V

SS
PP

Q0
Q8
Q1
Q9

Q10

Q3

Q11

1
2
3
4
5
6
7
8
9
10

M27C322

11

E

12
13
14
15
16
17
18
19
20
21

42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22

AI02157

A8A17
A9
A10
A11
A12
A13
A14
A15
A16
A20
V

SS

Q15
Q7
Q14
Q6
Q13
Q5Q2
Q12
Q4
V

CC

DEVICE OPERATION

The operating modes of the M27C322 are listed in
the Operating Modes Table. A single power supply
is required in the read mode. All inputs are TTL
compatib le exce pt for V

and 12V on A9 for the

PP

Electronic Signature.

Read Mode

The M27C322 has a word-wide organization. Chip
Enable (E
used for device selection. Output Enable (G

) is the power control and should be

) is the
output control and should be used to gate data to
the output pins in dependent of device selection.
Assuming that the addresses are s table, the ad­dress access time (t

) is equal to the delay

AVQV

Table 1. Signal Names

A0-A20 Address Inputs
Q0-Q15 Data Outputs
E

V

G

PP

V

CC

V

SS

from E to output (t
output after a delay of t

VPP, assuming that E has been low an d the

of G
addresses have been stable for at least t
t

.

GLQV

Chip Enable
Output Enable / Program Supply
Supply Voltage
Ground

). Data is available at the

ELQV

from the falling e dge

GLQV

AVQV

Standby Mode

The M27C322 has a standby mode which reduces

the supply current from 50mA to 100µA. The
M27C322 is placed in the standby mode by apply­ing a CMOS high signal to the E

input.When in the
standby mode, the outputs are in a high imped­ance state, independent of the G

VPP input.

Two Line Outp ut C ontrol

Because EPROMs are usually used in larger
memory arrays, this product features a 2 line con­trol function which accommodates the use of mul­tiple memory connection. The two line control
function allows:

a. the lowest possible memory power dissipation,
b. complete assurance that output bus content ion

will not occur.

For the most efficient use of these two control
lines, E
ry device selecting function, while G

should be decoded and used as the prima-

VPP should be
made a common connectio n to all devices in the
array and connected to the READ

line from the
system control bus. This ensures that all deselect­ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.

-

2/13

M27C322

Table 2. Absolute Maximum Ratings

(1)

Symbol Parameter Value Unit

T

A

T

BIAS

T

STG

(2)

V

IO

V

CC

(2)

V

A9

V

PP

Note: 1. Except for the ratin g " Operating Temperat ure Range" , stresses above th ose listed i n t he Table "Absolute Maximum Ratings" may

cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indi cated in t he Opera t in g sections of thi s specifi cation i s not imp l i ed. Exposure to Absolute M aximum Rating condi­tions for extended per iods may aff ect device reliabilit y. Refer also to the STMicroel ectronics SURE Program an d other relevan t qual ­ity docum en ts .

2. Minimum DC vo ltage on Input o r Outpu t is – 0.5V w ith poss ible un dershoot to –2. 0V fo r a peri od les s than 20ns. Ma ximum DC

voltage on Output is V

3. Depends on range.

Ambient Operating Temperature

Temperature Under Bias –50 to 125 °C
Storage Temperature –65 to 150 °C

Input or Output Voltage (except A9) –2 to 7 V
Supply Voltage –2 to 7 V
A9 Voltage –2 to 13.5 V
Program Supply Voltage –2 to 14 V

+0.5V with possible overshoot to VCC +2V for a period l ess than 20n s.

CC

(3)

–40 to 125 °C

Table 3. Operating Modes

Mode E

Read
Output Disable
Program
Program Inhibit
Standby
Electronic Signature

Note: X = VIH or VIL, VID = 12V ± 0.5V.

V

IL

V

IL

V

Pulse V

IL

V

IH

V

IH

V

IL

GV

V

PP

V

IL

V

IH

PP

PP

A9 Q15-Q0

X Data Out
X Hi-Z
X Data In
X Hi-Z

X X Hi-Z

V

IL

V

ID

Codes

Table 4. Electronic Signature

Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data

Manufacturer’s Code
Device Code

Note: Outputs Q15-Q8 are set to '0' .

V
V

IL

IH

00100000 20h
00110100 34h

3/13

M27C322

Table 5. AC Measurement Conditions

High Speed Standard

Input Rise and Fall Times ≤ 10ns ≤ 20ns
Input Pulse Voltages 0 to 3V 0.4V to 2.4V
Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V

Figure 3. AC Testing Input Output Waveform

High Speed

3V

1.5V

0V

Standard

2.4V

0.4V

Table 6. Capacitance

Symbol Parameter Test Condition Min Max Unit

C

IN

C

OUT

Note: 1. Sampled only, not 100% tested.

(1)

(TA = 25 °C, f = 1 MHz)

Input Capacitance
Output Capacitance

2.0V

0.8V

AI01822

Figure 4. AC Testing Load Circuit

1.3V

DEVICE
UNDER

TEST

CL = 30pF for High Speed
CL = 100pF for Standard
CL includes JIG capacitance

V

= 0V

IN

V

= 0V

OUT

1N914

3.3kΩ

CL

10 pF
12 pF

OUT

AI01823B

System Considerations

The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
supplies to the devices. The supply current ICC
has three segments of importance to the system
designer: the standby current, the active current
and the transient peaks that are produc ed by the
falling and rising edges of E

. The magnitude of the
transient current peaks is dependent on the ca­pacitive and inductive loadi ng of the device out­puts. The associated transient voltage peaks can
be suppressed by complying with the two line out-

4/13

put control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceram­ic capacitor is used on every device between V

CC

and VSS. This should be a high frequency type of
low inherent inductance and should be placed as
close as possible to the device. In addition, a

4.7µF electrolytic capacitor should be used be­tween V

and VSS for every eight devices. This

CC

capacitor should be mounted near the power sup­ply connection point. The purpose of this capacitor
is to overcome the voltage d r op caus ed by the in­ductive effects of PC B traces.

M27C322

Table 7. Read Mode DC Characteristics

(1)

(TA = 0 to 70 °C, –40 to 85 °C or –40 to 125 °C; VCC = 5V ± 10%; VPP = VCC)

Symbol Parameter Test Condition Min Max Unit

I

I

I

CC

I

CC

I

CC

I
V

V

IH

V

V

Note: 1. VCC must be ap pl i e d simultaneously with or before VPP and removed simultaneously or af ter VPP.

Input Leakage Current

LI

Output Leakage Curren t

LO

= VIL, GVPP = VIL, I

E

Supply Current

= VIL, GVPP = VIL, I

E

1

Supply Current (Standby) TTL

2

Supply Current (Standby) CMOS
Program Current

PP

Input Low Voltage –0.3 0.8 V

IL

(2)

Input High Voltage 2
Output Low Voltage

OL

Output High Voltage TTL

OH

2. Maximum DC voltage on Outp ut is V

CC

+0.5 V.

0v ≤ V

IN ≤ VCC

0V ≤ V

OUT ≤ VCC

f = 8MHz

f = 5MHz

E = V

IH

E > VCC – 0.2V

V

= V

PP

CC

I

= 2.1mA

OL

I

= –400µA

OH

OUT

OUT

= 0mA,

= 0mA,

±1 µA

±10 µA

70 mA

50 mA

1mA

100 µA

10 µA

V

+ 1

CC

0.4 V

2.4 V

V

Table 8. Read Mode AC Characteristics

(1)

(TA = 0 to 70 °C, –40 to 85 °C or –40 to 125 °C; VCC = 5V ± 10%; VPP = VCC)

Symbol Alt Parameter Test Condition

t

AVQVtACC

t

ELQV

t

GLQV

(2)

t

EHQZ

(2)

t

GHQZ

t

AXQX

Note: 1. VCC must be ap pl i e d simultaneously with or before VPP and removed simultaneously or af ter V

2. Sampled only, not 100% tested.

3. Speed obtained with High Speed AC measurement co nditions.

Address Valid to Output Valid

t

Chip Enable Low to Output Valid

CE

t

Output Enable Low to Output Valid

OE

t

Chip Enable High to Output Hi-Z

DF

t

Output Enable High to Output Hi-Z

DF

Address Transition to Output

t

OH

Transition

E

= VIL, GVPP = V

G

VPP = V

E

= V

IL

G

VPP = V

E

= V

IL

= VIL, GVPP = V

E

IL

IL

-80

Min Max Min Max

IL

0 40 0 40 ns
0 40 0 40 ns

55ns

IL

M27C322

(3)

-100

80 100 ns
80 100 ns
40 50 ns

PP

Unit

5/13

M27C322

Figure 5. Read Mode AC Waveforms

A0-A20

E

GV

PP

Q0-Q15

VALID

tAVQV

tGLQV

tELQV

Table 9. Programming Mode DC Characteri stics

tAXQX

(1)

VALID

tEHQZ

tGHQZ

Hi-Z

AI02207

(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12V ± 0.25V)

Symbol Parameter Test Condition Min Max Unit

V

I

I

CC

I

PP

V

V
V
V

OH

V

Note: 1. VCC must be ap pl i e d simultaneously with or before VPP and removed simultaneously or af ter VPP.

Input Leakage Current

LI

Supply Current 50 mA
Program Current
Input Low Voltage –0.3 0.8 V

IL

Input High Voltage 2.4

IH

Output Low Voltage

OL

Output High Voltage TTL
A9 Voltage 11.5 12.5 V

ID

≤ VIN ≤ V

IL

E

= V

I

= 2.1mA

OL

I

= –2.5mA

OH

IH

IL

±10 µA

50 mA

V

+ 0.5

CC

0.4 V

3.5 V

V

6/13

M27C322

Table 10. MARGIN MODE AC Characteristics

(1)

(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12V ± 0.25V)

Symbol Alt Parameter Test Condition Min Max Unit

t

A9HVPH

t

VPHEL

t

A10HEH

t

A10LEH

t

EXA10X

t

EXVPX

t

VPXA9X

Note: 1. VCC must be ap pl i e d simultaneously with or before VPP and removed simultaneously or af ter VPP.

Table 11. Programming Mode AC Characteristics

(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12V ± 0.25V)

Symbol Alt Parameter Test Condition Min Max Un it

t

AVEL

t

QVEL

t

VCHEL

t

VPHEL

t

VPLVPH

t

ELEH

t

EHQX

t

EHVPX

t

VPLEL

t

ELQV

t

EHQZ

t

EHAX

Note: 1. VCC must be ap pl i e d simultaneously with or before VPP and removed simultaneously or af ter VPP.

2. Sampled only, not 100% tested.

(2)

t

t

t

AS10VA10

t

AS10VA10

t

AH10

t
t

VA9 High to VPP High

AS9

VPP High to Chip Enable Low

VPS

Chip Enable Transition to V
Chip Enable Transition to VPP Transition

VPH

VPP Transition to VA9 Transition

AH9

t

AS

t

DS

t

VCS

t

OES

t

PRT

t

PW

t

DH

t

OEH

t

VR

t

DV

t

DFP

t

AH

2 µs

2µs
High to Chip Enable High (Set)
Low to Chip Enable High (Reset)

Transition

A10

1µs

1µs

1µs

2µs

2µs

(1)

Address Valid to Chip Enable Low 1 µs
Input Valid to Chip Enable Low 1 µs
VCC High to Chip Enable Low
VPP High to Chip Enable Low
VPP Rise Time

2µs
1µs

50 ns
Chip Enable Program Pulse Width (Initial) 45 55 µs
Chip Enable High to Input Transition 2 µs
Chip Enable High to VPP Transition
VPP Low to Chip Enable Low

2µs
1µs

Chip Enable Low to Output Valid 1 µs
Chip Enable High to Output Hi-Z 0 130 ns
Chip Enable High to Address Transition 0 ns

Programming

When delivered (and after each erasure for UV
EPROM), all bits of the M27C322 a re in the "1"
state. Data is introduced by selectively program ­ming "0"s into the desired bit locations. Although
only "0"s will be programmed, both "1"s and "0"s
can be present in the dat a word. The on ly way to
change a "0" to a "1" is by die exposition to ultravi-

olet light (UV EPROM). The M27C322 is in the
programming mode when V
G

VPP is at VIH and E is pulsed t o VIL. The data to

input is at 12.V,

PP

be programmed is applied to 16 b its in paralle l to
the data output pins. The levels required for the
address and data inputs are TTL. V

is specified

CC

to be 6.25V ± 0.25V.

7/13

M27C322

Figure 6. MARGIN MODE AC Waveforms

V

CC

A8

A9

tA9HVPH tVPXA9X

GV

PP

E

A10 Set

A10 Reset

tVPHEL

tA10HEH

tA10LEH

tEXVPX

tEXA10X

AI00736B

Note: A8 High level = 5V; A9 High level = 12V.

Figure 7. Programming and Verify Mod es AC Wavefor ms

A0-A20

Q0-Q15

V

CC

GV

PP

E

tAVEL

DATA IN DATA OUT

tQVEL

tVCHEL

tVPHEL

PROGRAM VERIFY

VALID

tEHQX

tEHVPX tELQV

tELEH

tEHAX

tEHQZ

tVPLEL

AI02205

Note: BYTE = VIH.

8/13

M27C322

Figure 8. Programming Flowchart

VCC = 6.25V, VPP = 12V

SET MARGIN MODE

n = 0

E = 50µs Pulse

NO

NO

VERIFY

YES

Last

NO

Addr

YES

RESET MARGIN MODE

CHECK ALL WORDS

1st: VCC = 6V

2nd: VCC = 4.2V

++ Addr

AI02206

YES

++n

= 25

FAIL

PRESTO III P rog ra m mi ng Algorithm

The PRESTO III Programming Algorithm allows
the whole array to be program ed with a guaran­teed margin in a typical time of 100 seconds. Pro­gramming with PRESTO I II con sists of a pplying a
sequence of 50µs prog ram pulses to each word

until a correct verify occurs (see Figure 8). During
programing and verify operation a MARGIN
MODE circuit must be activated to guarantee that
each cell is programed with enough margin. No
overprogram pulse is applied since the verify in
MARGIN MODE provides the necessary margin to
each programmed cell.

Program Inhibit

Programming of multiple M27C322s in parallel
with different data is also easily accomplished. Ex­cept for E

, all like inputs including GVPP of the par­allel M27C322 may be common. A TTL low level
pulse applied to a M27C322's E
12V, will program that M27C322. A high level E

input and VPP at

in­put inhibits the other M27C3 22s from being pro­grammed.

Program Verify

A verify (read) should be performed on the pro­grammed bits to determine that they were correct­ly programmed. The verify is accomplished with

GV

at VIL. Data should be verified with t

PP

ter the falling edge of E

.

ELQV

af-

On-B oard Programming

The M27C322 can be directly programmed in the
application circuit. See the relevant Application
Note AN620.

Electronic Signature

The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufac turer and type. This m ode
is intended for use by program ming equipme nt to
automatically match the device to be programmed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C ± 5°C am­bient temperature range that is required when pro­gramming the M27C322. To activate the ES
mode, the programming equipment must force

11.5V to 12.5V on address line A9 of the
M27C322, with V

PP

= V

= 5V. Two identifier

CC

bytes may then be sequenced from the device out­puts by toggling address line A0 from V
other address lines must be held at V

to VIH. All

IL

during

IL

Electronic Signature mode.
Byte 0 (A0 = V

code and byte 1 (A0 = V

) represents the manufacturer

IL

) the device identifier

IH

code. For the STMicroelectronics M27C322, these
two identifier bytes are given in Table 4 and can be
read-out on outputs Q0 to Q7.

ERASURE OPERATIO N (appl i es to UV EPROM)

The erasure characteristics of the M27C322 is
such that erasure begins when the cells are ex­posed to light with waveleng ths shorter than ap­proximately 4000 Å. It should be noted that
sunlight and some type of fluorescent lamps have
wavelengths in the 3000-4000 Å range. Research
shows that constant exposure to room level fluo­rescent lighting could erase a typical M27C322 in
about 3 years, while it would take approximately 1
week to cause erasure when exposed to direct
sunlight. If the M27C322 is to be exposed to these
types of lighting conditions for extended periods of
time, it is suggested that opaque labels be put over
the M27C322 window to prevent unintentional era­sure. The recommended erasure procedure for
M27C322 is exposure to short wave ultraviolet
light which has a wav eleng th of 2537 Å. The inte­grated dose (i.e. UV intensity x exposure time) for
erasure should be a minimum of 30 W-sec/cm
The erasure time with this dosage is approximate­ly 30 to 40 minutes using an ultraviolet lamp with
12000 µW/cm

2

power rating. The M27C322
should be placed within 2.5cm (1 inch) of t he l amp
tubes during the erasure. Some lamps have a filter
on their tubes which should be removed before
erasure.

2

.

9/13

M27C322

Table 12. Ordering Information Scheme

Example: M27C322 -80 F 1

Device Type

M27

Supply Voltage

C = 5V ±10%

Device Function

322 = 32 Mbit (2Mb x16)

Speed

(1)

-80

= 80 ns

-100 = 100 ns

Package

F = FDIP42W
P = PDIP42

Temperature Range

1 = 0 to 70 °C
3 = –40 to 125 °C
6 = –40 to 85 °C

Note: 1. High Speed, see AC Characteris tics secti on for further i n f ormation.

For a list of available options (Speed, Pac kage, etc...) or for furthe r information on any aspect of this de­vice, please contact the STMicroelectronics Sales Office nearest to you.

Table 13. Revision History

Date Revision Details

July 1999 First Issue

02/24/00

04/04/00

Programming Time changed
Programming Flowchart changed (Figure 8)
Presto III Programming Algorithm paragraph changed

–40 to 85 °C and –40 to 125 °C temperature ranges added (Table 7, 8 and 12)
80ns speed class in High Speed AC measurement conditions

10/13

M27C322

Table 14. FDIP42W - 42 pin Ceramic Frit-seal DIP with window, Package Mechanic al Data

Symbol

Typ Min Max Typ M in Max

A 5.72 0.225
A1 0.51 1.40 0.020 0.055
A2 3.91 4.57 0.154 0.180
A3 3.89 4.50 0.153 0.177

B 0.41 0.56 0.016 0.022
B1 1.45 – – 0.0 57 – –

C 0.23 0.30 0.009 0.012

D 54.41 54.86 2.142 2.160
D2 5 0.80 – – 2.000 – –

E 15.24 – – 0.600 – –
E1 14.50 14.90 0.571 0.587

e 2.54 – – 0.100 – –
eA 14.99 – – 0.590 – –
eB 16.18 18.03 0.637 0.710

L 3.18 4.10 0.125 0.161

S 1.52 2.49 0.060 0.098
K 8.00 – – 0.3 15 – –

K1 16.00 – – 0.630 – –

α 4° 11° 4° 11°
N42 42

mm inches

Figure 9. FDIP42W - 42 pin Ceramic Frit-seal DIP with window, Package Outline

A2

B1 B e1

A3

A1AL

α

C

eA

D2

eB

D

S

N

E1 E

K

1

Note: Drawing is not to scale.

K1

FDIPW-b

11/13

M27C322

Table 15. PDIP42 - 42 pin Plastic DIP, 600 mils width, Package Mechanical Data

Symbol

Typ Min Max Typ M in Max

A – 5.0 8 – 0.200
A1 0.25 – 0. 010 –
A2 3.56 4.06 0.140 0.160

B 0.38 0.53 0.015 0.021
B1 1.27 1.65 0.050 0.065

C 0.20 0.36 0.008 0.014

D 52.20 52.71 2.055 2.075
D2 5 0.80 – – 2.000 – –

E 15.24 – – 0.600 – –
E1 13.59 13.84 0.535 0.545

e1 2.54 – – 0.100 – –
eA 14.99 – – 0.590 – –
eB 15.24 17.78 0.600 0.700

mm inches

L 3.18 3.43 0.125 0.135
S 0.86 1.37 0.034 0.054
α 0° 10° 0° 10°
N42 42

Figure 10. PDIP42 - 42 pin Plastic DIP, 600 mils width, Package Outline

A2

A1AL

B1 B e1

D2

α

C

eA

eB

D

S

N

E1 E

Note: Drawing is not to scale.

12/13

1

PDIP

M27C322

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to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics product s are not
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13/13