Datasheet M27C1001 Datasheet (SGS Thomson Microelectronics)

1 Mbit (128Kb x8) UV EPROM and OTP EPROM

■ 5V ± 10% SUPPLY VOLTAGE in READ

OPERATION

■ ACCESS TIME: 35ns

■ LOW POWER CONSUMPTION:

– Active Current30mA at 5Mhz
– Standby Current 100µA

■ PROGRAMMING VOLTAGE: 12.75V ± 0.25V

■ PROGRAMMING TIME: 100µs/word

■ ELECTRONIC SIGNATURE

– Manufacturer Code: 20h
– Device Code: 05h

M27C1001

32

1

FDIP32W (F) PDIP32 (B)

32

1

DESCRIPTION

The M27C1001 is a 1 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for micro­processor systems requiring large programs and
is organized as 131,072 words of 8 bits.

The FDIP32W (window ceramic frit-seal package)
and theLCCC32W (leadless chip carrier package)
have a transparent lids which allowthe user to ex­pose thechipto ultraviolet light to erase the bitpat­tern. A new pattern can then be written to the
device by following the programming procedure.

For applications where the content is programmed
only one time and erasure is not required, the
M27C1001 is offered in PDIP32, PLCC32 and
TSOP32 (8 x 20 mm) packages.

LCCC32W (L)

PLCC32 (K) TSOP32 (N)

Figure 1. Logic Diagram

V

CC

17

A0-A16

P

E

G

M27C1001

8 x 20 mm

V

PP

8

Q0-Q7

V

SS

AI00710B

1/17January 2000

M27C1001

Figure 2A. DIP Connections

V

1

PP

2

A15

3

A12

4

A7

5

A6

6

A5

7

A4

8
A3
A2
A1
A0

Q0

Q2
SS

M27C1001

9

10

11

12

13

14

15

16

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

AI00711

V

CC

PA16
NC
A14
A13
A8
A9
A11
G
A10
E
Q7
Q6
Q5Q1
Q4
Q3V

Figure 2B. LCC Connections

A16

A7
A6
A5
A4
A3
A2
A1
A0

Q0

A12

9

Q1

VPPV

A15

1

32

M27C1001

17

Q2

Q3

SS

V

Q4

CC

P

Q5

NC

25

Q6

A14
A13
A8
A9
A11
G
A10
E
Q7

AI00712

Figure 2C. TSOP Connections

A11 G

A9

A8
A13
A14

NC

V

CC

V

PP

A16
A15
A12

A7

A6

A5

A4 A3

1

P

M27C1001

8

(Normal)

9

16 17

AI01151B

32

25
24

A10
E
Q7
Q6
Q5
Q4
Q3
V

SS

Q2
Q1
Q0
A0
A1
A2

Table 1. Signal Names

A0-A16 Address Inputs

Q0-Q7 Data Outputs

E Chip Enable

G Output Enable

P Program

V

PP

V

CC

V

SS

NC Not Connected Internally

Program Supply

Supply Voltage

Ground

2/17

M27C1001

Table 2. Absolute Maximum Ratings

(1)

Symbol Parameter Value Unit

T

A

T

BIAS

T

STG

(2)

V

IO

V

CC

(2)

V

A9

V

PP

Note: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may

cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi­tions for extended periods may affect device reliability. Referalso to the STMicroelectronics SUREProgram andother relevant qual­ity documents.

2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V

3. Depends on range.

Ambient Operating Temperature
Temperature Under Bias –50 to 125 °C
Storage Temperature –65 to 150 °C

Input or Output Voltage (except A9) –2 to 7 V
Supply Voltage –2 to 7 V
A9 Voltage –2 to 13.5 V
Program Supply Voltage –2 to 14 V

+0.5V with possible overshoot to VCC+2V for a period less than 20ns.

CC

(3)

–40 to 125 °C

Table 3. Operating Modes

Mode E G P A9

Read
Output Disable V
Program
Verify V
Program Inhibit
Standby
Electronic Signature

Note: X = VIHor VIL,VID= 12V ± 0.5V.

V

IL

IL

V

IL

IL

V

IH

V

IH

V

IL

V

IL

V

IH

V

IH

V

IL

XX
XXV

VILPulse

V

IH

X

XVPPData Out
XXX
XXX

V

IL

V

IH

V

ID

V

PP

V

or V

CC

SS

or V

CC

SS

V

PP

V

PP

V

or V

CC

SS

V

CC

Q7-Q0

Data Out

Hi-Z

Data In

Hi-Z
Hi-Z

Codes

Table 4. Electronic Signature

Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data

Manufacturer’s Code
Device Code

V

IL

V

IH

00100000 20h
00000101 05h

3/17

M27C1001

Table 5. AC Measurement Conditions

High Speed Standard

Input Rise and FallTimes ≤ 10ns ≤ 20ns
Input Pulse Voltages 0 to 3V 0.4V to 2.4V
Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V

Figure 3. AC Testing Input Output Waveform

High Speed

3V

1.5V

0V

Standard

2.4V

0.4V

Table 6. Capacitance

Symbol Parameter Test Condition Min Max Unit

C

IN

C

OUT

Note: 1. Sampled only, not 100% tested.

Input Capacitance
Output Capacitance

(1)

(TA=25°C, f = 1 MHz)

2.0V

0.8V

AI01822

Figure 4. AC Testing Load Circuit

1.3V

1N914

3.3kΩ

DEVICE
UNDER

TEST

C

L

CL= 30pF for HighSpeed
CL= 100pF for Standard
CLincludes JIG capacitance

V

V

IN

OUT

=0V

=0V

6pF

12 pF

OUT

AI01823B

DEVICE OPERATION

The operating modes of the M27C1001 are listed
in theOperating Modes table. A single powersup­ply isrequired in the readmode. Allinputs areTTL
levels except for VPPand 12V on A9 for Electronic
Signature.

Read Mode

The M27C1001 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable(G) isthe output control and should
be used to gate data to the output pins, indepen-

4/17

dent of device selection. Assuming that the ad­dresses are stable, the address access time
(t

) is equal to the delay from E to output

AVQV

(t

). Datais availableatthe output aftera delay

ELQV

of t

from the falling edge of G, assuming that

GLQV

E has been low andthe addresses havebeen sta­ble for at least t

AVQV-tGLQV

.

Standby Mode

The M27C1001 hasa standby mode whichreduc­es the supply current from 30mA to 100µA. The
M27C1001 is placed in the standby mode by ap­plying a CMOS high signalto the E input.When in
the standby mode, theoutputs are in ahigh imped­ance state,independent of the G input.

M27C1001

Table 7. Read Mode DC Characteristics

(1)

(TA = 0 to 70°C, –40 to 85°C or –40 to 125°C; VCC=5V±5% or 5V ± 10%; VPP=VCC)

Symbol Parameter Test Condition Min Max Unit

I

I
I

CC

I

CC1

I

CC2

I
V

V

IH

V

V

Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.

Table 8A. Read Mode AC Characteristics

Input Leakage Current

LI

Output Leakage Current

LO

Supply Current

I

OUT

0V ≤ V

0V ≤ V

E=V

Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current

PP

Input Low Voltage –0.3 0.8 V

IL

(2)

Input High Voltage 2
Output Low Voltage

OL

Output High Voltage TTL

OH

Output High Voltage CMOS I

2. Maximum DC voltage on Output is V

CC

+0.5V.

(1)

E>V

I

I

OH
OH

≤ V

IN

CC

≤ V

OUT

IL

CC

,G=VIL,

= 0mA, f = 5MHz

E=V

IH

– 0.2V

CC

V

PP=VCC

= 2.1mA

OL

= –400µA
= –100µAV

2.4 V

CC

– 0.7V V

±10 µA
±10 µA

30 mA

1mA

100 µA

10 µA

V

+1

CC

0.4 V

(TA = 0 to 70°C, –40 to 85°C or –40 to 125°C; VCC=5V±5% or 5V ± 10%; VPP=VCC)

M27C1001

Symbol Alt Parameter Test Condition

-35

(3)

Min Max Min Max Min Max Min Max

t

AVQV

t

ELQV

t

GLQV

(2)

t

EHQZ

(2)

t

GHQZ

t

AXQX

Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.

2. Sampled only, not 100% tested.

3. Speed obtained with High Speed AC measurement conditions.

Address Valid to

t

ACC

Output Valid
Chip Enable Low to

t

CE

Output Valid
Output Enable Low

t

OE

to Output Valid
Chip Enable High to

t

DF

Output Hi-Z
Output Enable High

t

DF

to Output Hi-Z
Address Transitionto

t

OH

Output Transition

E=V

G=V

G=V

E=V

,G=V

IL

E=V

E=V

,G=V

IL

IL

IL

IL

IL

IL

IL

35 45 60 70 ns

35 45 60 70 ns

25 25 30 35 ns

025025030030ns

025025030030ns

0000ns

-45 -60 -70

V

Unit

Two Line Output Control

Because EPROMs are usually used in larger
memory arrays, this product features a 2 line con­trol function which accommodates the use of mul­tiple memory connection. The two line control
function allows:

a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention

will not occur.

For the most efficient use of these two control
lines, Eshould bedecoded and usedas the prima­ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system controlbus. Thisensures that all deselect­ed memorydevices are intheir lowpower standby
mode and that the output pins are only active
when data is required from a particular memory
device.

5/17

M27C1001

Table 8B. Read Mode AC Characteristics

(1)

(TA = 0 to 70°C, –40 to 85°C or –40 to 125°C; VCC=5V±5% or 5V ± 10%; VPP=VCC)

M27C1001

Symbol Alt Parameter Test Condition

Min Max Min Max Min Max Min Max

t

AVQV

t

ELQV

t

GLQV

t

EHQZ

t

GHQZ

t

AXQX

Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.

t

(2)

(2)

2. Sampled only, not 100% tested.

Address Valid to

ACC

Output Valid
Chip Enable Low to

t

CE

Output Valid
Output Enable Low

t

OE

to Output Valid
Chip Enable Highto

t

DF

Output Hi-Z
Output Enable High

t

DF

to Output Hi-Z
Address Transition

t

OH

to Output Transition

E=V

E=V

,G=V

IL

G=V

E=V

G=V

E=V

,G=V

IL

IL

IL

IL

IL

IL

IL

80 90 100 120 ns

80 90 100 120 ns

40 45 50 60 ns

0 30 0 30 0 30 0 40 ns

0 30 0 30 0 30 0 40 ns

0000ns

Figure 5. Read Mode AC Waveforms

-12/-15/

-20/-25

Unit-80 -90 -10

A0-A16

E

G

Q0-Q7

VALID

tAVQV

tGLQV

tELQV

System Considerations

The power switching characteristics of Advanced
CMOS EPROMs requirecareful decoupling of the
devices. The supply current, ICC, has three seg­ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the fallingand rising edgesof E. The magnitudeof
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output.The associated transient voltagepeaks
can be suppressed by complying with the two line

VALID

tAXQX

tEHQZ

tGHQZ

Hi-Z

AI00713B

outputcontrol and byproperly selecteddecoupling
capacitors.It is recommended thata 0.1µF ceram­ic capacitorbe used onevery device between V

CC

and VSS. This should be a high frequency capaci­tor of low inherent inductance and should be
placed as close to the device as possible. In addi­tion, a 4.7µF bulk electrolytic capacitor should be
used between VCCand VSSfor every eight devic­es. The bulk capacitor should be located near the
power supply connection point. The purposeof the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.

6/17

M27C1001

Table 9. Programming Mode DC Characteristics

(1)

(TA=25°C; VCC= 6.25V ± 0.25V; VPP= 12.75V ± 0.25V)

Symbol Parameter Test Condition Min Max Unit

I

LI

I

CC

I

PP

V

IL

V

IH

V

OL

V

OH

V

ID

Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.

Table 10. Programming Mode AC Characteristics

Input Leakage Current

V

IL

≤ VIN≤ V

IH

±10 µA
Supply Current 50 mA
Program Current

E=V

IL

50 mA

Input Low Voltage –0.3 0.8 V

V

Input High Voltage 2

CC

+ 0.5

Output Low Voltage IOL= 2.1mA 0.4 V

I

Output High Voltage TTL

= –400µA

OH

2.4 V

A9 Voltage 11.5 12.5 V

(1)

(TA=25°C; VCC= 6.25V ± 0.25V; VPP= 12.75V ± 0.25V)

Symbol Alt Parameter Test Condition Min Max Unit

t

AVPL

t

QVPL

t

VPHPL

t

VCHPL

t

ELPL

t

PLPH

t

PHQX

t

QXGL

t

GLQV

(2)

t

GHQZ

t

GHAX

Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.

2. Sampled only, not 100% tested.

t
t

t

VPS

t

VCS

t

CES

t

t

t

OES

t

t

DFP

t

Address Valid to Program Low 2 µs

AS

Input Valid to Program Low 2 µs

DS

VPPHigh to Program Low
VCCHigh to Program Low

2 µs

2 µs
Chip Enable Low to Program Low 2 µs
Program Pulse Width 95 105 µs

PW

Program High to Input Transition 2 µs

DH

Input Transitionto Output Enable Low 2 µs
Output Enable Low to Output Valid 100 ns

OE

Output Enable High to Output Hi-Z 0 130 ns
Output Enable High to Address

AH

Transition

0ns

V

Programming

When delivered (and after each erasure for UV
EPROM), all bits of the M27C1001 are in the ’1’
state. Data is introduced by selectively program­ming ’0’s into the desired bit locations. Although
only ’0’s will be programmed,both ’1’s and ’0’s can
be present in the data word. The only way to
change a ’0’ to a ’1’ isby die exposition to ultravio-

let light (UV EPROM). The M27C1001 is in the
programming mode when VPPinput is at 12.75V,
EisatVILand P is pulsed to VIL. The data to be
programmed is applied to 8 bits in parallel to the
data output pins. The levels required for the ad­dress and data inputs are TTL. VCCis specified to
be 6.25V ± 0.25V.

7/17

M27C1001

Figure 6. Programming and Verify Modes AC Waveforms

A0-A16

tAVPL

Q0-Q7

tQVPL

V

PP

tVPHPL

V

CC

tVCHPL

E

tELPL

P

tPLPH

G

Figure 7. Programming Flowchart

VCC= 6.25V, VPP= 12.75V

n=0

P = 100µs Pulse

NO

NO

VERIFY

YES

Last

NO

Addr

YES

CHECK ALL BYTES

1st: VCC=6V

2nd: VCC= 4.2V

++ Addr

YES

++n

=25

FAIL

VALID

DATA IN DATA OUT

tPHQX

tGLQV

tQXGL

PROGRAM VERIFY

PRESTO II Programming Algorithm

PRESTO II Programming Algorithm allows the
whole array to be programmed, with a guaranteed
margin, in a typical time of 13 seconds. Program­ming with PRESTO II involves in applying a se­quence of 100µs programpulses to eachbyte until
a correct verify occurs (see Figure 7). During pro­gramming and verify operation, a MARGIN MODE
circuit is automatically activated in order to guar­antee that each cell is programmed with enough
margin. No overprogram pulse isapplied sincethe
verify in MARGIN MODE provides necessary mar­gin to each programmed cell.

Program Inhibit

Programming of multiple M27C1001s in parallel
with different data is also easily accomplished. Ex­cept for E,all like inputs including G of the parallel
M27C1001 may be common. A TTL low level
pulse applied to a M27C1001’sP input, with E low
and VPPat 12.75V, will program that M27C1001.
A high level E input inhibits the other M27C1001s
from being programmed.

Program Verify

A verify (read) should be performed on the pro­grammed bitsto determine that theywere correct-

AI00715C

ly programmed. Theverify is accomplished with E
and G at VIL, P at VIH,VPPat 12.75V and VCCat

6.25V.

tGHQZ

tGHAX

AI00714

8/17

M27C1001

On-Board Programming

The M27C1001 can be directly programmed in the
application circuit. See the relevant Application
Note AN620.

Electronic Signature

The Electronic Signature (ES) mode allows the
reading out of a binary code froman EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically match the device to be programmed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C ± 5°C am­bient temperaturerange thatis required when pro­gramming the M27C1001. To activate the ES
mode, the programming equipment must force

11.5V to 12.5V on address line A9 of the
M27C1001, with VPP=VCC= 5V. Two identifier
bytes maythen be sequenced fromthe deviceout­puts bytoggling address line A0 from VILtoVIH. All
other address lines must be held at VILduring
Electronic Signature mode.

Byte 0 (A0 = VIL) represents the manufacturer
code and byte 1 (A0 = VIH) the device identifier
code. For the STMicroelectronics M27C1001,
these two identifier bytes are given in Table 4 and
can be read-out on outputs Q7 to Q0.

ERASURE OPERATION(applies to UVEPROM)

The erasure characteristics of the M27C1001 is
such that erasure begins when the cells are ex­posed to light with wavelengths shorter than ap­proximately 4000 Å. It should be noted that
sunlight and some type of fluorescent lamps have
wavelengths in the 3000-4000 Å range. Research
shows that constant exposure to room level fluo­rescent lighting could erase atypical M27C1001 in
about 3 years, while it would takeapproximately 1
week to cause erasure when exposed to direct
sunlight. If the M27C1001 is to be exposed to
these typesof lighting conditions for extended pe­riods of time, it is suggested that opaque labels be
put over the M27C1001 window to prevent unin­tentional erasure.The recommended erasure pro­cedure for the M27C1001 is exposure to short
wave ultraviolet light which has a wavelength of
2537 Å. The integrated dose (i.e. UV intensity x
exposure time) for erasure should be a minimum
of 15 W-sec/cm2. The erasure time with this dos­age is approximately 15to 20 minutes using an ul­traviolet lamp with 12000 µW/cm2power rating.
The M27C1001 should be placed within 2.5 cm (1
inch) of the lamp tubes during the erasure. Some
lamps have a filter on their tubes which should be
removed before erasure.

9/17

M27C1001

Table 11. Ordering Information Scheme

Example: M27C1001 -35 X C 1 TR

Device Type

M27

SupplyVoltage

C=5V

Device Function

1001 = 1 Mbit (128Kb x8)

Speed

(1)

=35ns

-35

-45 = 45 ns

-60 = 60 ns

-70 = 70 ns

-80 = 80 ns

-90 = 90 ns

-10 = 100 ns

-12 = 120 ns

-15 = 150 ns

-20 = 200 ns

-25 = 250 ns

Tolerance

V

CC

blank = ± 10%
X=±5%

Package

F = FDIP32W
B = PDIP32
L = LCCC32W
C = PLCC32
N = TSOP32: 8 x 20 mm

Temperature Range

1=0to70°C
3 = –40 to 125 °C
6=–40to85°C

Options

X = Additional Burn-in
TR = Tape & Reel Packing

Note: 1. High Speed, see AC Characteristics section forfurther information.

For a list of available options (Speed, Package, etc...) or for further information on any aspect of this de­vice, please contact the STMicroelectronics Sales Office nearest to you.

10/17

Table 12. Revision History

Date Revision Details

September 1998 First Issue
01/24/00 35ns speed class addes (Table8A, 11)

M27C1001

11/17

M27C1001

Table 13. FDIP32W- 32 pin Ceramic Frit-seal DIP with window, Package Mechanical Data

Symb

A 5.72 0.225
A1 0.51 1.40 0.020 0.055
A2 3.91 4.57 0.154 0.180
A3 3.89 4.50 0.153 0.177

B 0.41 0.56 0.016 0.022
B1 1.45 – – 0.057 – –

C 0.23 0.30 0.009 0.012

D 41.73 42.04 1.643 1.655

D2 38.10 – – 1.500 – –

E 15.24 – – 0.600 – –
E1 13.06 13.36 0.514 0.526

e 2.54 – – 0.100 – –
eA 14.99 – – 0.590 – –
eB 16.18 18.03 0.637 0.710

L 3.18 0.125

S 1.52 2.49 0.060 0.098

∅ 7.11 – – 0.280 – –

α 4° 11° 4° 11°

N32 32

Typ Min Max Typ Min Max

mm inches

Figure 8. FDIP32W - 32 pin Ceramic Frit-seal DIP with window, Package Outline

A2

B1 B e

A3A1A

L

α

C

eA

D2

eB

D

S

N

∅

1

Drawing is not to scale.

E1 E

FDIPW-a

12/17

Table 14. PDIP32 - 32 lead Plastic DIP, 600 mils width, Package Mechanical Data

Symb

Typ Min Max Typ Min Max

A – 5.08 – 0.200
A1 0.38 – 0.015 –
A2 3.56 4.06 0.140 0.160

B 0.38 0.51 0.015 0.020
B1 1.52 – – 0.060 – –

C 0.20 0.30 0.008 0.012
D 41.78 42.04 1.645 1.655

D2 38.10 – – 1.500 – –

E 15.24 – – 0.600 – –
E1 13.59 13.84 0.535 0.545

e1 2.54 – – 0.100 – –
eA 15.24 – – 0.600 – –
eB 15.24 17.78 0.600 0.700

L 3.18 3.43 0.125 0.135
S 1.78 2.03 0.070 0.080
α 0° 10° 0° 10°

N32 32

mm inches

M27C1001

Figure 9. PDIP32 - 32 lead Plastic DIP, 600 mils width, Package Outline

A2A1A

L

B1 B e1

D2

α

eA

eB

D

S

N

E1 E

1

Drawing is not to scale.

C

PDIP

13/17

M27C1001

Table 15. LCCC32W - 32 lead Leadless Ceramic Chip Carrier, Package Mechanical Data

Symb

Typ Min Max Typ Min Max

A 2.28 0.090
B 0.51 0.71 0.020 0.028
D 11.23 11.63 0.442 0.458
E 13.72 14.22 0.540 0.560

e 1.27 – – 0.050 – –
e1 0.39 – 0.015 –
e2 7.62 – – 0.300 – –
e3 10.16 – – 0.400 – –

h 1.02 – – 0.040 – –

j 0.51 – – 0.020 – –

L 1.14 1.40 0.045 0.055
L1 1.96 2.36 0.077 0.093

K 10.50 10.80 0.413 0.425
K1 8.03 8.23 0.316 0.324

N32 32

mm inches

Figure 10. LCCC32W - 32 lead Leadless Ceramic Chip Carrier, Package Outline

e2

D

EK

e3

e

N

1

e1

K1

A

LCCCW-a

Drawing is not to scale.

o

jx45

L1

B

Lhx45

o

14/17

M27C1001

Table 16. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data

Symb

A 2.54 3.56 0.100 0.140
A1 1.52 2.41 0.060 0.095
A2 – 0.38 – 0.015

B 0.33 0.53 0.013 0.021
B1 0.66 0.81 0.026 0.032

D 12.32 12.57 0.485 0.495

D1 11.35 11.56 0.447 0.455
D2 9.91 10.92 0.390 0.430

E 14.86 15.11 0.585 0.595
E1 13.89 14.10 0.547 0.555
E2 12.45 13.46 0.490 0.530

e 1.27 – – 0.050 – –

F 0.00 0.25 0.000 0.010

R 0.89 – – 0.035 – –

N32 32

Nd 7 7
Ne 9 9
CP 0.10 0.004

Typ Min Max Typ Min Max

mm inches

Figure 11. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline

D

D1

1N

Ne E1 E

F

D2/E2

0.51 (.020)

1.14 (.045)

Nd

R

PLCC

Drawing is not to scale.

A1

A2

B1

e

B

A

CP

15/17

M27C1001

Table 17. TSOP32 - 32 leadPlastic Thin Small Outline, 8 x 20 mm, Package Mechanical Data

Symb

Typ Min Max Typ Min Max

A 1.20 0.047
A1 0.05 0.15 0.002 0.007
A2 0.95 1.05 0.037 0.041

B 0.15 0.27 0.006 0.011

C 0.10 0.21 0.004 0.008

D 19.80 20.20 0.780 0.795

D1 18.30 18.50 0.720 0.728

E 7.90 8.10 0.311 0.319

e 0.50 - - 0.020 - -

L 0.50 0.70 0.020 0.028

α 0° 5° 0° 5°

N32 32

CP 0.10 0.004

mm inches

Figure 12. TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package Outline

A2

1N

e

E

B

N/2

D1

D

DIE

A

CP

C

TSOP-a

Drawing is not to scale.

LA1 α

16/17

M27C1001

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for theconsequences
of use of such information nor for any infringement ofpatents or other rights of third parties which may result from itsuse. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in lifesupport devices or systems without express written approval of STMicroelectronics.

The ST logo is registered trademark of STMicroelectronics

2000 STMicroelectronics - All Rights Reserved



All other names are the property of their respective owners.

Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands -

Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.

STMicroelectronics GROUP OF COMPANIES

http://www.st.com

17/17