Page 1
FA ST ACCESS TIME: 200ns
EXTENDED TEMPERATURE RANGE
SINGLE 5V SUPPLY VOLTAGE
LOW STANDBY CURRE NT: 40mA max
M27512
NMOS 512K (64K x 8) UV EPROM
TTL COMPATIBLE DURING READ and
PROGRAM
FAST PROGRAMMING ALGORITHM
ELECTRONIC SIGNATURE
PROGRAMMING VOLTAGE: 12V
DESCRIPTION
The M27512 is a 524,288 bit UV erasable and
electrically programmable memory EPROM. It is
organized as 65,536 words by 8 bits.
The M27512 is housed in a 28 Pin Window Ceramic
Frit-Seal Dual-in-Line pac kage. The transparent lid
allows the user to expose the chip t o ultraviolet light
to erase the bit patt ern. A new pattern can then be
written to the devic e by following t he programmi ng
procedure.
28
1
FDIP28W (F)
Figure 1. Logic Diag ra m
V
CC
16
A0-A15
8
Q0-Q7
E
Table 1. Signal Names
A0 - A15 Address Inputs
Q0 - Q7 Data Outputs
E Chip Enable
GV
PP
V
CC
V
SS
March 1995 1/11
Output Enable / Program Supply
Supply Voltage
Ground
GV
PP
M27512
V
SS
AI00765B
Page 2
M27512
Tab le 2. Absol ute Maxim u m Ratin gs
Symbol Parameter Value Unit
T
A
T
BIAS
T
STG
V
IO
V
CC
V
A9
V
PP
Note: Except for the rating "Operating T emperature R ange", stresses above those lis ted in the Table "Absolute Maximum Ratings" may cause
permanent damage to the device. These are stress ratings only and opera tion of the device at these or any other conditions above those
indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rati ng conditions for extended periods
may affect device reliabil ity. Refer also to the SGS-THOMSON SURE Program and other relevant quality document
Ambient Operating T empera ture
Temperature Under Bias
Storage Temperature –65 to 125 °C
Input or Output Voltages –0.6 to 6.5 V
Supply Voltage –0.6 to 6.5 V
A9 Voltage –0.6 to 13.5 V
Program Supply –0.6 to 14 V
Grade 1
Grade 6
Grade 1
Grade 6
0 to 70
–40 to 85
–10 to 80
–50 to 95
°C
°C
Figure 2. DIP Pin Connect ion s
A15 V
1
A12
2
3
A7
4
A6
5
A5
6
A4
7
A3
A2
A1
A0
Q0
Q2
SS
8
9
10
11
12
13
14
M27512
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AI00766
CC
A14
A13
A8
A9
A11
GV
A10
E
Q7
Q6
Q5Q1
Q4
Q3V
PP
DEVICE OPERATION
The six modes of operations of the M27512 are
listed in the Operating Modes table. A single 5V
power supply is required in the read mode. All
inputs are TTL levels except for
GVPP and 12V on
A9 for Electronic Signature.
Read Mode
The M27512 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (
E) is the power
control and should be used for device selection.
Output Enable (
G) is the output control and should
be used to gate data to the output pins, independent of device selection. Assuming that the
addresses are s table, addres s access time (t
is equal to the delay from
E to output (t
is available at the out puts after delay of t
the falling edge of
G, assuming that E has been low
ELQV
GLQV
AVQV
). Data
from
and the addresses have been stable for at least
t
AVQ V-tGLQV
.
Stand by Mod e
The M27512 has a standby mode which reduces
the maximum active power current f rom 125mA to
40mA. The M27512 is placed in the standby mode
by applying a TTL high signal to the
E input. Whe n
in the standby mode, the outputs are in a high
impedance state, independent of the
GVPP input.
Two Line Output Control
Because EPROM s are usually used in larger memory arrays, the product features a 2 line control
function which accommodates the use of multiple
memory connection. The two line control function
allows :
a. the lowest possible m emory power dissipation,
b. complete assurance that output bus content i on
will not occur.
)
2/11
Page 3
M27512
DEVICE OPER ATION (cont’d)
For the most efficient us e of these two control lines,
E should be decoded and used as the primary
device selecting function, while
GVPP should be
made a common connection to all devices in the
array and connected to the
READ line from the
system control bus. This ensures that all deselected memory devices are in their low power
standby mode and that the output pins are only
active when data is r equired from a particular memory device.
System Considerati ons
The power switching characteristics of fast
EPROMs require careful decoupling of the devices.
The supply current, I
, has three segments that
CC
are of interest to t he system designer : the s tandby
current level, the active c urrent level, and transient
current peaks that are produced by the falling and
rising edges of
E. The magnitude of the transient
current peaks is dependent on the capacitive and
inductive loading of the device at the output. The
associated transient voltage peaks can be suppressed by complying with the two line output
control and by properly selected decoupling capacitors. It is recommenced that a 1µF ceramic
capacitor be used on every device between V
CC
and VSS. This should be a high frequency capacitor
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7µF bulk electrolytic capacitor should be used
between V
and VSS for every eight devices. The
CC
bulk capacitor should be located near the power
supply connection point. The purpose of the bulk
capacitor is to overcome the voltage drop caused
by the inductive effects of PCB trac es.
Programming
When delivered, and after each erasure, all bits of
the M27512 are in the “1" state. Data is introduced
by selectively programming ”0s" into the desired bit
locations. Although only “0s” will be programmed,
both “1s” and “0s” can be present in the dat a word.
The only way to change a “0" to a ”1" is by ultraviolet
light erasure. The M27512 is in the programming
mode when
GVPP input is at 12.5V and E is at
TTL-low. The data to be programmed is applied 8
bits in parallel to the data output pins. The levels
required for the address and data inputs are TTL.
The M27512 can use P RESTO Program ming Algorithm that drastically reduces the programming
time (typically less than 50 seconds). Nevertheless
to achieve compatibility with all programming
equipment, the standard Fast Programming Algorithm may also be used.
Fast Programmi ng Al gor ithm
Fast Programming Algorithm rapidly programs
M27512 EPROMs using an efficient and reliable
method suited to the production programming environment. Programming reliability is also ensured
as the incremental program margin of each byte is
continually monitored to determine when it has
been successfully programmed. A flowchart of the
M27512 Fast Programming Algorithm is shown in
Figure 8.
Table 3. Operating Modes
Mode E GV
Read V
Output Disable V
Program V
Verify V
Program Inhibit V
Standby V
Electronic Signature V
Note: X = VIH or VIL, VID = 12V ± 0.5%.
IL
IL
Pulse V
IL
IH
IH
IH
IL
PP
V
IL
V
IH
PP
V
IL
V
PP
X X Hi-Z
V
IL
A9 Q0 - Q7
X Data Out
X Hi-Z
X Data In
X Data Out
X Hi-Z
V
ID
T ab le 4. Electron ic Sig natu r e
Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturer’s Code V
Device Code V
IL
IH
00100000 20h
00001101 0Dh
Codes
3/11
Page 4
M27512
AC MEASUREMENT CONDITIONS
Input Rise and Fall Times ≤ 20ns
Figure 4. AC T esti ng Load Circui t
1.3V
Input Pulse Voltages 0.45V to 2.4V
Input and Output Timing Ref. Voltages 0.8V to 2.0V
1N914
Note that Output Hi-Z is defined as the point where data
is no longer driven.
Figure 3. AC Test ing Input Outp ut W avefo rm s
3.3kΩ
DEVICE
UNDER
2.4V
0.45V
T ab le 5. Capacitance
(1)
(TA = 25 °C, f = 1 MHz )
2.0V
0.8V
AI00827
Symbol Parameter Test Condition Min Max Unit
C
IN
C
OUT
Note: 1. Sampled only, not 100% tested.
Input Capacitance VIN = 0V 6 pF
Output Capacitance V
OUT
TEST
CL = 100pF
CL includes JIG capacitance
= 0V 12 pF
OUT
AI00828
Figure 5. Read Mode AC W aveforms
A0-A15
tAVQV
E
G
tELQV
Q0-Q7
4/11
tGLQV
VALID
tAXQX
tEHQZ
tGHQZ
Hi-Z
DATA OUT
AI00735
Page 5
M27512
T ab le 6. Read Mode DC Characteristics
(1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Symbol Parameter Test Condition Min Max Unit
I
LI
I
LO
I
CC
I
CC1
V
V
V
OL
V
OH
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
T ab le 7. Read Mode AC Charact eristics
Input Leakage Current 0 ≤ VIN ≤ V
Output Leakage Current V
OUT
= V
CC
CC
Supply Current E = VIL, G = VIL 125 mA
Supply Current (Standby) E = V
Input Low Voltage –0.1 0.8 V
IL
Input High Voltage 2 VCC + 1 V
IH
IH
Output Low Voltage IOL = 2.1mA 0.45 V
Output High Voltage IOH = –400µA 2.4 V
(1)
±10 µA
±10 µA
40 mA
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Symbol Alt Parameter
Test
Condition
-2, -20 blank, -2 5 -3
Min Max Min Max Min Max
t
AVQV
t
ELQV
t
GLQV
t
EHQZ
t
GHQZ
t
AXQX
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
t
Address Valid to Output Valid
ACC
t
Chip Enable Low to Output Valid G = V
CE
t
Output Enable Low to Output Valid E = V
OE
(2)
t
Chip Enable High to Output Hi-Z G = V
DF
(2)
t
Output Enable High to Output Hi-Z E = V
DF
Address Transition to Output
t
OH
Transition
E = VIL,
G = V
E = VIL,
G = V
IL
IL
IL
IL
IL
IL
0 55 0 60 0 105 ns
0 55 0 60 0 105 ns
000 ns
M27512
200 250 300 ns
200 250 300 ns
75 100 120 ns
Unit
T ab le 8. Programming Mode DC Charact erist ics
(1)
(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)
Symbol Parameter Test Condition Min Max Unit
I
LI
I
CC
I
PP
V
IL
V
IH
V
OL
V
OH
V
ID
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
Input Leakage Current VIL ≤ VIN ≤ V
IH
±10 µA
Supply Current 150 mA
Program Current E = V
IL
50 mA
Input Low Voltage –0.1 0.8 V
Input High Voltage 2 VCC + 1 V
Output Low Voltage IOL = 2.1mA 0.45 V
Output High Voltage IOH = –400µA 2.4 V
A9 Voltage 11.5 12.5 V
5/11
Page 6
M27512
Tab le 9. MARGIN MODE AC Ch aracteri stics
(1)
(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)
Symbol Alt Parameter Test Condition Min Max Unit
t
A9HVPH
t
VPHEL
t
A10HEH
t
A10LEH
t
EXA10X
t
EXVPX
t
VPXA9X
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
t
t
VPS
t
AS10
t
AS10
t
AH10
t
VPH
t
T ab le 10. Programming Mode AC Charact eristi cs
VA9 High to VPP High 2 µs
AS9
VPP High to Chip Enable Low 2 µs
VA10 High to Chip Enable
High (Set)
VA10 Low to Chip Enable High
(Reset)
Chip Enable Transition to
VA10 Transition
Chip Enable Transition to V
Transition
VPP Transition to VA9
AH9
Transition
PP
(1)
1 µs
1 µs
1 µs
2 µs
2 µs
(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)
Symbol Alt Parameter Test Condition Min Max Unit
t
AVEL
t
QVEL
t
VCHEL
t
VPHEL
t
VPLVPH
t
ELEH
t
ELEH
t
EHQX
t
EHVPX
t
VPLEL
t
ELQV
(4)
t
EHQZ
t
EHAX
Notes. 1. VCC must be applied simultaneously with or bef o re VPP and removed simultaneously or after VPP.
2. The Initial Program Pulse width tolerance is 1 ms ± 5%.
3. The length of the Over-program Pulse varies from 2.85 ms to 78.95 ms, depending on the multiplication value of the iteration counter.
4. Sampled only , n ot 100% tested.
t
t
t
VCS
t
OES
t
PRT
t
t
OPW
t
t
OEH
t
t
t
t
Address Valid to Chip Enable
AS
Low
Input Valid to Chip Enable Low 2 µs
DS
2 µs
VCC High to Chip Enable Low 2 µs
VPP High to Chip Enable Low 2 µs
VPP Rise Time 50 ns
Chip Enable Program Pulse
PW
Width (Initial)
Chip Enable Program Pulse
Width (Overprogram)
Chip Enable High to Input
DH
Transition
Chip Enable High to V
PP
Transition
VPP Low to Chip Enable Low 2 µs
VR
Chip Enable Low to Output
DV
Valid
Chip Enable High to Output Hi-
DF
Z
Chip Enable High to Address
AH
Transition
Note 2 0.95 1.05 ms
Note 3 2.85 78.75 ms
2 µs
2 µs
0 130 ns
0ns
1 µs
6/11
Page 7
Figure 6. MARGIN MODE AC W avefo r m
V
CC
A8
A9
tA9HVPH tVPXA9X
GV
PP
E
A10 Set
A10 Reset
tVPHEL
tA10HEH
tA10LEH
M27512
tEXVPX
tEXA10X
AI00736B
Note: A8 High level = 5V; A9 High level = 12V.
Figure 7. Programming and Verify Modes AC W avefo rm s
A0-A15
Q0-Q7
V
CC
GV
PP
E
tAVEL
DATA IN
tQVEL
tVCHEL
tVPHEL
tELEH
PROGRAM
VALID
tEHQX
tEHVPX
tVPLEL
tEHAX
DATA OUT
tEHQZ
tELQV
VERIFY
AI00737
7/11
Page 8
M27512
Figure 8. Fast Programming Flowchart
VCC = 6V, VPP = 12.5V
n = 1
E = 1ms Pulse
NO
NO
VERIFY
YES
E = 3ms Pulse by n
Last
NO
Addr
YES
CHECK ALL BYTES
VCC = 5V, VPP = 5V
++ Addr
AI00774B
YES
++n
> 25
FAIL
Figure 9. PRESTO Programming Flowchart
VCC = 6.25V, VPP = 12.75V
SET MARGIN MODE
n = 0
E = 500µs Pulse
NO
NO
VERIFY
YES
Last
NO
Addr
YES
RESET MARGIN MODE
CHECK ALL BYTES
VCC = 5V, VPP = 5V
++ Addr
AI00773B
YES
++n
= 25
FAIL
DEVICE OPERATION (cont’d)
The Fast Programming A lgorithm utilizes two diff er-
ent pulse types : initial and overprogram. The duration of the initial
E pulse(s) is 1ms, which will then
be followed by a longer overprogram pulse of length
3ms by n (n is an iteration counter and is equal to
the number of the initial one millisecond pulses
applied to a particular M27512 location), before a
correct verify occurs. Up to 25 one-millisecond
pulses per byte are provided for before the over
program pulse is applied.
The entire sequence of program pulses is performed at V
cations at V
= 6V and GVPP = 12.5V (byte verifi-
CC
= 6V and GVPP = VIL). When the Fast
CC
Programming cycle has been completed, all bytes
should be compared to the original data with
= 5V.
V
CC
PRESTO Programming Algorithm
PRESTO Programming Algorithm allows to program the whole array with a guaranted margin, in
a typical time of less than 50 seconds (to be compared with 283 seconds for the Fast algorithm).
This can be achieved with the SGS-THOMSON
M27512 due to several design innovations described in the next paragraph that improves programming efficiency and brings adequate margin
for reliability. Before starting the programming the
internal MARGIN MODE circuit is set in order to
guarantee that each cell is programmed with
enough margin.
Then a sequence of 500µs program pulses are
applied to each byte until a correct verify occurs.
No overprogram pulses are applied since the verify
in MARGIN MODE provides t he necess ary margin
to each programmed cell.
Program Inhibit
Programming of multiple M27512s in parallel with
different data is also easily accomplished. Except
E, all like inputs (including GVPP) of the parallel
for
M27512 may be common. A TTL low level pulse
applied to a M27512’s
will program that M27512. A high level
E input, with GVpp at 12.5V,
E input
inhibits the other M27512s from being programmed.
Program Verify
A verify (read) should be performed on the programmed bits to determine that they were cor rectly
programmed. The verify is accomplished with
GV
pp
and E at VIL. Data should be verified tDV after the
falling edge of
E.
8/11
Page 9
M27512
Electronic Signature
The Electronic Signature mode allows the reading
out of a binary code from an EPROM that will
identify its manufacturer and type. This mode is
intended for use by programming equipment to
automatically matc h the devic e to be programm ed
with its corresponding programming algorithm.
This mode is functional i n the 25 °C ± 5 °C ambient
temperature ran ge that is required wh en programming the M27512. To activate this mode, the programming equipment must force 1 1.5V t o 12.5V o n
address line A9 of the M27512. T wo identifier bytes
may then be sequenced from the device out puts by
toggling address line A0 from V
address lines m ust be held at V
to VIH. All other
IL
during Electronic
IL
Signature mode, except for A14 and A15 which
should be high. Byte 0 (A0 = V
manufacturer code and byte 1 (A0 = V
) represents the
IL
) the device
IH
identifier code.
ERASURE OPE RA T ION (applies to UV EP ROM)
The erasure characteristic of the M27512 is such
that erasure begins when the cells are exposed to
light with wavelengths shorter than approximately
4000 Å. It should be noted that sunlight and some
type of fluorescent lamps have wavelengt hs in th e
3000-4000 Å range. Research shows that constant
exposure to room level fluorescent lighting could
erase a typical M27512 in about 3 years, while it
would take approximately 1 week to cause erasure
when expose to direct sunlight . If the M27512 is to
be exposed to these types of lighting conditions for
extended periods of time, it is suggested that
opaque labels be put over the M27512 window to
prevent unintentional erasure. The recommended
erasure procedure for the M27512 is exposure to
short wave ultraviolet light which has wavelength
2537 Å.
The integrated dose (i.e. UV intensity x exposure
time) for erasure should be a minimum of 15
W-sec/cm
approximately 15 to 20 minutes us ing an ultraviolet
lamp with 12000 µW/cm
2
. The erasure time with this dosage is
2
power rating. The
M27512 should be placed within 2.5 cm (1 inch) of
the lamp tubes during the erasure. Some lamps
have a filter on their tubes which should be removed before erasure.
ORDERI NG INFO RM ATION SCHEME
Example: M27512 -2 F 1
Speed and VCC Tolerance
-2 200 ns, 5V ±5%
blank 250 ns, 5V ±5%
-3 300 ns, 5V ±5%
-20 200 ns, 5V ±10%
-25 250 ns, 5V ±10%
For a list of available options (Speed, V
T olerance, Package, etc) refer to the current Memory Shortform
CC
Package
F FDIP28W
Temperature Range
1 0 to 70 °C
6 –40 to 85 °C
catalogue.
For further information o n any aspect of this device, please contact SGS-THOM SON Sales O ffice nearest
to you.
9/11
Page 10
M27512
FDIP28W - 28 pin Ceramic Frit-seal DIP, with window
Symb
Typ Min Max Typ Min Max
A 5.71 0.225
A1 0.50 1.78 0.020 0.070
A2 3.90 5.08 0.154 0.200
B 0.40 0.55 0.016 0.022
B1 1.17 1.42 0.046 0.056
C 0.22 0.31 0.009 0.012
D 38.10 1.500
E 15.40 15.80 0.606 0.622
E1 13.05 13.36 0.514 0.526
e1 2.54 – – 0.100 – –
e3 33.02 – – 1.300 – –
eA 16.17 18.32 0.637 0.721
L 3.18 4.10 0.125 0.161
S 1.52 2.49 0.060 0.098
∅ 7.11 – – 0.280 – –
α 4° 15° 4° 15°
N28 28
FDIP28W
mm inches
Drawing is not to scale
10/11
B1 B e1
e3
D
S
N
∅
1
A2
A1AL
Cα
eA
E1 E
FDIPW-a
Page 11
M27512
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specificat ions mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectronics.
© 1995 SGS-THOMSON Microelectronics - All Rights Reserved
Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
SGS-THOMSON Microelectronics GROUP OF COMPANIES
11/11
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