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LX1670
1670
THE INFINITE POWER OF INNOVATION
DESCRIPTION KEY FEATURES
The LX1670 is a complete precision
reference and voltage monitor circuit
for the Intel Pentium
®
Pro Processor
and other high-end microprocessor
supplies. It is designed for use in
conjunction with the LX1660/1661 PWM
controller. The LX1670 reads a 5-bit
voltage identification (VID) code from
the microprocessor and sets the output
voltage reference to be used by the
LX1660/61 controller. Together, they
convert +5 or 12V input power to an
adjustable output ranging from 1.8VDC
to 3.5VDC in 100mV steps (50mV steps
below 2.1V) with 1% DC system
accuracy.
PRODUCT HIGHLIGHT
TYPICAL APPLICATION OF THE LX1670
V
CC
5-BIT P
ROGRAMMABLE VOLTAGE REFERENCE
P RODUCTION DAT A SHEET
p 1% TOTAL OUTPUT ERROR
p POWER GOOD, UV, 0V COMPARATORS
p 0V COMPARATOR HAS SCR DRIVE
p UNDER-VOLTAGE LOCKOUT CAPABILITY
p 5-BIT INPUT FOR ADVANCED PENTIUM PRO
PROCESSOR APPLICATIONS (5TH BIT IS FOR
AUTOMATIC GAIN AND OFFSET SCALING)
p IMPLEMENTS 1% DC ACCURATE CONTROL
SYSTEM
p 14-PIN NARROW BODY SOIC PACKAGE
APPLICATIONS
■ PENTIUM II & PENTIUM PRO VOLTAGE
REGULATOR MODULES
■ PROGRAMMABLE POWER SUPPLIES
■ VOLTAGE REFERENCE
■ ADVANCED MICROPROCESSOR SUPPLIES
5-Bit
Digital
Input
Word
BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
Enable
Blank Enable
D0
D1
D2
D3
D4
ENABLE
BLKEN
GND
V
CC
To PWM
Error Amplifier
SCR Drive
Power Good
LX1670
V
SENSE
VIDO
OV
P
GOOD
OUT
System Output
Volta
e
PACKAGE ORDER INFO
T
(°C)
A
Plastic SOIC
D
14-pin
0 to 70 LX1670CD
Note: All surface-mount packages are available in Tape & Reel.
Append the letter "T" to part number. (i.e. LX1670CDT)
Copyright © 1997
Rev. 1.0 7/97
FOR FURTHER INFORMATION CALL (714) 898-8121
11861 WESTERN AVENUE, GARDEN GROVE, CA. 92841
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LX1670
PRODUCT DATABOOK 1996/1997
5-BIT P
ROGRAMMABLE VOLTAGE REFERENCE
RODUCTION DATA SHEET
P
ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply Voltage (VCC) .................................................................................... -0.3V to +15V
P
, D0-D3, D4, ENABLE, BLKEN ....................................................... -0.3V to VCC+0.3
GOOD
VIDO, OV
OV
OUT
VIDO........................................................................................................................... -5mA
, V
OUT
........................................................................................................................ -35mA
....................................................................................... -0.3V to +5V
SENSE
Operating Junction Temperature
Plastic (D Package) ............................................................................................... 150°C
Storage Temperature Range .................................................................... -65°C to +150°C
Lead Temperature (Soldering, 10 Seconds) ............................................................. 300°C
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with respect
to Ground. Currents are positive into, negative out of the specified terminal. Pin
numbers refer to DIL packages only.
THERMAL DATA
D PACKAGE:
D
x θ
θθ
θ
θθ
JA
).
JA
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
Junction Temperature Calculation: T
The θ
numbers are guidelines for the thermal performance of the device/pc-board system.
JA
All of the above assume no ambient airflow
= TA + (P
J
120°C/W
PACKAGE PIN OUTS
VIDO
V
SENSE
P
GOOD
OV
ENABLE
BLKEN
GND
OUT
D PACKAGE
(Top View)
1 14
213
312
411
510
69
78
V
D4B
D4
D3
D2
D1
D0
CC
2
Copyright © 1997
Rev. 1.0 7/97
Page 3
PRODUCT DATABOOK 1996/1997
LX1670
5-BIT P
ROGRAMMABLE VOLTAGE REFERENCE
P RODUCTION DATA SHEET
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, these specifications apply over the operating ambient temperatures for LX1670C with 0°C ≤ TA ≤ 70°C ;
10.8V < V
positive. Current maximums are currents with the highest possible value.)
Power Supply Current and Power Section
Positive 12V Supply Current I
Digital-to-Analog Converter Section
Voltage Set Point Accuracy VSPA D0-D3 = X, D4 = Open, 2.00 ≤ VIDO ≤ 3.50V
LSB VSTP D4 = Open
Coding Binary, D0 = LSB, D3 = MSB
Under-Voltage Lockout Section
Power-up Reset V
Threshold UVLOT VCC = 5V, Supply ramping down
Hysteresis UVLOH V
Under/Over-Voltage Comparator Section
Percent of VIDO Threshold UOVTH
P
GOOD
Over-Voltage Protection Comparator Section
Percent of VIDO Threshold OVPTH
OVP Sourcing Current IOVP OVP = 3.0V
OVP Output Low VLOVP IOVP = 100µA
TTL Inputs Section
Input Low Voltage V
Input High Voltage V
Input Low Current I
Input High Current I
Open Drain Inputs Section
Input Low Current I
Input High Voltage V
< 13.2V, D0-D3 = Open, D4 = Open, ENABLE = 1, BLKEN = 1. Nominal conditions: VCC = 12.0V, T = 25°C. Currents flowing into chip are
CC
Parameter
Symbol
All outputs, inputs unloaded
CC
(Includes DAC, I-V Converter and output scaling amplifier. R
Test Conditions
LOAD
> 1k, C
< 100pF)
LOAD
LX1670
Min. Typ. Max.
5mA
-1.0 1.0 %
D0-D3 = X, D4 = GND, 1.80 ≤ VIDO ≤ 2.05V
-1.5 1.5 %
100 m V
D4 = GND
RESIGOOD
= 5mA
50 mV
4.27 4.37 4.47 V
= 5V, Supply ramping up
CC
50 mV
±5.5 ±7 ±8.5 %
Low Voltage VLG I
GOOD
= 5mA
0.2 0.4 V
10 15 20 %
-20 mA
(D0-D3, D4)
IL
IH
IL
IH
IL
IH
VIL = 0.8V
VIH = 2.0V
Pin Ground
Pin Open
2.0 V
-10 µA
0µA
-37.5 µA
2.0 V
Units
1.0 V
100 m V
0.8 V
Copyright © 1997
Rev. 1.0 7/97
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LX1670
PRODUCT DATABOOK 1996/1997
5-BIT P
ROGRAMMABLE VOLTAGE REFERENCE
RODUCTION DATA SHEET
P
FUNCTION TABLES
Table 1 - Input vs. Output Functions
V
CC
VCC < 1.0 X X X X Undefined Undefined Undefined
1.0 < VCC < UVLOT X X X X LOW LOW LOW
VCC > UVLOT X 0 X X LOW LOW LOW
VCC > UVLOT VIDO Table 1 0 VS < 0.93V
VCC > UVLOT VIDO Table 1 0
VCC > UVLOT VIDO Table 1 0
VCC > UVLOT VIDO Table 1 0 VS > 1.15V
VCC > UVLOT VIDO Table 1 1 VS < 0.93V
VCC > UVLOT VIDO Table 1 1
VCC > UVLOT VIDO Table 1 1
VCC > UVLOT VIDO Table 1 1 VS > 1.15V
D4-D0 ENABLE BLKEN V
0.93VO < VS < 1.07VOVIDO Table 3 HIGH LOW
1.07VO < VS < 1.15VOVIDO Table 3 LOW LOW
0.93VO < VS < 1.07VOVIDO Table 2 HIGH LOW
1.07VO < VS < 1.15VOVIDO Table 2 LOW LOW
(VS) VIDO (VO)P
SENSE
O
O
O
O
VIDO Table 3 LOW LOW
VIDO Table 3 LOW HIGH
VIDO Table 2 LOW LOW
VIDO Table 2 LOW HIGH
GOOD
OV
Table 2 - VIDO Output (BLKEN pulled high or left open)
D4 D3 D2 D1 D0 VIDO
01111 0
01110 0
01101 0
01100 0
01011 0
01010 0
01001 0
01000 0
00111 0
00110 0
00101 1.800
00100 1.850
00011 1.900
00010 1.950
00001 2.000
00000 2.050
D4 D3 D2 D1 D0 VIDO
11111 2.00
11110 2.10
11101 2.20
11100 2.30
11011 2.40
11010 2.50
11001 2.60
11000 2.70
10111 2.80
10110 2.90
10101 3.00
10100 3.10
10011 3.20
10010 3.30
10001 3.40
10000 3.50
Table 3 - VIDO Output (BLKEN pulled low)
D4 D3 D2 D1 D0 VIDO
01111 1.300
01110 1.350
01101 1.400
01100 1.450
01011 1.500
01010 1.550
01001 1.600
01000 1.650
00111 1.700
00110 1.750
00101 1.800
00100 1.850
00011 1.900
00010 1.950
00001 2.000
00000 2.050
D4 D3 D2 D1 D0 VIDO
11111 2.00
11110 2.10
11101 2.20
11100 2.30
11011 2.40
11010 2.50
11001 2.60
11000 2.70
10111 2.80
10110 2.90
10101 3.00
10100 3.10
10011 3.20
10010 3.30
10001 3.40
10000 3.50
Table 4 - Mode Control
D4 ENABLE BLKEN Mode State
X 0 X Disable VIDO is pulled low through 10k
OUT
0 1 0 Low VIDO is scaled. Output 1.3V to 2.05V
1 1 0 Normal Normal Output 2.0 to 3.5V
0 1 1 Low VIDO is scaled. Output 1.8V to 2.05V
1 1 1 Normal Normal output 2.0 to 3.5V
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Copyright © 1997
Rev. 1.0 7/97
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PRODUCT DATABOOK 1996/1997
LX1670
BLKEN
D4B
D0
D1
D2
D3
D4
5-BIT P
ROGRAMMABLE VOLTAGE REFERENCE
P RODUCTION DATA SHEET
BLOCK DIAGRAM
6
BLOCK
8
9
10
11
13
12
< 1.8V
DAC
10
S
2X1
MUX
OUT
2V REF
0.87 * VS
0.935 * VS
V
CC
4.67/4.47V
10.6/10.1V
14
5
4
3
V
CC
ENABLE
OV
OUT
P
GOOD
7
GND
1
VIDO
Pin Name Pin # Description
VIDO 1
V
P
GOOD
OV
SENSE
OUT
2
3
4
ENABLE 5
BLKEN
6
GND 7
D0 8
D1 9
D2 10
D3 11
D4 12
D4B 13
V
CC
14
Output reference voltage used by PWM controller to set system voltage.
Connected directly to system output voltage.
Open collector output pulls low when the processor's supply is not good.
SCR Driver goes high when processor supply is over voltage.
TTL compatible chip enable. Internally pulled high.
Enables or disables blocking of codes with voltage blow 1.8V for CPU protection. Internally pulled high.
Analog ground return.
LSB DAC logic control. Internally pulled high.
2nd LSB DAC logic control. Internally pulled high.
3rd LSB DAC logic control. Internally pulled high.
MSB DAC logic control. Internally pulled high.
Scales VIDO output when low. Internally pulled high.
Inverting output of D4.
Analog power supply.
0.93 * VE
VE
FUNCTIONAL PIN DESCRIPTIONFUNCTIONAL PIN DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
FUNCTIONAL PIN DESCRIPTIONFUNCTIONAL PIN DESCRIPTION
VS
2
V
SENSE
Copyright © 1997
Rev. 1.0 7/97
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LX1670
PRODUCT DATABOOK 1996/1997
5-BIT P
ROGRAMMABLE VOLTAGE REFERENCE
RODUCTION DATA SHEET
P
THEORY OF OPERATION
UNDER-VOLTAGE LOCKOUT
This function keeps order to the IC until the power supply voltage
reaches 85% of its nominal value. The output voltage is pulled low
and P
voltage crosses 85%, the output voltage, VIDO, is released, and
P
GOOD
microprocessor's power supply) is within ±7% of VIDO, P
released. The comparator has hysteresis to prevent transient
GOOD
and OV
are pulled low. Once the power supply
OUT
continues to be pulled low. When V
SENSE
(the
GOOD
is
oscillation.
4-BIT DAC and 5th-BIT SCALER
This function generates a precise voltage from a binary, 5-bit
digital word VID [0:4]. It uses a 4-bit, binary weighted current
DAC, driving a precise current to voltage converter. This voltage
is then op-amp buffered and sent out. The scaling is accomplished
by multiplexing the buffer op-amp. The resulting transfer function
is:
VIDO (D0,D1,D2,D3) =
(2.00 + 0.1*(1*D0 + 2*D1 + 4*D2 + 8*D3)) for D4 = 1
OVER- / UNDER-VOLTAGE COMPARATORS
This function generates an open collector Power Good signal
when V
is within ±7% of VIDO.
SENSE
OVER-VOLTAGE PROTECTION
This function generates an OV
higher than VIDO. This voltage can be used to drive an external
voltage signal when V
OUT
SENSE
is 15%
SCR.
CHIP ENABLE
This function disables the chip when low. VIDO, P
GOOD
and OV
OUT
are all pulled low. When ENABLE is high, the chip's state is then
determined by the other functions.
BLANK ENABLE
This function will disable VIDO for codes with voltages below
1.80V when this pin is high. When pulled low, this function will
allow VIDO to accept codes for voltages of 1.30 to 3.50V.
VIDO (D0,D1,D2,D3) =
(2.00 + 0.6 + 0.1*(1*D0 + 2*D1 + 4*D2 + 8*D3)) * 0.5
for D4 = 0
for the code VIDO < 1.8V will be blocked and VIDO = 0.
The zero-scale output voltage, full-scale output voltage and the
scale factor are all trimmed on-chip using fusable links.
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Copyright © 1997
Rev. 1.0 7/97
Page 7
PRODUCT DATABOOK 1996/1997
LX1670
PWRGD
OUTEN
1
2
3
4
5
6
7
0.1µF
VIDO
V
SENSE
P
GOOD
OV
OUT
ENABLE
BLKEN
GND
C10
LX1670
D4B
5-BIT P
ROGRAMMABLE VOLTAGE REFERENCE
P RODUCTION DATA SHEET
APPLICATION INFORMATION
See Note 1
1500µF
6.3V
R1
5m
Ω
JP1
12V
IN
JP2
5V
IN
C2
C11
1500µF
6.3V
C13C12C5
6.3V
6.3V
1500µF
6.3V
1500µF
1500µF
Q3
2N6504
D1
1N4148
D2
1N4148
See Note 1
R4
1K
C4
390µF
0.1µF
R3
1K
C8
C7
680pF
VID4
VID3
VID2
VID1
VID0
10K
R2
0.1µF
C3
14
V
CC
13
12
D4
11
D3
10
D2
9
D1
8
D0
1
EN
2
OT
3
SGND
4
V
5
INV
6
NINV/SS
7
HICCUP
8
C
VREF
T
VRM
CONTROLLER
ADJ
LX1661
TDRV
PGND
BDRV
SYNCEN
CS+
JP4
JP3
C9
1µF
16
V
C1
R7 10
15
14
13
12
R8 10
V
CC
11
10
9
CS-
C1
390pF
C20
0.1µF
R13
10
Q1
IRL3103
C19
0.1µF
Q2
IRL3103
R5
1K
R6
1K
F1
16A 32V
See Note 1
L1
TOROID
5µH
Note 1. Setup shown is for 5V application. For 12V input change the following: - Close JP1 and JP4
- Open JP2 and JP3
- For C2 and C11, use 16V/850µF capacitors instead
- Inductor L1 = 10µH
FIGURE 1 — LX1660/61 CONTROLLER USED WITH THE LX1670 PROGRAMMABLE REFERENCE/DAC CHIP FOR PENTIUM PRO PROCESSOR
OR PENTIUM II PROCESSOR APPLICATIONS. GUARANTEED TO MEET INTEL SPECIFICATIONS.
SUPPLY OUTPUT CLAMP
Copyright © 1997
Rev. 1.0 7/97
PRODUCTION DATA - Information contained in this document is proprietary to Linfinity, and is current as of publication date. This document
Pentium is a registered trademark of Intel Corporation.
may not be modified in any way without the express written consent of Linfinity. Product processing does not necessarily include testing of
all parameters. Linfinity reserves the right to change the configuration and performance of the product and to discontinue product at any time.
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