Split SDA for Opto-isolation (LTC4151-1/LTC4151-2)
n
Available in 10-Lead MSOP, 10-Lead 3mm × 3mm
DFN and 16-Lead SO Packages
APPLICATIONS
n
Telecom Infrastructure
n
Automotive
n
Industrial
n
Consumer
DESCRIPTION
The LTC®4151 is a high side power monitor that operates
over a wide voltage range of 7V to 80V. In default operation
mode, the onboard 12-bit ADC continuously measures
high side current, input voltage and an external voltage.
Data is reported through the I
by a host. The LTC4151 can also perform on-demand
measurement in a snapshot mode. The LTC4151 features
a dedicated shutdown pin to reduce power consumption.
The LTC4151-1/LTC4151-2 feature split I
drive opto-isolators. The data out on the LTC4151-1 is
inverted while that on the LTC4151-2 is not.
PARTPACKAGEFEATURED PIN
LTC4151DD10, MS10SHDN
LTC4151-1DD10, MS10SDAO
LTC4151-2S16SDAO
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
2
C interface when polled
2
C data pins to
TYPICAL APPLICATION
High Side Power Sensing with Onboard ADC and I2C
V
IN
ADR1
ADR0
SENSE
0.02Ω
+
LTC4151
GND
SENSE
–
SHDN
SCL
SDA
ADIN
V
OUT
V
7V to 80V
IN
MEASURED
VOLTAGE
2k2k
μCONTROLLER
SCL
SDA
3.3V
V
4151 TA01
12-Bit ADC DNL and INL
1.0
0.5
0
ADC DNL (LSB)
DD
–0.5
–1.0
0
1.0
0.5
0
ADC INL (LSB)
–0.5
–1.0
0
1024
1024
2048
CODE
2048
CODE
3072
3072
4096
4151 TA01b
4096
4151 TA01c
4151fb
1
Page 2
LTC4151
ABSOLUTE MAXIMUM RATINGS
VIN Voltage ................................................. –0.3V to 90V
SENSE
ADR1, ADR0 Voltages .............................. –0.3V to 90V
ADIN, SHDN, SDAO, SDAO Voltages ........... –0.3V to 6V
SCL, SDA, SDAI Voltages (Note 2) ........... –0.3V to 5.5V
SCL, SDA, SDAI Clamp Current .............................. 5mA
+
, SENSE– Voltages .......................... VIN – 10V or
–0.3V to V
IN
(Notes 1, 3)
+ 0.3V
Operating Temperature Range
LTC4151C/LTC4151C-1/LTC4151C-2 ........ 0°C to 70°C
LTC4151I/LTC4151I-1/LTC4151I-2 .......–40°C to 85°C
Storage Temperature Range
MSOP, SO ........................................... –65°C to 150°C
DFN .................................................... – 65°C to 125°C
Lead Temperature (Soldering, 10 sec)
MSOP, SO .......................................................... 300°C
PIN CONFIGURATION
LTC4151LT4151
SENSE
V
IN
ADR1
ADR0
ADIN
10-LEAD (3mm s 3mm) PLASTIC DFN
EXPOSED PAD (PIN 11) PCB GND CONNECTION OPTIONAL
LTC4151-1LTC4151-1
TOP VIEW
+
1
2
3
4
5
DD PACKAGE
T
= 125°C, θJA = 45°C/W
JMAX
TOP VIEW
9
8
7
6
SENSE
GND
SHDN
SDA
SCL
–
10
11
+
SENSE
1
V
2
IN
ADR1
3
ADR0
4
ADIN
5
10-LEAD PLASTIC MSOP
T
JMAX
TOP VIEW
10
9
8
7
6
MS PACKAGE
= 125°C, θJA = 85°C/W
SENSE
GND
SHDN
SDA
SCL
–
LTC4151-2
9
8
7
6
SENSE
GND
SDAO
SDAI
SCL
–
SENSE
+
SENSE
1
V
2
IN
ADR1
ADR0
ADIN
10-LEAD (3mm s 3mm) PLASTIC DFN
T
EXPOSED PAD (PIN 11) PCB GND CONNECTION OPTIONAL
JMAX
11
3
4
5
DD PACKAGE
= 125°C, θJA = 45°C/W
10
+
1
2
V
IN
3
NC
4
NC
5
ADR1
6
NC
7
ADR0
8
NC
16-LEAD PLASTIC SO
T
JMAX
TOP VIEW
16
15
14
13
12
11
10
9
S PACKAGE
= 150°C, θJA = 100°C/W
SENSE
NC
NC
GND
SDAO
SDAI
SCL
ADIN
TOP VIEW
+
SENSE
1
V
2
IN
ADR1
3
ADR0
4
ADIN
5
MS PACKAGE
10-LEAD PLASTIC MSOP
T
= 125°C, θJA = 85°C/W
JMAX
–
10
9
8
7
6
SENSE
GND
SDAO
SDAI
SCL
–
2
4151fb
Page 3
LTC4151
ORDER INFORMATION
LEAD FREE FINISHTAPE AND REELPART MARKING*PACKAGE DESCRIPTIONTEMPERATURE RANGE
LTC4151CDD#PBFLTC4151CDD#TRPBFLCWZ10-Lead (3mm x 3mm) Plastic DFN0°C to 70°C
LTC4151IDD#PBFLTC4151IDD#TRPBFLCWZ10-Lead (3mm x 3mm) Plastic DFN–40°C to 85°C
LTC4151CDD-1#PBFLTC4151CDD-1#TRPBFLCXC10-Lead (3mm x 3mm) Plastic DFN0°C to 70°C
LTC4151IDD-1#PBFLTC4151IDD-1#TRPBFLCXC10-Lead (3mm x 3mm) Plastic DFN–40°C to 85°C
LTC4151CMS#PBFLTC4151CMS#TRPBFLTCWY10-Lead Plastic MSOP0°C to 70°C
LTC4151IMS#PBFLTC4151IMS#TRPBFLTCWY10-Lead Plastic MSOP–40°C to 85°C
LTC4151CMS-1#PBFLTC4151CMS-1#TRPBFLTCXB10-Lead Plastic MSOP0°C to 70°C
LTC4151IMS-1#PBFLTC4151IMS-1#TRPBFLTCXB10-Lead Plastic MSOP–40°C to 85°C
LTC4151CS-2#PBFLTC4151CS-2#TRPBFLTC4151S-216-Lead Plastic SO0°C to 70°C
LTC4151IS-2#PBFLTC4151IS-2#TRPBFLTC4151S-216-Lead Plastic SO–40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based fi nish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
The l denotes the specifi cations which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifi cations are at TA = 25°C. VIN is from 7V to 80V, unless noted. (Note 3)
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
σ
T
f
CONV
t
CONV
R
ADIN
I
ADIN
2
C Interface
I
V
ADR(H)
V
ADR(L)
I
ADR(IN)
V
SDA(OL)
I
SDA,SCL(IN)
V
SDA,SCL(TH)
V
SDA,SCL(CL)
2
C Interface Timing (Note 4)
I
f
SCL(MAX)
t
LOW
t
HIGH
t
BUF(MIN)
t
HD,STA(MIN)
t
SU,STA(MIN)
t
SU,STO(MIN)
t
HD,DATI(MIN)
t
HD,DATO(MIN)
t
SU,DAT(MIN)
t
SP(MAX)
t
RST
C
X
Transition Noise(SENSE+ – SENSE–)
Conversion Rate (Continuous Mode)
Conversion Time (Snapshot Mode)(SENSE+ – SENSE–)
ADIN Pin Input ResistanceADIN = 3V
ADIN Pin Input CurrentADIN = 3V
ADR0, ADR1 Input High Threshold
ADRO, ADRI Input Low Threshold
ADRO, ADRI Input CurrentADR0, ADR1 = 0V or 3V
SDA, SDAO, SDAO Output Low VoltageI
SDA, SDAI, SDAO, SDAO, SCL Input
Current
SDA, SDAI, SCL Input Threshold
SDA, SDAI, SCL Clamp VoltageI
Maximum SCL Clock Frequency400kHz
Minimum SCL Low Period 0.651.3μs
Minimum SCL High Period50600ns
Minimum Bus Free Time Between Stop/
Start Condition
Minimum Hold Time After (Repeated) Start
Condition
Minimum Repeated Start Condition Set-Up
Time
Minimum Stop Condition Set-Up Time30600ns
Minimum Data Hold Time Input–1000ns
Minimum Data Hold Time Output300600900ns
Minimum Data Set-Up Time Input30100ns
Maximum Suppressed Spike
Pulse Width
Stuck-Bus Reset TimeSCL or SDA/SDAI Held Low2033ms
SCL, SDA Input Capacitance510 pF
= 25°C. VIN is from 7V to 80V, unless noted. (Note 3)
A
V
IN
ADIN
l
67.59Hz
l
53
ADIN, V
IN
ADR0, ADR1 = 0.8V or 2.2V
, I
, I
SDA
SDAO
SDAO
= 8mA
SDA, SDAI, SDAO, SDAO, SCL = 5V
, I
, I
SDA
SDAI
SCL
= 3mA
l
26
l
210
l
l
2.32.652.9V
l
0.30.60.9V
l
l
±8
l
l
l
1.61.82V
l
5.56.16.6V
50110250ns
1.2
0.3
22
67
33
85
42
μV
mV
μV
RMS
RMS
RMS
ms
ms
MΩ
±2μA
±70μA
μA
0.150.4V
0±2 μA
0.121.3μs
140600ns
30600ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Internal clamps limit the SCL, SDA (LTC4151) and SDAI
(LTC4151-1/LTC4151-2) pins to a minimum of 5.5V. Driving these pins to
voltages beyond the clamp may damage the part. The pins can be safely
tied to higher voltages through a resistor that limits the current below
5mA.
4
Note 3: All currents into pins are positive. All voltages are referenced to
GND, unless otherwise noted.
Note 4: Guaranteed by design and not subject to test.
Note 5: Integral nonlinearity and total unadjusted error of V
are tested
IN
between 7V and 80V.
Note 6: Offset error of V
is defi ned by extrapolating the straight line
IN
measured between 7V and 80V.
4151fb
Page 5
LTC4151
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Supply Voltage
(Normal Mode)
1.30
1.15
1.00
SUPPLY CURRENT (mA)
0.85
0.70
0
ADC Total Unadjusted Error
vs Code (ADIN Voltage)
0.10
– 40°C
25°C
85°C
20
40
SUPPLY VOLTAGE (V)
60
80
4151 G01
ADC DNL vs Code (ADIN Voltage)
1.0
400
300
200
SUPPLY CURRENT (μA)
100
0
= 12V, TA = 25°C, unless noted.
V
IN
Supply Current vs Supply Voltage
(Shutdown Mode)
– 40°C
25°C
85°C
0
20
40
SUPPLY VOLTAGE (V)
60
4151 G02
ADC INL vs Code (ADIN Voltage)
1.0
80
0.05
0
–0.05
ADC TOTAL UNADJUSTED ERROR (%)
–0.10
0
1024
2048
CODE
3072
4151 G03
4096
0.5
0
ADC DNL (LSB)
–0.5
–1.0
0
1024
2048
CODE
3072
4096
4151 G04
0.5
0
ADC INL (LSB)
–0.5
–1.0
0
1024
2048
CODE
ADC Total Unadjusted Error
vs Code (SENSE Voltage)ADC DNL vs Code (SENSE Voltage)ADC INL vs Code (SENSE Voltage)
1.0
0.5
0
–0.5
ADC TOTAL UNADJUSTED ERROR (%)
–1.0
0
1024
2048
CODE
3072
4151 G06
4096
2
1
0
ADC DNL (LSB)
–1
–2
0
1024
2048
CODE
3072
4096
4151 G07
2
1
0
ADC INL (LSB)
–1
–2
0
1024
2048
CODE
3072
3072
4096
4151 G05
4096
4151 G08
4151fb
5
Page 6
LTC4151
TYPICAL PERFORMANCE CHARACTERISTICS
SDA, SDAO, SDAO Output Low vs
Pull-Up Current (V
0.5
0.4
0.3
(V)
SDA(OL)
0.2
V
0.1
0
0
I
SDA
10
(mA)
5
SDA(OL)
vs I
15
SDA
85°C
25°C
– 40°C
4151 G09
)
20
6.3
6.2
(V)
6.1
SDA,SCL(CL)
V
6.0
5.9
0.010.1110
PIN FUNCTIONS
SENSE+: Kelvin Sense of the VIN Pin. See Figure 10 for
recommended Kelvin connection.
: Supply Voltage Input. Accepts 7V to 80V. The voltage
V
IN
at this pin is monitored by the onboard ADC with a full-
+
scale input range of 102.4V. SENSE
for proper ADC readout.
to V
IN
2
ADR1, ADR0: I
ADR1 and ADR0 to V
C Device Address Inputs. Connecting
, GND or leaving the pins open
IN
must be connected
confi gures one of nine possible addresses. See Table 1
in the Applications Information section for details.
ADIN: ADC Input. The onboard ADC measures voltage
range between 0V and 2.048V. Tie to GND if unused.
2
SCL: I
C Bus Clock Input. Data is shifted in and out at
the SDA pin on rising edges of SCL. This pin is driven
by an open-collector output from a master controller. An
external pull-up resistor or current source is required and
can be placed between SCL and V
. The voltage at SCL
IN
is internally clamped to 6V (5.5V minimum).
2
SDA (LTC4151 Only): I
C Bus Data Input/Output. Used for
shifting in address, command or data bits and sending
out data. An external pull-up resistor or current source
is required and can be placed between SDA and V
The voltage at SDA is internally clamped to 6V (5.5V
minimum).
SDAI (LTC4151-1/LTC4151-2 Only): I
Used for shifting in address, command or data bits. This
pin is driven by an open-collector output from a master
controller. An external pull-up resistor or current source is
required and can be placed between SDAI and V
age at SDAI is internally clamped to 6V (5.5V minimum).
SDAO (LTC4151-2 Only): Serial Bus Data Output. Opendrain output used for sending data back to the master
controller or acknowledging a write operation. Normally
tied to SDAI to form the SDA line. An external pull-up
resistor or current source is required.
SDAO (LTC4151-1 Only): Inverted Serial Bus Data Out-
put. Open-drain output used for sending data back to the
master controller or acknowledging a write operation. Data
is inverted for convenience of opto-isolation. An external
pull-up resistor or current source is required.
SHDN (LTC4151 Only): Shutdown Input. Internally pulled
up to 6.3V. Pull this pin below 1V to force the LTC4151 into
shutdown mode. Leave this pin open if unused.
VIN = 12V, TA = 25°C, unless noted.
SDA, SDAI, SCL Clamp Voltage
vs Load Current
– 40°C
25°C
85°C
I
(mA)
LOAD
4151 G10
2
C Bus Data Input.
. The volt-
IN
IN
.
6
4151fb
Page 7
PIN FUNCTIONS
LTC4151
GND: Device Ground.
–
SENSE
external sense resistor between SENSE
The differential voltage between SENSE
BLOCK DIAGRAM
: High Side Current Sense Input. Connect an
+
+
and SENSE– is
R
SENSE
+
25X
S
+
V
IN
V
IN
INTERNAL
POWER
735k
15k
GNDADIN
and SENSE–.
–
SENSE
–
MUX
monitored by the onboard ADC with a full-scale sense
voltage of 81.92mV.
Exposed Pad (DD Package Only): Exposed pad may be
left open or connected to device ground (GND).
6.3V
SHDN
(LTC4151)
5μA
SHUTDOWN
CONTROL
V
REF
12-BIT ADC
= 2.048V
ADR1
DECODER
2
I
C/
REGISTERS
ADR0
SDAO/SDAO
(LTC4151-1/
LTC4151-2)
SDA/SDAI
6V
(LTC4151/
LTC4151-1)
6V
SCL
4151 BD
OPERATION
The LTC4151 accurately monitors high side current and
voltages. This device accepts a wide range of input voltages from as low as 7V up to 80V and consumes less
than 1.7mA quiescent current in normal operation. A
shutdown mode is available with the LTC4151 to reduce
the quiescent current to less than 300μA by pulling the
SHDN pin below 1V.
In default continuous scan mode after power-up, the
onboard 12-bit analog-to-digital converter (ADC) continuously and sequentially measures the high side differential voltage between SENSE
–
SENSE
(full-scale 81.92mV) through an internal sense
amplifi er, the input voltage V
an internal voltage divider, and the voltage applied to the
ADIN pin (full-scale 2.048V). The reference voltage of the
ADC is internally set to 2.048V. The digital data obtained
by the ADC is stored in the onboard registers.
+
(Kelvin sense of VIN) and
(full-scale 102.4V) through
IN
In snapshot mode, the LTC4151 can perform on-demand
measurement of a selected voltage without the need of
continuous polling by a master controller. The snapshot
mode is enabled by programming the control register
2
through the I
C interface. A status bit in the data register
monitors the ADC’s conversion. When the conversion is
completed, the 12-bit digital code of the measured voltage
is held in the corresponding data registers.
2
The LTC4151 provides an I
C interface to read the ADC data
from the data registers and to program the control register.
Two three-state pins, ADR0 and ADR1, are used to decode
nine device addresses (see Table 1). The LTC4151 features
a single SDA pin to handle both input data and output data,
while the LTC4151-1/LTC4151-2 provide separate data in
(SDAI) and data out (SDAO on the LTC4151-1 and SDAO
on the LTC4151-2) pins to facilitate opto-isolation.
4151fb
7
Page 8
LTC4151
APPLICATIONS INFORMATION
The LTC4151 offers a compact complete solution for high
side power monitoring. With a wide operating voltage
range from 7V to 80V, this device is ideal for a variety of
applications including consumer, automotive, industrial and
telecom infrastructure. The simple application circuit as
shown in Figure 1 provides monitoring of high side current
with a 0.02Ω resistor (4.096A in full scale), input voltage
(102.4V in full scale) and an external voltage (2.048V in
full scale), all with an internal 12-bit resolution ADC.
Data Converter
The LTC4151 features an onboard, 12-bit ΔΣ A/D converter (ADC) that continuously monitors three voltages
in the sequence of (V
and V
third. The ΔΣ architecture inherently aver-
ADIN
SENSE
– V
+
–
) fi rst, VIN second
SENSE
ages signal noise during the measurement period. The
differential voltage between SENSE
+
and SENSE– is
monitored with an 81.92mV full scale and 20μV resolution that allows accurate measurement of the high side
input current. SENSE
pin and must be connected to V
proper ADC readout. The supply voltage at V
+
is a Kelvin sense pin for the VIN
(see Figure 10) for
IN
is directly
IN
measured with a 102.4V full scale and 25mV resolution.
The voltage at the uncommitted ADIN pin is measured
with a 2.048V full scale and 0.5mV resolution that allows
monitoring of any external voltage. The 12-bit digital
code of each measured voltage is stored in two adjacent
registers out of the six total data registers A through F,
with the eight MSBs in the fi rst register and the four LSBs
in the second (Table 2).
The data in registers A through F is refreshed at a frequency
of 7.5Hz in continuous scan mode. Setting control register
bit G4 (Table 6) invokes a test mode that halts updating
of these registers so that they can be written to and read
from for software testing.
The data converter features a snapshot mode allowing users to make one-time measurements of a selected voltage
(either the SENSE voltage, V
voltage, or ADIN voltage).
IN
To enable snapshot mode, set control register bit G7 and
write the 2-bit code of the desired ADC channel to G6
and G5 (Table 6) using a Write Byte command. When the
Write Byte command is completed, the ADC measures the
selected voltage and a Busy Bit in the LSB data register
is set to indicate that the data is not ready. After completing the conversion, the ADC is halted and the Busy Bit is
reset to indicate that the data is ready. To make another
measurement of the same voltage or to measure another
voltage, fi rst disable the snapshot mode for the previous
measurement by clearing control bit G7, then re-enable the
snapshot mode and write the code of the desired voltage
according to the procedure described above. The Busy Bit
remains reset in the continuous scan mode.
8
V
IN
ADR1
ADR0
SENSE
0.02Ω
+
LTC4151
GND
SENSE
–
SHDN
SCL
SDA
ADIN
V
OUT
2k2k
V
ADIN
μ-CONTROLLER
SCL
SDA
V
IN
7V TO 80V
Figure 1. Monitoring High Side Current and Voltages Using the LTC4151
3.3V
V
DD
4151 F01
4151fb
Page 9
APPLICATIONS INFORMATION
LTC4151
I2C Interface
2
The LTC4151 features an I
C-compatible interface to
provide access to six ADC data registers and a control
register for monitoring the measured voltages. Figure 2
2
shows a general data transfer format using the I
C. The
LTC4151is a read-write slave device and supports SMBus
Read Byte, Write Byte, Read Word and Write Word commands. The device also supports Read Page and Write
Page commands that allow one to read or write more than
two bytes of data. When using the Read Page and Write
SDA
SCL
S
START
CONDITION
a6 - a0b7 - b0b7 - b0
1 - 789
ADDRESSR/WACKDATAACKDATAACK
1 - 7891 - 789
Figure 2. General Data Transfer over I2C
Page commands, the host need only to issue an initial
register address and the internal register address pointer
automatically increments by 1 after each byte of data is read
or written. After the register address reaches 06h, it will
be reset to 00h and continue the increment. Upon a Stop
condition, the register address is reset to 00h. If desired,
the Read Page and Write Page support can be disabled by
clearing control register bit G3. The data formats for the
above commands are shown in Figures 3 to 8.
P
STOP
CONDITION
4151 F02
S ADDRESS
1 1 0 a3:a0
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
COMMANDDATA
AAAP
X X X X X b2:b00W000b7:b0
A: ACKNOWLEDGE (LOW)
A: NOT ACKNOWLEDGE (HIGH)
R: READ BIT (HIGH)
4151 F03
W: WRITE BIT (LOW)
S: START CONDITION
P: STOP CONDITION
Figure 3. LTC4151 Serial Bus SDA Write Byte Protocol
S ADDRESS
1 1 0 a3:a0
COMMAND
AAAP
DATA
b7:b0
A
0
DATA0A
b7:b0
Figure 5. LTC4151 Serial Bus SDA Write Page Protocol
S ADDRESS
1 1 0 a3:a01 1 0 a3:a0 1 0
A
X X X X X b2:b00W00
Figure 7. LTC4151 Serial Bus SDA Read Word Protocol
S ADDRESS
1 1 0 a3:a01 1 0 a3:a0 1 0
COMMANDS ADDRESS R A
A
X X X X X b2:b00W00
Figure 8. LTC4151 Serial Bus SDA Read Page Protocol
S ADDRESS
1 1 0 a3:a0
A
Figure 4. LTC4151 Serial Bus SDA Write Word Protocol
...
DATA
b7:b0
0X X X X X b2:b00W00
4151 F05
...
S ADDRESS
1 1 0 a3:a01 1 0 a3:a0 1 0
AAA P
X X X X X b2:b00W00
Figure 6. LTC4151 Serial Bus SDA Read Byte Protocol
COMMANDS ADDRESS R A
AA P
AA P
DATA
0Ab7:b0
b7:b01
DATA
b7:b01
DATA
0Ab7:b0
COMMANDDATADATA
X X X X X b2:b00W0000
COMMANDS ADDRESS R A
DATA
...
...
AAAP
4151 F07
DATA
b7:b0
4151 F08
b7:b0b7:b0
4151 F04
DATA
b7:b0 1
4151 F06
4151fb
9
Page 10
LTC4151
APPLICATIONS INFORMATION
Using Opto-Isolators with LTC4151-1 and LTC4151-2
The LTC4151-1/LTC4151-2 split the SDA line into SDAI
(input) and SDAO (LTC4151-1 inverted output) or SDAO
(LTC4151-2 output) for convenience of opto-coupling with
a host controller that sits at a different ground level.
When using opto-isolators with the LTC4151-1, connect
the SDAI to the output of the incoming opto-coupler and
connect the SDAO to the anode of the outgoing optocoupler (see Figure 9). With the outgoing opto-coupler
clamping SDAO and internal 6V (5.5V minimum) clamps
on SDAI and SCL, the pull-up resistors on these three pins
can be directly connected to V
. In this way (with SDAO
IN
rather than conventional SDAO), the need for a separate
low voltage supply for pull-ups is eliminated.
Figure 11 shows the LTC4151-2 with high speed optocouplers for faster bus speeds. The LTC4151-2 has a noninverter SDAO output. Powered from VIN, the high voltage
LT3010-5 low dropout regulator provides the supply for
the opto-couplers as well as the bus lines pull-up.
Start and Stop Conditions
2
When the I
C bus is idle, both SCL and SDA must remain
in the high state. A bus master signals the beginning of a
transmission with a Start condition by transitioning SDA
from high to low while SCL stays high. When the master
has fi nished communicating with the slave, it issues a
Stop condition by transitioning SDA from low to high
while SCL stays high. The bus is then free for another
transmission.
Stuck-Bus Reset
2
The LTC4151 I
C interface features a stuck-bus reset timer.
The low conditions of the SCL and the SDA/SDAI pins
are OR’ed to start the timer. The timer is reset when both
SCL and SDA/SDAI are pulled high. If the SCL pin or the
SDA/SDAI pin is held low for over 33ms, the stuck-bus
timer will expire and the internal I
2
C state machine will be
reset to allow normal communication after the stuck-bus
condition is cleared. The stuck-bus timer can be disabled
by clearing control register bit G2.
V
48V
R
S
V
IN
ADR1
ADR0
SENSE
LTC4151-1
0.02Ω
+
GND
SENSE
–
SCL
SDAI
SDA0
ADIN
R1
20kR220kR35.1k
V
ADIN
MOCD207M
MOCD207M
R5
R4
0.51kR610kR710k
0.51k
18
27
36
45
81
72
63
54
IN
3.3V
V
DD
SCL
μ-CONTROLLER
SDA
4151 F09
Figure 9. Opto-Isolation of the I2C Interface Between LTC4151-1 and a
Microcontroller (Data Rate of I2C is Limited by Slew Rate of Opto-Isolators)
10
4151fb
Page 11
APPLICATIONS INFORMATION
LTC4151
I2C Device Addressing
Nine distinct I
2
C bus addresses are confi gurable using the
three-state pins ADR0 and ADR1, as shown in Table 1.
Address bits a6, a5 and a4 are confi gured to (110) and
the least signifi cant bit is the R/W bit. In addition, the
LTC4151 will respond to a mass write address (1100 110)b
for writing to all LTC4151s, regardless of their individual
address settings.
Acknowledge
The acknowledge signal is used for handshaking between
the transmitter and the receiver to indicate that the last
byte of data was received. The transmitter always releases
the SDA line during the acknowledge clock pulse. The
LTC4151 pulls the SDA line low on the 9th clock cycle to
acknowledge receipt of the data. If the slave fails to acknowledge by leaving SDA high, then the master can abort
the transmission by generating a Stop condition. When
the master is receiving data from the slave, the master
must pull down the SDA line during the clock pulse to
indicate receipt of a data byte, and that another byte is to
be read. After the last byte has been received the master
will leave the SDA line high (not acknowledge) and issue
a Stop condition to terminate the transmission.
Write Protocol
The master begins a write operation with a Start condition
followed by the seven bit slave address and the R/W bit
set to zero. After the addressed LTC4151 acknowledges
the address byte, the master then sends a command
byte which indicates which internal register the master
wishes to write. The LTC4151 acknowledges this and
then latches the lower three bits of the command byte
into its internal register address pointer. The master then
delivers the data byte and the LTC4151 acknowledges
once more and latches the data into its internal register.
If the master continues sending a second byte or more
data bytes, as in a Write Word or Write Page command,
the second byte or more data bytes will be acknowledged
by the LTC4151, the internal register address pointer
will increment automatically, and each byte of data will
be latched into an internal register corresponding to the
address pointer. The write operation terminates and the
register address pointer resets to 00h when the master
sends a Stop condition.
Read Protocol
The master begins a read operation with a Start condition
followed by the seven bit slave address and the R/W bit
set to zero. After the addressed LTC4151 acknowledges
the address byte, the master then sends a command
byte that indicates which internal register the master
wishes to read. The LTC4151 acknowledges this and then
latches the lower three bits of the command byte into its
internal register address pointer. The master then sends
a repeated Start condition followed by the same seven bit
Table 1. LTC4151 Device Addressing*
HEX DEVICE
DESCRIPTION
Mass WriteCC11001100 X X
0CE1100111X H L
1D0 1101000XNCH
2D2 1101001X H H
3D4 1101010XNCNC
4D6 1101011XNC L
5D8 1101100X L H
6DA 1101101X HNC
7DC 1101110X L NC
8DE1101111X L L
*H = Tie High; L = Tie to GND; NC = Open; X = Don’t Care
00hSENSE (A)R/W**ADC Current Sense Voltage Data (8 MSBs)
01hSENSE (B)R/W**ADC Current Sense Voltage Data (4 LSBs)
02hV
03hV
04hADIN (E)R/W**ADC ADIN Voltage Data (8 MSBs)
05hADIN (F)R/W**ADC ADIN Voltage Data (4 LSBs)
06hCONTROL (G)R/WControls ADC Operation Mode and Test Mode
07hReserved
*Register address MSBs b7-b3 are ignored. **Writable if bit G4 is set.
Table 3. SENSE Registers A (00h) and B (O1h)—Read/Write
BITNAMEOPERATION
A7:0, B7:4SENSE Voltage Data12-Bit Data of Current Sense Voltage with 20μV LSB and 81.92mV Full-Scale
B3ADC Busy in Snapshot Mode1 = SENSE Being Converted; 0 = SENSE Conversion Completed. Not Writable
B2:0ReservedAlways Returns 0. Not Writable
(C)R/W**ADC VIN Voltage Data (8 MSBs)
IN
(D)R/W**ADC VIN Voltage Data (4 LSBs)
IN
Table 4. VIN Registers C (02h) and D (O3h)—Read/Write
BITNAMEOPERATION
C7:0, D7:4V
D3ADC Busy in Snapshot Mode1 = V
D2:0ReservedAlways Returns 0, Not Writable
Voltage Data12-Bit Data of VIN Voltage with 25mV LSB and 102.4V Full-Scale
IN
Being Converted; 0 = VIN Conversion Completed. Not Writable
IN
Table 5. ADIN Registers E (04h) and F (O5h)—Read/Write
BITNAMEOPERATION
E7:0, F7:4ADIN Voltage Data12-Bit Data of Current Sense Voltage with 500μV LSB and 2.048V Full-Scale
F3ADC Busy in Snapshot Mode1 = ADIN Being Converted; 0 = ADIN Conversion Completed. Not Writable
F2:0ReservedAlways Returns 0, Not Writable
Table 6. CONTROL Register G (06h)—Read/Write
BITNAMEOPERATION
G7ADC Snapshot Mode
Enable
G6ADC Channel Label for
Snapshot Mode
G5ADC Channel Label for
Snapshot Mode
Enables ADC Snapshot Mode; 1 = Snapshot Mode Enabled. Only the channel selected by G6 and G5 is
measured by the ADC. After the conversion, the channel busy bit is reset and the ADC is halted.
0 = Snapshot Mode Disabled (ADC free running, Default).
ADC Channel Label for Snapshot Mode
G6G5ADC CHANNEL
00SENSE (Default)
01V
10ADIN
IN
G4Test Mode EnableTest Mode Halts ADC Operation and Enables Writes to ADC Registers; 1 = Enable Test Mode,
address with the R/W bit now set to one. The LTC4151
acknowledges and sends the contents of the requested
register. The transmission terminates when the master
sends a Stop condition. If the master acknowledges the
transmitted data byte, as in a Read Word command, the
LTC4151 will send the contents of the next register. If
the master acknowledges the second data byte and each
of the following (if more) data bytes, as in a Read Page
command, the LTC4151 will keep sending out each data
byte in the register that corresponds to the incrementing
register pointer. The read operation terminates and the
register address pointer resets to 00h when the master
sends a Stop condition.
Layout Considerations
A Kelvin connection between the sense resistor R
and
S
the LTC4151 is recommended to achieve accurate current
sensing (Figure 10). The minimum trace width for 1oz
copper foil is 0.02" per amp to make sure the trace stays
R1
V
IN
ADINADIN
ADR1
ADR0
SENSE
LTC4151-2
0.02Ω
+
GND
SENSE
–
SDAO
SDAI
SCL
V
OUT
V
IN
8
IN
LT3010-5
C7
5
1μF
SHDN
100V
SENSE
GND
4
OUT
1
C6
1μF
2
R3
10k
V
7V to 80V
IN
at a reasonable temperature. Using 0.03" per amp or wider
is recommended. Note that 1oz copper exhibits a sheet
resistance of about 530μΩ per square.
V
IN
GND
SENSE
V
IN
ADR1
ADR0
+
R
S
LTC4151
SENSE
GND
–
Figure 10. Recommended Layout for Kelvin Connection
ISO1
R8
1k
R4
10k
PS9817-2
1
2
8
V
CC
7
6
GND
5
ISO2
PS9817-2
V
GND
8
CC
7
5
1
2
3
4
C4
0.1μF
5V
R121kR14
R111kR13
4151 F11
10k
10k
I
LOAD
I
LOAD
4151 F10
ISO_SDA
ISO_SCL
Figure 11. LTC4151-2 I2C Opto-Isolation Interface with High Speed Opto-Couplers
4151fb
13
Page 14
LTC4151
TYPICAL APPLICATION
Temperature Monitoring with an NTC Thermistor While
Measuring Load Current and LTC4151 Supply Current
V
IN
48V
VISHAY
2381 615 4.104
PACKAGE DESCRIPTION
0.2Ω
100k AT 25
1%
40.2k
1%
1.5k
1%
T(°C) = 58.82 • (N
N
ADIN
ADC AT THE ADIN AND V
AND N
°C
SENSE+SENSE
ADIN
ADIN/NVIN
ARE DIGITAL CODES MEASURED BY THE
VIN
IN
–
LTC4151
GND
– 0.1066), 20°C < T < 60°C.
PINS, RESPECTIVELY.
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev B)
V
IN
SCL
SDA
ADR1
ADR0
4151 TA02
250mA
LOAD
2
I
C
0.70 p0.05
3.55 p0.05
2.15 p0.05
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
1.65 p0.05
(2 SIDES)
PACKAGE
OUTLINE
0.25 p 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
2.38 p0.05
(2 SIDES)
0.50
BSC
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
14
R = 0.125
TYP
3.00 p0.10
(4 SIDES)
0.75 p0.05
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
1.65 p 0.10
(2 SIDES)
0.00 – 0.05
2.38 p0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
106
15
0.50 BSC
0.40 p 0.10
(DD) DFN REV B 0309
0.25 p 0.05
4151fb
Page 15
PACKAGE DESCRIPTION
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661 Rev E)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
LTC4151
0.497 ± 0.076
7
6
(.0196 ± .003)
REF
8910
5.23
(.206)
MIN
0.305 ± 0.038
(.0120 ± .0015)
TYP
0.889 ± 0.127
(.035 ± .005)
GAUGE PLANE
3.20 – 3.45
(.126 – .136)
0.50
(.0197)
RECOMMENDED SOLDER PAD LAYOUT
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
BSC
0.18
(.007)
0.254
(.010)
DETAIL “A”
0° – 6° TYP
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
S Package
16-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.050 BSC
N
.045 p.005
16
14
15
SEATING
PLANE
.386 – .394
(9.804 – 10.008)
NOTE 3
13
4.90 ± 0.152
(.193 ± .006)
(.043)
0.17 –0.27
(.007 – .011)
TYP
12
11
1.10
MAX
12
0.50
(.0197)
BSC
10
3
45
9
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
0.86
(.034)
REF
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MS) 0307 REV E
.245
MIN
.030 p.005
TYP
(0.254 – 0.508)
.008 – .010
(0.203 – 0.254)
.160
p.005
123N/2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
s 45o
0o – 8o TYP
.016 – .050
(0.406 – 1.270)
INCHES
(MILLIMETERS)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
.228 – .244
(5.791 – 6.197)
.053 – .069
(1.346 – 1.752)
(0.355 – 0.483)
N
1
.014 – .019
TYP
.150 – .157
(3.810 – 3.988)
N/2
4
5
.050
(1.270)
BSC
3
2
7
6
NOTE 3
8
.004 – .010
(0.101 – 0.254)
S16 0502
4151fb
15
Page 16
LTC4151
TYPICAL APPLICATION
High Side Current, Input Voltage and Open Fuse Monitoring
V
IN1
48V
V
IN2
48V
D3
with a Single LTC4151
D1F1
SENSE
RS
0.02Ω
+
SENSE
–
D2F2
D4
GND
R1
150k
R2
301k
R3
3.4k
V
IN
ADIN
LTC4151
GND
SCL
SDA
ADR1
ADR0
I2C
V
LOAD
V
+
–
4151 TA02
CONDITIONRESULT
≥ 1.375 • N
N
ADIN
0.835 • N
0.285 • N
VIN
VIN
≤ N
≤ N
VIN
< 1.375 • N
ADIN
< 0.835 • N
ADIN
VIN
VIN
Normal Operation
F2 is Open
F1 is Open
(Not Responding)Both F1 and F2 are Open
AND V
V
IN1
MEASURED BY THE ADC AT THE ADIN AND V
ARE WITHIN 20% APART. N
IN2
AND N
ADIN
PINS, RESPECTIVELY.
IN
ARE DIGITAL CODES
VIN
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