Datasheet LTC4085, LTC4085EDE Datasheet (Linear Technology)

LTC4085

1

4085fa

I

LOAD

(mA)

0

600

500

400

300

200

100

0

–100

300 500

4085 TA01b

100 200

400 600

CURRENT (mA)

I

LOAD

I

IN

I

BAT

(CHARGING)

I

BAT

(DISCHARGING)

WALL = 0V

USB Power Manager with

Ideal Diode Controller and

Li-Ion Charger

The LTC®4085 is a USB power manager and Li-Ion battery
charger designed for portable battery-powered applica­tions. The part controls the total current used by the USB
peripheral for operation and battery charging. The total
input current can be limited to 20% or 100% of a pro­grammed value up to 1.5A (typically 100mA or 500mA).
Battery charge current is automatically reduced such that
the sum of the load current and charge current does not
exceed the programmed input current limit.

The LTC4085 includes a complete constant-current/con­stant-voltage linear charger for single cell Li-ion batteries.
The fl oat voltage applied to the battery is held to a tight

0.8% tolerance, and charge current is programmable using
an external resistor to ground. An end-of-charge status
output

⎯C⎯H⎯R⎯

G indicates full charge. Total charge time is
programmable by an external capacitor to ground. When
the battery drops 100mV below the fl oat voltage, automatic
recharging of the battery occurs. Also featured is an NTC
thermistor input used to monitor battery temperature
while charging.

The LTC4085 is available in a 14-lead low profi le 4mm ×
3mm DFN package.

■

Portable USB Devices: Cameras, MP3 Players, PDAs

■

Seamless Transition Between Input Power Sources:

Li-Ion Battery, USB and 5V Wall Adapter

■

215mΩ Internal Ideal Diode Plus Optional External

Ideal Diode Controller Provide Low Loss PowerPath

TM

When Wall Adapter/USB Input Not Present

■

Load Dependent Charging Guarantees Accurate USB

Input Current Compliance

■

Constant-Current/Constant-Voltage Operation with

Thermal Feedback to Maximize Charging Rate Without
Risk of Overheating*

■

Selectable 100% or 20% Input Current Limit

(e.g., 500mA/100mA)

■

Battery Charge Current Independently Programmable

Up to 1.2A

■

Preset 4.2V Charge Voltage with 0.8% Accuracy

■

C/10 Charge Current Detection Output

■

NTC Thermistor Input for Temperature Qualifi ed Charging

■

Tiny (4mm × 3mm × 0.75mm) 14-Lead DFN Package

APPLICATIO S

U

FEATURES DESCRIPTIO

U

TYPICAL APPLICATIO

U

IN

SUSP

HPWR

PROG

CLPROG

NTC

V

NTC

WALL

ACPR

OUT

GATE

BAT

CHRG

TIMER

LTC4085

GND

+

0.1µF

4.7µF

TO LDOs,
REGs, ETC

10k

10k2k100k

5V WALL

ADAPTER

INPUT

5V (NOM)

FROM USB

CABLE V

BUS

4.7µF

SUSPEND USB POWER

100mA 500mA SELECT

1k

510Ω

4085 TA01

*

* OPTIONAL - TO LOWER

IDEAL DIODE IMPEDANCE

I

IN

I

LOAD

I

BAT

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
PowerPath is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 6522118, 6700364.
Other patents pending.

Input and Battery Current vs Load Current

R

PROG

= 100k, R

CLPROG

= 2k

LTC4085

2

4085fa

(Notes 1, 2, 3, 4, 5)

Terminal Voltage

IN, OUT

t < 1ms and Duty Cycle < 1% ................... –0.3V to 7V

Steady State ............................................. –0.3V to 6V

BAT,

⎯C⎯H⎯R⎯

G, HPWR, SUSP, WALL, ⎯A⎯C⎯P⎯R ..... –0.3V to 6V

NTC, TIMER, PROG, CLPROG .......–0.3V to (V

CC

+ 0.3V)

Pin Current (Steady State)

IN, OUT, BAT (Note 6) ..............................................2.5A

Operating Temperature Range ................. –40°C to 85°C

Maximum Operating Junction Temperature .......... 110°C

Storage Temperature Range ................... –65°C to 125°C

The

●

indicates specifi cations which apply over the full operating

temperature range, otherwise specifi cations are at TA = 25°C. VIN = 5V, V

BAT

= 3.7V, HPWR = 5V, WALL = 0V, R

PROG

= 100k,

R

CLPROG

= 2k, unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

IN

Input Supply Voltage IN and OUT

4.35 5.5 V

V

BAT

Input Voltage BAT

4.3 V

I

IN

Input Supply Current I

BAT

= 0 (Note 7)
Suspend Mode; SUSP = 5V
Suspend Mode; SUSP = 5V, WALL = 5V,
V

OUT

= 4.8V

●

●

●

0.5
50
60

1.2
100
110

mA

μA
μA

I

OUT

Output Supply Current V

OUT

= 5V, VIN = 0V, NTC = V

NTC

●

0.7 1.4 mA

I

BAT

Battery Drain Current V

BAT

= 4.3V, Charging Stopped
Suspend Mode; SUSP = 5V
V

IN

= 0V, BAT Powers OUT, No Load

●

●

●

15
22
60

27
35

100

μA
μA
μA

V

UVLO

Input or Output Undervoltage Lockout VIN Powers Part, Rising Threshold

V

OUT

Powers Part, Rising Threshold

●

●

3.6

2.75

3.8

2.9543.15

V
V

ΔV

UVLO

Input or Output Undervoltage Lockout VIN Rising – VIN Falling

or V

OUT

Rising – V

OUT

Falling

130 mV

Current Limit

I

LIM

Current Limit R

CLPROG

= 2k (0.1%), HPWR = 5V

R

CLPROG

= 2k (0.1%), HPWR = 0V

●

●

475

90

500
100

525
110

mA
mA

I

IN(MAX)

Maximum Input Current Limit (Note 8) 2.4 A

R

ON

ON Resistance VIN to V

OUT

I

OUT

= 100mA Load 215 mΩ

ELECTRICAL CHARACTERISTICS

ABSOLUTE AXI U RATI GS

W

WW

U

ORDER PART NUMBER

DE PART MARKING

Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.

4085

PACKAGE/ORDER I FOR ATIO

UUW

T

JMAX

= 125°C, θJA = 40°C/W

EXPOSED PAD (PIN 15) IS GND, MUST BE CONNECTED TO PCB

Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF

Lead Free Part Marking: http://www.linear.com/leadfree/

1

2

3

4

5

6

7

14

13

12

11

10

9

8

BAT

GATE

PROG

CHRG

ACPR

V

NTC

NTC

IN

OUT

CLPROG

HPWR

SUSP

TIMER

WALL

TOP VIEW

15

DE PACKAGE

14-LEAD (4mm × 3mm) PLASTIC DFN

LTC4085EDE

LTC4085

3

4085fa

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

CLPROG

CLPROG Pin Voltage R

PROG

= 2k

R

PROG

= 1k

●

●

0.98

0.98

1
1

1.02

1.02

V
V

I

SS

Soft Start Inrush Current IN or OUT 5 mA/μs

V

CLEN

Input Current Limit Enable Threshold
Voltage

(VIN – V

OUT

) VIN Rising

(V

IN

– V

OUT

) VIN Falling

20

-80

50

-60

80

-20

mV
mV

Battery Charger

V

FLOAT

Regulated Output Voltage I

BAT

= 2mA

I

BAT

= 2mA, (0°C – 85°C)

4.165

4.158

4.2

4.2

4.235

4.242

V
V

I

BAT

Current Mode Charge Current R

PROG

= 100k (0.1%), No Load

R

PROG

= 50k (0.1%), No Load

●

●

465
920

500

1000

535

1080

mA
mA

I

BAT(MAX)

Maximum Charge Current (Note 8) 1.5 A

V

PROG

PROG Pin Voltage R

PROG

= 100k

R

PROG

= 50k

●

●

0.98

0.98

1
1

1.02

1.02

V
V

k

EOC

Ratio of End-of-Charge Current to
Charge Current

V

BAT

= V

FLOAT

(4.2V)

●

0.085 0.1 0.11 mA/mA

I

TRIKL

Trickle Charge Current V

BAT

= 2V, R

PROG

= 100k (0.1%) 40 50 60 mA

V

TRIKL

Trickle Charge Threshold Voltage

●

2.8 2.9 3 V

V

CEN

Charger Enable Threshold Voltage (V

OUT

– V

BAT

) Falling; V

BAT

= 4V

(V

OUT

– V

BAT

) Rising; V

BAT

= 4V

55
80

mV
mV

V

RECHRG

Recharge Battery Threshold Voltage V

FLOAT

– V

RECHRG

●

60 100 130 mV

t

TIMER

TIMER Accuracy V

BAT

= 4.3V -10 10 %

Recharge Time Percent of Total Charge Time 50 %

Low Battery Trickle Charge Time Percent of Total Charge Time, V

BAT

< 2.8V 25 %

T

LIM

Junction Temperature in Constant
Temperature Mode

105 °C

Internal Ideal Diode

R

FWD

Incremental Resistance, VON Regulation I

BAT

= 100mA 125 mΩ

R

DIO(ON)

ON Resistance V

BAT

to V

OUT

I

BAT

= 600mA 215 mΩ

V

FWD

Voltage Forward Drop (V

BAT

– V

OUT

)I

BAT

= 5mA

I

BAT

= 100mA

I

BAT

= 600mA

●

10 30

55

160

50 mV

mV
mV

V

OFF

Diode Disable Battery Voltage 2.8 V

I

FWD

Load Current Limit, for VON Regulation 550 mA

I

D(MAX)

Diode Current Limit 2.2 A

External Ideal Diode

V

FWD,EDA

External Ideal Diode Forward Voltage V

GATE

= 1.85V; I

GATE

= 0 20 mV

Logic

V

OL

Output Low Voltage ⎯C⎯H⎯R⎯G, ⎯A⎯C⎯P⎯RI

SINK

= 5mA

●

0.1 0.25 V

V

IH

Input High Voltage SUSP, HPWR Pin

●

1.2 V

V

IL

Input Low Voltage SUSP, HPWR Pin

●

0.4 V

I

PULLDN

Logic Input Pull-Down Current SUSP, HPWR 2 μA

The

●

indicates specifi cations which apply over the full operating

temperature range, otherwise specifi cations are at T

A

= 25°C. VIN = 5V, V

BAT

= 3.7V, HPWR = 5V, WALL = 0V, R

PROG

= 100k,

R

CLPROG

= 2k, unless otherwise noted.

ELECTRICAL CHARACTERISTICS

LTC4085

4

4085fa

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

CHG(SD)

Charger Shutdown Threshold Voltage
on TIMER

●

0.15 0.4 V

I

CHG(SD)

Charger Shutdown Pull-Up Current
on TIMER

V

TIMER

= 0V

●

514 μA

V

WAR

Absolute Wall Input Threshold Voltage V

WALL

Rising Threshold

●

4.15 4.25 4.35 V

V

WAF

Absolute Wall Input Threshold Voltage V

WALL

Falling Threshold 3.12 V

V

WDR

Delta Wall Input Threshold Voltage V

WALL

– V

BAT

Rising Threshold 75 mV

V

WDF

Delta Wall Input Threshold Voltage V

WALL

– V

BAT

Falling Threshold

●

02540 mV

I

WALL

Wall Input Current V

WALL

= 5V 75 150 μA

NTC

V

VNTC

V

NTC

Bias Voltage I

VNTC

= 500μA

●

4.4 4.85 V

I

NTC

NTC Input Leakage Current V

NTC

= 1V 0 ±1 μA

V

COLD

Cold Temperature Fault Threshold
Voltage

Rising Threshold
Hysteresis

0.74 • V

VNTC

0.02 • V

VNTC

V
V

V

HOT

Hot Temperature Fault Threshold
Voltage

Falling Threshold
Hysteresis

0.29 • V

VNTC

0.01 • V

VNTC

V
V

V

DIS

NTC Disable Voltage NTC Input Voltage to GND (Falling)

Hysteresis

●

75 100

35

125 mV

mV

Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.

Note 2: V

CC

is the greater of VIN, V

OUT

or V

BAT

.

Note 3: All voltage values are with respect to GND.
Note 4: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction
temperatures will exceed 125°C when overtemperature protection is
active. Continuous operation above the specifi ed maximum operating
junction temperature may result in device degradation or failure.

Note 5: The LTC4085E is guaranteed to meet specifi ed performance from
0° to 85°C. Specifi cations over the –40°C to 85°C operating temperature
range are assured by design, characterization and correlation with
statistical process controls.

Note 6: Guaranteed by long term current density limitations.
Note 7: Total input current is equal to this specifi cation plus 1.002 • I

BAT

where I

BAT

is the charge current.

Note 8: Accuracy of programmed current may degrade for currents greater
than 1.5A.

The

●

indicates specifi cations which apply over the full operating

temperature range, otherwise specifi cations are at T

A

= 25°C. VIN = 5V, V

BAT

= 3.7V, HPWR = 5V, WALL = 0V, R

PROG

= 100k,

R

CLPROG

= 2k, unless otherwise noted.

ELECTRICAL CHARACTERISTICS

LTC4085

5

4085fa

TEMPERATURE (°C)

–50

V

PROG

(V)

0.995

1.000

1.005

25

75

4085 G07

0.990

0.985

0.980
–25 0 50

1.010

1.015

1.020

100

VIN = 5V
V

BAT

= 4.2V

R

PROG

= 100k

R

CLPROG

= 2k

I

BAT

(mA)

0

4.00

V

FLOAT

(V)

4.05

4.10

4.15

4.20

4.25

4.30

200 400 600 800

4085 G08

1000

R

PROG

= 34k

TEMPERATURE (°C)

–50

VFLOAT (V)

4.195

4.200

4.205

25

75

4085 G09

4.190

4.185

4.180
–25 0 50

4.210

4.215

4.220

100

VIN = 5V
I

BAT

= 2mA

TEMPERATURE (°C)

–50

0

I

IN

(µA)

100

300

400

500

50

900

4085 G01

200

0

–25

75

25 100

600

700

800

VIN = 5V
V

BAT

= 4.2V

R

PROG

= 100k

R

CLPROG

= 2k

TEMPERATURE (°C)

–50

70

60

50

40

30

20

10

0

25 75

4085 G02

25 0

50 100

I

IN

(µA)

VIN = 5V
V

BAT

= 4.2V

R

PROG

= 100k

R

CLPROG

= 2k

SUSP = 5V

TEMPERATURE (°C)

–50

0

I

BAT

(µA)

20

40

60

–25

0

25 50

4085 G03

75

80

100

10

30

50

70

90

100

VIN = 0V
V

BAT

= 4.2V

TEMPERATURE (°C)

–50

475

I

IN

(mA)

485

495

505

515

525

–25

02550

4085 G04

75 100

VIN = 5V
V

BAT

= 3.7V

R

PROG

= 100k

R

CLPROG

= 2k

TEMPERATURE (°C)

–50

I

IN

(mA)

92

96

100

–25

0

25 50

4085 G05

75

104

108

110

90

94

98

102

106

100

VIN = 5V
V

BAT

= 3.7V

R

PROG

= 100k

R

CLPROG

= 2k

TEMPERATURE (°C)

–50

0

V

CLPROG

(V)

0.2

0.4

0.6

0.8

1.2

–25

02550

4085 G06

75 100

1.0

VIN = 5V
R

CLPROG

= 2k

HPWR = 5V

HPWR = 0V

Input Supply Current
vs Temperature

Input Supply Current vs
Temperature (Suspend Mode)

Battery Drain Current
vs Temperature
(BAT Powers OUT, No Load)

Input Current Limit
vs Temperature, HPWR = 5V

Input Current Limit
vs Temperature, HPWR = 0V

CLPROG Pin Voltage
vs Temperature

PROG Pin Voltage
vs Temperature V

FLOAT

Load Regulation

Battery Regulation (Float)
Voltage vs Temperature

TYPICAL PERFOR A CE CHARACTERISTICS

UW

TA = 25°C unless otherwise noted.

LTC4085

6

4085fa

TEMPERATURE (°C)

–50

I

BAT

(mA)

400

500

600

25 75

4085 G12

300

200

–25 0

50 100 125

100

0

VIN = 5V
V

BAT

= 3.5V

θ

JA

= 50°C/W

TEMPERATURE (°C)

–50

125

R

ON

(mΩ)

150

175

200

225

275

–25

02550

4085 G10

75 100

250

VIN = 4.5V

VIN = 5.5V

I

LOAD

= 400mA

VIN = 5V

TIME (min)

0

0

I

BAT

(mA)

100

200

300

400

500

600

0

V

BAT

AND V

CHRG

(V)

1

2

3

4

5

6

50 100 150 200

4085 G11

400mAhr CELL
V

IN

= 5V

R

PROG

= 100k

R

CLPROG

= 2.1k

C/10

TERMINATION

CHRG

V

BAT

I

BAT

V

BAT

(V)

0

0

I

BAT

(mA)

100

300

400

500

1

2

2.5 4.5

4085 G13

200

0.5 1.5

3

3.5

4

600

VIN = 5V
V

OUT

= NO LOAD

R

PROG

= 100k

R

CLPROG

= 2k

HPWR = 5V

V

BAT

(V)

0

0

I

BAT

(mA)

20

60

80

100

1

2

2.5 4.5

4085 G14

40

0.5 1.5

3

3.5

4

120

VIN = 5V
V

OUT

= NO LOAD

R

PROG

= 100k

R

CLPROG

= 2k

HPWR = 0V

V

FWD

(mV)

0

0

I

OUT

(mA)

100

300

400

500

1000

700

50

100

4085 G15

200

800

900

600

150

200

V

BAT

= 3.7V

V

IN

= 0V

–50°C

0°C

50°C

100°C

V

FWD

(mV)

0

0

I

OUT

(mA), R

DIO

(mΩ)

100

300

400

500

1000

700

50

100

4085 G16

200

800

900

600

150

200

V

BAT

= 3.7V

V

IN

= 0V

R

DIO

I

OUT

0

3000

4000

5000

80

4085 G17

2000

1000

2500

3500

4500

1500

500

0

20

40

60

100

V

FWD

(mV)

I

OUT

(mA)

V

BAT

= 3.7V

V

IN

= 0V

Si2333 PFET

–50°C

0°C

50°C

100°C

0

3000

4000

5000

80

2000

1000

2500

3500

4500

1500

500

0

20

40

60

100

V

FWD

(mV)

I

OUT

(mA)

V

BAT

= 3.7V

V

IN

= 0V

Si2333 PFET

Input RON vs Temperature

Battery Current and Voltage
vs Time

Charge Current vs Temperature
(Thermal Regulation)

Charging from USB, I

BAT

vs V

BAT

Charging from USB, Low Power,
I

BAT

vs V

BAT

Ideal Diode Current vs Forward
Voltage and Temperature
(No External Device)

Ideal Diode Resistance and
Current vs Forward Voltage
(No External Device)

Ideal Diode Current vs Forward
Voltage and Temperature with
External Device

Ideal Diode Resistance and
Current vs Forward Voltage with
External Device

TYPICAL PERFOR A CE CHARACTERISTICS

UW

TA = 25°C unless otherwise noted.

LTC4085

7

4085fa

Input Connect Waveforms

Input Disconnect Waveforms

Response to HPWR

Wall Connect Waveforms,
V

IN

= 0V

TYPICAL PERFOR A CE CHARACTERISTICS

UW

TA = 25°C unless otherwise noted.

1ms/DIV

V

IN

5V/DIV

V

OUT

5V/DIV

I

IN

0.5A/DIV
I

BAT

0.5A/DIV

4085 G19

V

BAT

= 3.85V

I

OUT

= 100mA

1ms/DIV

V

IN

5V/DIV

V

OUT

5V/DIV

I

IN

0.5A/DIV
I

BAT

0.5A/DIV

4085 G20

V

BAT

= 3.85V

I

OUT

= 100mA

100µs/DIV

HPWR

5V/DIV

I

IN

0.5A/DIV

I

BAT

0.5A/DIV

4085 G21

V

BAT

= 3.85V

I

OUT

= 50mA

1ms/DIV

WALL

5V/DIV

V

OUT

5V/DIV

I

WALL

0.5A/DIV
I

BAT

0.5A/DIV

4085 G22

V

BAT

= 3.85V

I

OUT

= 100mA

R

PROG

= 100k

1ms/DIV

WALL

5V/DIV

V

OUT

5V/DIV

I

WALL

0.5A/DIV
I

BAT

0.5A/DIV

4085 G23

V

BAT

= 3.85V

I

OUT

= 100mA

R

PROG

= 100k

100µs/DIV

SUSP

5V/DIV

V

OUT

5V/DIV

I

IN

0.5A/DIV

I

BAT

0.5A/DIV

4085 G24

V

BAT

= 3.85V

I

OUT

= 50mA

Wall Disconnect Waveforms,
V

IN

= 0V

Response to Suspend

LTC4085

8

4085fa

PI FU CTIO S

UUU

IN (Pin 1): Input Supply. Connect to USB supply, V

BUS

.
Input current to this pin is limited to either 20% or 100%
of the current programmed by the CLPROG pin as deter­mined by the state of the HPWR pin. Charge current (to
BAT pin) supplied through the input is set to the current
programmed by the PROG pin but will be limited by the
input current limit if charge current is set greater than the
input current limit.

OUT (Pin 2): Voltage Output. This pin is used to provide
controlled power to a USB device from either USB V

BUS

(IN) or the battery (BAT) when the USB is not present.
This pin can also be used as an input for battery charging
when the USB is not present and a wall adapter is applied
to this pin. OUT should be bypassed with at least 4.7μF
to GND.

CLPROG (Pin 3): Current Limit Program and Input Cur­rent Monitor. Connecting a resistor, R

CLPROG

, to ground
programs the input to output current limit. The current
limit is programmed as follows:

IA

V

R

CL

CLPROG

()=

1000

In USB applications the resistor R

CLPROG

should be set

to no less than 2.1k.

The voltage on the CLPROG pin is always proportional to
the current fl owing through the IN to OUT power path.
This current can be calculated as follows:

IA

V

R

IN

CLPROG

CLPROG

() •= 1000

HPWR (Pin 4): High Power Select. This logic input is used
to control the input current limit. A voltage greater than

1.2V on the pin will set the input current limit to 100%
of the current programmed by the CLPROG pin. A volt­age less than 0.4V on the pin will set the input current
limit to 20% of the current programmed by the CLPROG
pin. A 2μA pull-down is internally applied to this pin to
ensure it is low at power up when the pin is not being
driven externally.

SUSP (Pin 5): Suspend Mode Input. Pulling this pin above

1.2V will disable the power path from IN to OUT. The sup­ply current from IN will be reduced to comply with the
USB specifi cation for suspend mode. Both the ability to
charge the battery from OUT and the ideal diode function
(from BAT to OUT) will remain active. Suspend mode will
reset the charge timer if V

OUT

is less than V

BAT

while in

suspend mode. If V

OUT

is kept greater than V

BAT

, such as

when a wall adapter is present, the charge timer will not
be reset when the part is put in suspend. A 2μA pull-down
is internally applied to this pin to ensure it is low at power
up when the pin is not being driven externally.

TIMER (Pin 6): Timer Capacitor. Placing a capacitor, C

TIMER

,

to GND sets the timer period. The timer period is:

t Hours

C R Hours

Fk

TIMER

TIMER PROG

()

••

.•

=

µ

3

0 1 100

Charge time is increased if charge current is reduced
due to undervoltage current limit, load current, thermal
regulation and current limit selection (HPWR).

Shorting the TIMER pin to GND disables the battery
charging functions.

LTC4085

9

4085fa

WALL (Pin 7): Wall Adapter Present Input. Pulling this
pin above 4.25V will disconnect the power path from IN
to OUT. The

⎯A⎯C⎯P⎯

R pin will also be pulled low to indicate

that a wall adapter has been detected.

NTC (Pin 8): Input to the NTC Thermistor Monitoring
Circuits. Under normal operation, tie a thermistor from
the NTC pin to ground and a resistor of equal value from
NTC to V

NTC

. When the voltage on this pin is above

0.74 • V

VNTC

(Cold, 0°C) or below 0.29 • V

VNTC

(Hot, 50°C)
the timer is suspended, but not cleared, the charging is
disabled and the

⎯C⎯H⎯R⎯

G pin remains in its former state.
When the voltage on NTC comes back between 0.74 •
V

VNTC

and 0.29 • V

VNTC

, the timer continues where it
left off and charging is re-enabled if the battery voltage
is below the recharge threshold. There is approximately
3°C of temperature hysteresis associated with each of the
input comparators.

Connect the NTC pin to ground to disable this feature. This
will disable all of the LTC4085 NTC functions.

V

NTC

(Pin 9): Output Bias Voltage for NTC. A resistor from

this pin to the NTC pin will bias the NTC thermistor.

⎯A⎯C⎯P⎯

R (Pin 10): Wall Adapter Present Output. Active low

open drain output pin. A low on this pin indicates that the
wall adapter input comparator has had its input pulled
above the input threshold. This feature is disabled if no
power is present on IN or OUT or BAT (i.e., below UVLO
thresholds).

⎯C⎯H⎯R⎯

G (Pin 11): Open-Drain Charge Status Output. When

the battery is being charged, the

⎯C⎯H⎯R⎯

G pin is pulled low by

an internal N-channel MOSFET. When the timer runs out or

PI FU CTIO S

UUU

the charge current drops below 10% of the programmed
charge current (while in voltage mode) or the input supply
or output supply is removed, the

⎯C⎯H⎯R⎯

G pin is forced to a

high impedance state.

PROG (Pin 12): Charge Current Program. Connecting a
resistor, R

PROG

, to ground programs the battery charge
current. The battery charge current is programmed as
follows:

IA

V

R

CHG

PR

OG

(),=

50 000

GATE (Pin 13): External Ideal Diode Gate Pin. This pin
can be used to drive the gate of an optional external PFET
connected between BAT and OUT. By doing so, the im­pedance of the ideal diode between BAT and OUT can be
reduced. When not in use, this pin should be left fl oating.
It is important to maintain a high impedance on this pin
and minimize all leakage paths.

BAT (Pin 14): Connect to a single cell Li-Ion battery. This
pin is used as an output when charging the battery and
as an input when supplying power to OUT. When the OUT
pin potential drops below the BAT pin potential, an ideal
diode function connects BAT to OUT and prevents V

OUT

from dropping signifi cantly below V

BAT

. A precision internal
resistor divider sets the fi nal fl oat (charging) potential on
this pin. The internal resistor divider is disconnected when
IN and OUT are in undervoltage lockout.

Exposed Pad (Pin 15): Ground. The exposed package pad
is ground and must be soldered to the PC board for proper
functionality and for maximum heat transfer.

LTC4085

10

4085fa

BLOCK DIAGRA

W

+
–

+

–

+
–

+
–

+
–

+
–

+

–

+

–

+
–

+
–

+

–

+

–

CC/CV REGULATOR

CHARGER

ENABLE

ENABLE

CURRENT LIMIT

ILIM_CNTL

V

BUS

IN

SOFT_START

SOFT_START2

CURRENT_CONTROL

0.25V

2.8V
BATTERY UVLO

4.1V
RECHARGE

TIMER

OSCILLATOR

COUNTER

STOP

CHRG

EOC

CONTROL_LOGIC

RESET

HOLD

RECHRG

BAT_UV

VOLTAGE_DETECT

IN OUT BAT

CHARGE_CONTROL

100k

100k

NTC_ENABLE

2C0LD

2HOT

NTC

NTCERR

GND SUSP

+
–

+

–

100k

2k

OUT

GATE

BAT

EDA

IDEAL_DIODE

25mV

25mV

CLK

C/10

ILIM

CL

1V

1000

500mA/100mA

2µA

CLPROG

HPWR

TA

DIE TEMP

105°C

1V

CHG

PROG

+

–

25mV

ACPR

4.25V

WALL

V

NTC

NTC

0.1V

2µA

4085 BD

3

4

1

12

7

10

9

8

11

6

2

13

14

I

CHRG

UVLO

I

IN

LTC4085

11

4085fa

OPERATIO

U

The LTC4085 is a complete PowerPath controller for bat­tery powered USB applications. The LTC4085 is designed
to receive power from a USB source, a wall adapter, or a
battery. It can then deliver power to an application con­nected to the OUT pin and a battery connected to the
BAT pin (assuming that an external supply other than the
battery is present). Power supplies that have limited cur­rent resources (such as USB V

BUS

supplies) should be
connected to the IN pin which has a programmable current
limit. Battery charge current will be adjusted to ensure that
the sum of the charge current and load current does not
exceed the programmed input current limit.

An ideal diode function provides power from the battery
when output/load current exceeds the input current limit or
when input power is removed. Powering the load through
the ideal diode instead of connecting the load directly to
the battery allows a fully charged battery to remain fully
charged until external power is removed. Once external
power is removed the output drops until the ideal diode is
forward biased. The forward biased ideal diode will then
provide the output power to the load from the battery.

Furthermore, powering switching regulator loads from the
OUT pin (rather than directly from the battery) results in
shorter battery charge times. This is due to the fact that
switching regulators typically require constant input power.
When this power is drawn from the OUT pin voltage (rather
than the lower BAT pin voltage) the current consumed
by the switching regulator is lower leaving more current
available to charge the battery.

The LTC4085 also has the ability to receive power from
a wall adapter. Wall adapter power can be connected to
the output (load side) of the LTC4085 through an external
device such as a power Schottky or FET, as shown in
Figure 1. The LTC4085 has the unique ability to use the
output, which is powered by the wall adapter, as a path
to charge the battery while providing power to the load. A
wall adapter comparator on the LTC4085 can be confi gured
to detect the presence of the wall adapter and shut off the
connection to the USB to prevent reverse conduction out
to the USB bus.

LTC4085

12

4085fa

OPERATIO

U

–

+

–

+

7

WALL

4.25V

(RISING)

3.15V

(FALLING)

75mV (RISING)
25mV (FALLING)

1 2

10

14

IN

USB V

BUS

WALL

ADAPTER

OUT

BAT

4085 F01

CURRENT LIMIT

CONTROL

ENABLE

CHRG

CONTROL

IDEAL
DIODE

Li-Ion

LOAD

+
–

ACPR

+

Figure 1: Simplifi ed Block Diagram—PowerPath

LTC4085

13

4085fa

OPERATIO

U

WALL PRESENT SUSPEND VIN > 3.8V VIN > (V

OUT

+ 100mV) VIN > (V

BAT

+ 100mV) CURRENT LIMIT ENABLED

YXX X X N

XYX X X N

XXNX X N

XXX N X N

XXX X N N

NNY Y Y Y

Table 1. Operating Modes—PowerPath States
Current Limited Input Power (IN to OUT)

Battery Charger (OUT to BAT)

WALL PRESENT SUSPEND V

OUT

> 4.35V V

OUT

> (V

BAT

+ 100mV) CHARGER ENABLED

XXN X N

XXX N N

XXYYY

Ideal Diode (BAT to OUT)

WALL PRESENT SUSPEND V

IN

V

BAT

> V

OUT

V

BAT

> 2.8V DIODE ENABLED

XXXXNN

XXXNXN

XXXYYY

Operating Modes—Pin Currents vs Programmed Currents (Powered from IN)

PROGRAMMING OUTPUT CURRENT BATTERY CURRENT INPUT CURRENT

I

CL

= I

CHG

I

OUT

< I

CL

I

OUT

= I

CL = ICHG

I

OUT

> I

CL

I

BAT

= ICL – I

OUT

I

BAT

= 0

I

BAT

= ICL – I

OUT

IIN = IQ + I

CL

IIN = IQ + I

CL

IIN = IQ + I

CL

ICL > I

CHG

I

OUT

< (ICL – I

CHG

)

I

OUT

> (ICL – I

CHG

)

I

OUT

= I

CL

I

OUT

> I

CL

I

BAT

= I

CHG

I

BAT

= ICL – I

OUT

I

BAT

= 0

I

BAT

= ICL – I

OUT

IIN = IQ + I

CHG

+ I

OUT

IIN = IQ + I

CL

IIN = IQ + I

CL

IIN = IQ + I

CL

ICL < I

CHG

I

OUT

< I

CL

I

OUT

> I

CL

I

BAT

= ICL – I

OUT

I

BAT

= ICL – I

OUT

IIN = IQ + I

CL

IIN = IQ + I

CL

LTC4085

14

4085fa

USB Current Limit and Charge Current Control

The current limit and charger control circuits of the
LTC4085 are designed to limit input current as well as
control battery charge current as a function of I

OUT

. The

programmed current limit, I

CL,

is defi ned as:

I

R

V

V

R

CL

CLPROG

CLPROG

CLPROG

=

⎛
⎝

⎜

⎞
⎠

⎟

=

1000 1000

•

The programmed battery charge current, I

CHG

, is defi ned

as:

I

R

V

V

R

CHG

PROG

PROG

PROG

=

⎛
⎝

⎜

⎞
⎠

⎟

=

50 000 50 000,

•

,

Input current, IIN, is equal to the sum of the BAT pin output
current and the OUT pin output current:

I

IN

= I

OUT

+ I

BAT

The current limiting circuitry in the LTC4085 can and should
be confi gured to limit current to 500mA for USB applica­tions (selectable using the HPWR pin and programmed
using the CLPROG pin).

The LTC4085 reduces battery charge current such that the
sum of the battery charge current and the load current
does not exceed the programmed input current limit (one­fi fth of the programmed input current limit when HPWR
is low, see Figure 2). The battery charge current goes to
zero when load current exceeds the programmed input
current limit (one-fi fth of the limit when HPWR is low). If
the load current is greater than the current limit, the output
voltage will drop to just under the battery voltage where
the ideal diode circuit will take over and the excess load
current will be drawn from the battery.

I

LOAD

(mA)

0

CURRENT (mA)

300

400

600

500

I

IN

400

4085 F02a

200

100

–100

0

100

200

300

600500

I

LOAD

I

BAT

CHARGING

I

BAT

(IDEAL DIODE)

I

LOAD

(mA)

0

CURRENT (mA)

60

80

120

100

I

IN

80

4085 F02b

40

20

–20

0

20

40

60

120100

I

LOAD

I

BAT

CHARGING

I

BAT

(IDEAL DIODE)

I

LOAD

(mA)

0

CURRENT (mA)

300

400

600

500

I

IN

400

4085 F02c

200

100

–100

0

100

200

300

600500

I

LOAD

I

BAT

CHARGING

I

BAT

(IDEAL DIODE)

I

BAT

= I

CHG

I

BAT

= ICL – I

OUT

(2a) High Power Mode/Full Charge

R

PROG

= 100k and R

CLPROG

= 2k

(2b) Low Power Mode/Full Charge

R

PROG

= 100k and R

CLPROG

= 2k

(2c) High Power Mode with

I

CL

= 500mA and I

CHG

= 250mA

R

PROG

= 100k and R

CLPROG

= 2k

Figure 2: Input and Battery Currents as a Function of Load Current

OPERATIO

U

LTC4085

15

4085fa

Programming Current Limit

The formula for input current limit is:

I

R

V

V

R

CL

CLPROG

CLPROG

CLPROG

=

⎛
⎝

⎜

⎞
⎠

⎟

=

1000 1000

•

where V

CLPROG

is the CLPROG pin voltage and R

CLPROG

is the total resistance from the CLPROG pin to ground.

For example, if typical 500mA current limit is required,
calculate:

R

V

mA

k

CLPROG

==

1

500

1000 2•

In USB applications, the minimum value for R

CLPROG

should be 2.1k. This will prevent the application current
from exceeding 500mA due to LTC4085 tolerances and
quiescent currents. A 2.1k CLPROG resistor will give
a typical current limit of 476mA in high power mode
(HPWR = 1) or 95mA in low power mode (HPWR = 0).

V

CLPROG

will track the input current according to the fol-

lowing equation:

I

V

R

IN

CLPROG

CLPROG

= • 1000

For best stability over temperature and time, 1% metal
fi lm resistors are recommended.

Ideal Diode from BAT to OUT

The LTC4085 has an internal ideal diode as well as a
controller for an optional external ideal diode. If a battery
is the only power supply available or if the load current
exceeds the programmed input current limit, then the
battery will automatically deliver power to the load via an
ideal diode circuit between the BAT and OUT pins. The
ideal diode circuit (along with the recommended 4.7μF
capacitor on the OUT pin) allows the LTC4085 to handle
large transient loads and wall adapter or USB V

BUS

con­nect/disconnect scenarios without the need for large bulk
capacitors. The ideal diode responds within a few micro-

seconds and prevents the OUT pin voltage from dropping
signifi cantly below the BAT pin voltage. A comparison of
the I-V curve of the ideal diode and a Schottky diode can
be seen in Figure 3.

If the input current increases beyond the programmed
input current limit additional current will be drawn from the
battery via the internal ideal diode. Furthermore, if power to
IN (USB V

BUS

) or OUT (external wall adapter) is removed,

then all of the application power will be provided by the
battery via the ideal diode. A 4.7μF capacitor at OUT is
sufficient to keep a transition from input power to battery
power from causing significant output voltage droop. The
ideal diode consists of a precision amplifier that enables a
large P-Channel MOSFET transistor whenever the voltage
at OUT is approximately 20mV (V

FWD

) below the voltage at

BAT. The resistance of the internal ideal diode is approxi­mately 200mΩ. If this is sufficient for the application then
no external components are necessary. However, if more
conductance is needed, an external PFET can be added from
BAT to OUT. The GATE pin of the LTC4085 drives the gate
of the PFET for automatic ideal diode control. The source
of the external PFET should be connected to OUT and the
drain should be connected to BAT. In order to help protect
the external PFET in over-current situations, it should be
placed in close thermal contact to the LTC4085.

OPERATIO

U

FORWARD VOLTAGE (V)

(BAT-OUT)

CURRENT (A)

SCHOTTKY

DIODE

SLOPE: 1/R

DIO(ON)

I

MAX

V

FWD

4085 F03

Figure 3. LTC4085 Schottky Diode vs Forward Voltage Drop

LTC4085

16

4085fa

Battery Charger

The battery charger circuits of the LTC4085 are designed
for charging single cell lithium-ion batteries. Featuring
an internal P-channel power MOSFET, the charger uses a
constant-current/constant-voltage charge algorithm with
programmable current and a programmable timer for
charge termination. Charge current can be programmed
up to 1.5A. The fi nal fl oat voltage accuracy is ±0.8% typi­cal. No blocking diode or sense resistor is required when
powering the IN pin. The

⎯C⎯H⎯R⎯

G open-drain status output
provides information regarding the charging status of the
LTC4085 at all times. An NTC input provides the option of
charge qualifi cation using battery temperature.

An internal thermal limit reduces the programmed charge
current if the die temperature attempts to rise above a
preset value of approximately 105°C. This feature protects
the LTC4085 from excessive temperature, and allows the
user to push the limits of the power handling capability of a
given circuit board without risk of damaging the LTC4085.
Another benefi t of the LTC4085 thermal limit is that charge
current can be set according to typical, not worst-case,
ambient temperatures for a given application with the
assurance that the charger will automatically reduce the
current in worst-case conditions.

The charge cycle begins when the voltage at the OUT pin
rises above the output UVLO level and the battery voltage
is below the recharge threshold. No charge current actually
fl ows until the OUT voltage is greater than the output UVLO
level and 100mV above the BAT voltage. At the beginning
of the charge cycle, if the battery voltage is below 2.8V,
the charger goes into trickle charge mode to bring the
cell voltage up to a safe level for charging. The charger
goes into the fast charge constant-current mode once
the voltage on the BAT pin rises above 2.8V. In constant-

current mode, the charge current is set by R

PROG

. When
the battery approaches the fi nal fl oat voltage, the charge
current begins to decrease as the LTC4085 switches to
constant-voltage mode. When the charge current drops
below 10% of the programmed charge current while in
constant-voltage mode the

⎯C⎯H⎯R⎯

G pin assumes a high

impedance state.

An external capacitor on the TIMER pin sets the total
minimum charge time. When this time elapses the
charge cycle terminates and the

⎯C⎯H⎯R⎯

G pin assumes a
high impedance state, if it has not already done so. While
charging in constant-current mode, if the charge current
is decreased by thermal regulation or in order to maintain
the programmed input current limit the charge time is
automatically increased. In other words, the charge time
is extended inversely proportional to charge current de­livered to the battery. For Li-Ion and similar batteries that
require accurate fi nal fl oat potential, the internal bandgap
reference, voltage amplifi er and the resistor divider provide
regulation with ±0.8% accuracy.

Trickle Charge and Defective Battery Detection

At the beginning of a charge cycle, if the battery voltage
is low (below 2.8V) the charger goes into trickle charge
reducing the charge current to 10% of the full-scale cur­rent. If the low battery voltage persists for one quarter
of the total charge time, the battery is assumed to be
defective, the charge cycle is terminated and the

⎯C⎯H⎯R⎯

G
pin output assumes a high impedance state. If for any
reason the battery voltage rises above ~2.8V the charge
cycle will be restarted. To restart the charge cycle (i.e. when
the dead battery is replaced with a discharged battery),
simply remove the input voltage and reapply it or cycle
the TIMER pin to 0V.

OPERATIO

U

LTC4085

17

4085fa

Programming Charge Current

The formula for the battery charge current is:

II

V

R

CHG PROG

PROG

PROG

=

()

=•, •,50 000 50 000

where V

PROG

is the PROG pin voltage and R

PROG

is the
total resistance from the PROG pin to ground. Keep in
mind that when the LTC4085 is powered from the IN pin,
the programmed input current limit takes precedent over
the charge current. In such a scenario, the charge current
cannot exceed the programmed input current limit.

For example, if typical 500mA charge current is required,
calculate:

R

V

mA

k

PROG

=

⎛
⎝

⎜

⎞
⎠

⎟

=

1

500

50 000 100•,

For best stability over temperature and time, 1% metal
fi lm resistors are recommended. Under trickle charge
conditions, this current is reduced to 10% of the full­scale value.

The Charge Timer

The programmable charge timer is used to terminate the
charge cycle. The timer duration is programmed by an
external capacitor at the TIMER pin. The charge time is
typically:

t Hours

C R Hours

Fk

TIMER

TIMER PROG

()

••

.•

=

µ30 1 100

The timer starts when an input voltage greater than the
undervoltage lockout threshold level is applied or when
leaving shutdown and the voltage on the battery is less than
the recharge threshold. At power up or exiting shutdown
with the battery voltage less than the recharge threshold
the charge time is a full cycle. If the battery is greater than
the recharge threshold the timer will not start and charging
is prevented. If after power-up the battery voltage drops
below the recharge threshold or if after a charge cycle the
battery voltage is still below the recharge threshold the
charge time is set to one half of a full cycle.

The LTC4085 has a feature that extends charge time au­tomatically. Charge time is extended if the charge current
in constant-current mode is reduced due to load current
or thermal regulation. This change in charge time is in­versely proportional to the change in charge current. As
the LTC4085 approaches constant-voltage mode the charge
current begins to drop. This change in charge current is
due to normal charging operation and does not affect the
timer duration.

Once a time-out occurs and the voltage on the battery is
greater than the recharge threshold, the charge current
stops, and the CHRG output assumes a high impedance
state if it has not already done so.

Connecting the TIMER pin to ground disables the battery
charger.

OPERATIO

U

LTC4085

18

4085fa

⎯C⎯H⎯R⎯

G Status Output Pin

When the charge cycle starts, the

⎯C⎯H⎯R⎯

G pin is pulled to
ground by an internal N-channel MOSFET capable of driving
an LED. When the charge current drops below 10% of the
programmed full charge current while in constant-voltage
mode, the pin assumes a high impedance state (but charge
current continues to fl ow until the charge time elapses).
If this state is not reached before the end of the program­mable charge time, the pin will assume a high impedance
state when a time-out occurs. The

⎯C⎯H⎯R⎯

G current detection

threshold can be calculated by the following equation:

I

V

R

V

R

DETECT

PROG PROG

==

01

50 000

5000.

•,

For example, if the full charge current is programmed
to 500mA with a 100k PROG resistor the

⎯C⎯H⎯R⎯

G pin will

change state at a battery charge current of 50mA.

Note: The end-of-charge (EOC) comparator that moni­tors the charge current latches its decision. Therefore,
the fi rst time the charge current drops below 10% of the
programmed full charge current while in constant-volt­age mode will toggle

⎯C⎯H⎯R⎯

G to a high impedance state.
If, for some reason, the charge current rises back above
the threshold the

⎯C⎯H⎯R⎯

G pin will not resume the strong
pull-down state. The EOC latch can be reset by a recharge
cycle (i.e. V

BAT

drops below the recharge threshold) or

toggling the input power to the part.

Current Limit Undervoltage Lockout

An internal undervoltage lockout circuit monitors the
input voltage and disables the input current limit circuits
until V

IN

rises above the undervoltage lockout threshold.
The current limit UVLO circuit has a built-in hysteresis of
125mV. Furthermore, to protect against reverse current in
the power MOSFET, the current limit UVLO circuit disables
the current limit (i.e. forces the input power path to a high
impedance state) if V

OUT

exceeds VIN. If the current limit
UVLO comparator is tripped, the current limit circuits will
not come out of shutdown until V

OUT

falls 50mV below

the V

IN

voltage.

Charger Undervoltage Lockout

An internal undervoltage lockout circuit monitors the V

OUT

voltage and disables the battery charger circuits until V

OUT

rises above the undervoltage lockout threshold. The battery
charger UVLO circuit has a built-in hysteresis of 125mV.
Furthermore, to protect against reverse current in the power
MOSFET, the charger UVLO circuit keeps the charger shut
down if V

BAT

exceeds V

OUT

. If the charger UVLO comparator
is tripped, the charger circuits will not come out of shut
down until V

OUT

exceeds V

BAT

by 50mV.

Suspend

The LTC4085 can be put in suspend mode by forcing the
SUSP pin greater than 1V. In suspend mode the ideal diode
function from BAT to OUT is kept alive. If power is applied
to the OUT pin externally (i.e., a wall adapter is present)
then charging will be unaffected. Current drawn from the
IN pin is reduced to 50μA. Suspend mode is intended to
comply with the USB power specifi cation mode of the
same name.

NTC Thermistor

The battery temperature is measured by placing a negative
temperature coeffi cient (NTC) thermistor close to the bat­tery pack. The NTC circuitry is shown in Figure 4. To use
this feature, connect the NTC thermistor (R

NTC

) between

the NTC pin and ground and a resistor (R

NOM

) from the

NTC pin to V

NTC

. R

NOM

should be a 1% resistor with a
value equal to the value of the chosen NTC thermistor at
25°C (this value is 10k for a Vishay NTHS0603N02N1002J
thermistor). The LTC4085 goes into hold mode when the
resistance (R

HOT

) of the NTC thermistor drops to 0.41

times the value of R

NOM

or approximately 4.1k, which
should be at 50°C. The hold mode freezes the timer and
stops the charge cycle until the thermistor indicates a
return to a valid temperature. As the temperature drops,
the resistance of the NTC thermistor rises. The LTC4085 is
designed to go into hold mode when the value of the NTC
thermistor increases to 2.82 times the value of R

NOM

. This

resistance is R

COLD

. For a Vishay NTHS0603N02N1002J
thermistor, this value is 28.2k which corresponds to ap­proximately 0°C. The hot and cold comparators each have
approximately 3°C of hysteresis to prevent oscillation
about the trip point. Grounding the NTC pin can disable
the NTC function.

OPERATIO

U

LTC4085

19

4085fa

–

+

–

+

R

NOM

10k

R

NTC

10k

NTC

V

NTC

9

0.1V

NTC_ENABLE

4085 F04a

LTC4085

TOO_COLD

TOO_HOT

0.74 • V

NTC

0.29 • V

NTC

–

+

8

–

+

–

+

R

NOM

121k

R

NTC

100k

R1

13.3k

NTC

V

NTC

9

0.1V

NTC_ENABLE

4085 F04b

TOO_COLD

TOO_HOT

0.74 • V

NTC

0.29 • V

NTC

–

+

8

LTC4085

(4a) (4b)

Figure 4. NTC Circuits

Thermistors

The LTC4085 NTC trip points were designed to work
with thermistors whose resistance-temperature charac­teristics follow Vishay Dale’s “R-T Curve 2”. The Vishay
NTHS0603N02N1002J is an example of such a thermistor.
However, Vishay Dale has many thermistor products that
follow the “R-T Curve 2” characteristic in a variety of sizes.
Furthermore, any thermistor whose ratio of R

COLD

to R

HOT

is about 7.0 will also work (Vishay Dale R-T Curve 2 shows
a ratio of R

COLD

to R

HOT

of 2.815/0.4086 = 6.89).

Power conscious designs may want to use thermistors
whose room temperature value is greater than 10k. Vishay
Dale has a number of values of thermistor from 10k to 100k
that follow the “R-T Curve 2”. Using these as indicated
in the NTC Thermistor section will give temperature trip
points of approximately 3°C and 47°C, a delta of 44°C. This
delta in temperature can be moved in either direction by
changing the value of R

NOM

with respect to R

NTC

. Increasing

R

NOM

will move both trip points to lower temperatures.

Likewise a decrease in R

NOM

with respect to R

NTC

will
move the trip points to higher temperatures. To calculate
R

NOM

for a shift to lower temperature for example, use

the following equation:

R

R

RatC

NOM

COLD

NTC

=°

2 815

25

.

•

where R

COLD

is the resistance ratio of R

NTC

at the desired
cold temperature trip point. If you want to shift the trip points
to higher temperatures use the following equation:

R

R

RatC

NOM

HOT

NTC

=°

0 4086

25

.

•

where R

HOT

is the resistance ratio of R

NTC

at the desired

hot temperature trip point.

Here is an example using a 100k R-T Curve 1 thermistor
from Vishay Dale. The difference between the trip points
is 44°C, from before, and we want the cold trip point to
be 0°C, which would put the hot trip point at 44°C. The
R

NOM

needed is calculated as follows:

R

R

RatC

k

NOM

COLD

NTC

=°

==

2 815

25

3 266
2 815

100

.

•

.
.

•1116k

APPLICATIO S I FOR ATIO

WUUU

LTC4085

20

4085fa

The nearest 1% value for R

NOM

is 115K. This is the value
used to bias the NTC thermistor to get cold and hot trip
points of approximately 0°C and 44°C respectively. To ex­tend the delta between the cold and hot trip points a resistor
(R1) can be added in series with R

NTC

. (see Figure 3b).

The values of the resistors are calculated as follows:

R

RR

R

NOM

COLD HOT

=

=

–

.–.

.

.–

2 815 0 4086

1

0 4086

2 815 0

..

•––

4086

⎛
⎝

⎜

⎞
⎠

⎟

()

RRR

COLD HOT HOT

where R

NOM

is the value of the bias resistor, R

HOT

and

R

COLD

are the values of R

NTC

at the desired temperature
trip points. Continuing the example from before with a
desired hot trip point of 50°C:

R

RR

k

NOM

COLD HOT

==

–

.–.

•. –.

2 815 0 4086

100 3 266 0 36

002

2 815 0 4086

120 8 121 1

110

()

=

=

.–.

., %k k nearest

R

00

0 4086

2 815 0 4086

3 266 0 3602k•

.

.–.

•. –.

⎛
⎝

⎜

⎞
⎠

⎟

()

––.

., . %

0 3602

13 3 13 3 1

⎡
⎣

⎢

⎤
⎦

⎥

= k k is nearest

The fi nal solution is as shown in Figure 3b where
R

NOM

= 121k, R1 = 13.3k and R

NTC

= 100k at 25°C

Using the WALL Pin to Detect the Presence of a Wall
Adapter

The WALL input pin identifi es the presence of a wall
adapter (the pin should be tied directly to the adapter
output voltage). This information is used to disconnect the
input pin, IN, from the OUT pin in order to prevent back
conduction to whatever may be connected to the input.
It also forces the

⎯A⎯C⎯P⎯

R pin low when the voltage at the
WALL pin exceeds the input threshold. In order for the
presence of a wall adapter to be acknowledged, both of
the following conditions must be satisfi ed:

1. The WALL pin voltage exceeds V

WAR

(approximately

4.25V); and

2. The WALL pin voltage exceeds V

WDR

(approximately

75mV above V

BAT

)

The input power path (between IN and OUT) is re-enabled
and the

⎯A⎯C⎯P⎯

R pin assumes a high impedance state when

either of the following conditions is met:

1.

The WALL pin voltage falls below V

WDF

(approximately

25mV above V

BAT

); or

2.

The WALL pin voltage falls below V

WAF

(approximately

3.12V)

Each of these thresholds is suitably fi ltered in time to
prevent transient glitches on the WALL pin from falsely
triggering an event.

Power Dissipation

The conditions that cause the LTC4085 to reduce charge
current due to the thermal protection feedback can be
approximated by considering the power dissipated in the
part. For high charge currents and a wall adapter applied to
V

OUT

, the LTC4085 power dissipation is approximately:

P

D

= (V

OUT

– V

BAT

) • I

BAT

Where, PD is the power dissipated, V

OUT

is the supply

voltage, V

BAT

is the battery voltage, and I

BAT

is the battery
charge current. It is not necessary to perform any worst­case power dissipation scenarios because the LTC4085
will automatically reduce the charge current to maintain
the die temperature at approximately 105°C. However, the
approximate ambient temperature at which the thermal
feedback begins to protect the IC is:

T

A

= 105°C – PD • θ

JA

TA = 105°C – (V

OUT

– V

BAT

) • I

BAT

• θ

JA

APPLICATIO S I FOR ATIO

WUUU

LTC4085

21

4085fa

Example: Consider an LTC4085 operating from a wall
adapter with 5V at V

OUT

providing 0.8A to a 3V Li-Ion
battery. The ambient temperature above which the
LTC4085 will begin to reduce the 0.8A charge current, is
approximately

T

A

= 105°C – (5V – 3V) • 0.8A • 37°C/W

T

A

= 105°C – 1.6W • 37°C/W = 105°C – 59°C = 46°C

The LTC4085 can be used above 46°C, but the charge
current will be reduced below 0.8A. The charge current at
a given ambient temperature can be approximated by:

I

CT

VV

BAT

A

OUT BAT JA

=

°

()

105 –

–•θ

Consider the above example with an ambient temperature
of 55°C. The charge current will be reduced to approxi­mately:

I

CC

VV CWCCA

A

BAT

=

°°

()

°

=

°

°

=

105 55

53 375074

0 675

–

–• / /

.

Board Layout Considerations

In order to be able to deliver maximum charge current
under all conditions, it is critical that the Exposed Pad on
the backside of the LTC4085 package is soldered to the

board. Correctly soldered to a 2500mm

2

double-sided
1oz. copper board the LTC4085 has a thermal resistance
of approximately 37°C/W. Failure to make thermal contact
between the Exposed Pad on the backside of the package
and the copper board will result in thermal resistances far
greater than 37°C/W. As an example, a correctly soldered
LTC4085 can deliver over 1A to a battery from a 5V supply
at room temperature. Without a backside thermal connec­tion, this number could drop to less than 500mA.

V

IN

and Wall Adapter Bypass Capacitor

Many types of capacitors can be used for input bypassing.
However, caution must be exercised when using multilayer
ceramic capacitors. Because of the self resonant and high
Q characteristics of some types of ceramic capacitors, high
voltage transients can be generated under some start-up
conditions, such as connecting the charger input to a hot
power source. For more information, refer to Application
Note 88.

Stability

The constant-voltage mode feedback loop is stable without
any compensation when a battery is connected. However,
a 4.7µF capacitor with a 1Ω series resistor to GND is
recommended at the BAT pin to keep ripple voltage low
when the battery is disconnected.

APPLICATIO S I FOR ATIO

WUUU

LTC4085

22

4085fa

U

TYPICAL APPLICATIO

USB Power Control Application with Wall Adapter Input

IN

SUSP

HPWR

SUSPEND USB POWER

500mA/100mA SELECT

OUT

PROG

LTC4085

CLPROG

GND

BAT

GATE

V

NTC

NTC

Li-Ion
CELL

TO LDOs
REGs, ETC

CHRG

ACPR

WALL

TIMER

0.15µF

4085 TA02

R

NTCBIAS

10k

R

NTC

10k

510Ω

R

PROG

71.5k

*SERIES 1Ω RESISTOR ONLY
NEEDED FOR INDUCTIVE
INPUT SUPPLIES

R

CLPROG

2.1k

+

4.7µF

4.7µF

510Ω1k

5V WALL

ADAPTER

INPUT

5V (NOM)

FROM USB

CABLE V

BUS

1Ω*

4.7µF

1Ω*

LTC4085

23

4085fa

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

U

PACKAGE DESCRIPTIO

DE Package

14-Lead Plastic DFN (4mm × 3mm)

(Reference LTC DWG # 05-08-1708 Rev B)

3.00 ±0.10

(2 SIDES)

4.00 ±0.10

(2 SIDES)

NOTE:

1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
PACKAGE OUTLINE MO-229

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE

0.40 ± 0.10

BOTTOM VIEW—EXPOSED PAD

1.70 ± 0.10

0.75 ±0.05

R = 0.115

TYP

R = 0.05

TYP

3.00 REF

1.70 ± 0.05

17

148

PIN 1

TOP MARK

(SEE NOTE 6)

0.200 REF

0.00 – 0.05

(DE14) DFN 0806 REV B

PIN 1 NOTCH
R = 0.20 OR

0.35 × 45°
CHAMFER

3.00 REF

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

2.20 ±0.05

0.70 ±0.05

3.60 ±0.05

PACKAGE
OUTLINE

0.25 ± 0.05

0.25 ± 0.05

0.50 BSC

3.30 ±0.05

3.30 ±0.10

0.50 BSC

LTC4085

24

4085fa

RELATED PARTS

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

[phone] ● FAX: [phone]

●

www.linear.com

© LINEAR TECHNOLOGY CORPORATION 2006

LT 1006 REV A • PRINTED IN USA

PART NUMBER DESCRIPTION COMMENTS

Battery Chargers

LTC1733 Monolithic Lithium-Ion Linear Battery Charger Standalone Charger with Programmable Timer, Up to 1.5A Charge Current

LTC1734 Lithium-Ion Linear Battery Charger in ThinSOT

TM

Simple ThinSOT Charger, No Blocking Diode, No Sense Resistor Needed

LTC1734L Lithium-Ion Linear Battery Charger in ThinSOT Low Current Version of LTC1734; 50mA ≤ I

CHRG

≤ 180mA

LTC4002 Switch Mode Lithium-Ion Battery Charger Standalone, 4.7V ≤ VIN ≤ 24 V, 500kHz Frequency, 3 Hour Charge Termination

LTC4052 Monolithic Lithium-Ion Battery Pulse Charger No Blocking Diode or External Power FET Required, ≤ 1.5A Charge Current

LTC4053 USB Compatible Monolithic Li-Ion Battery Charger Standalone Charger with Programmable Timer, Up to 1.25A Charge Current

LTC4054 Standalone Linear Li-Ion Battery Charger

with Integrated Pass Transistor in ThinSOT

Thermal Regulation Prevents Overheating, C/10 Termination,
C/10 Indicator, Up to 800mA Charge Current

LTC4057 Lithium-Ion Linear Battery Charger Up to 800mA Charge Current, Thermal Regulation, ThinSOT Package

LTC4058 Standalone 950mA Lithium-Ion Charger in DFN C/10 Charge Termination, Battery Kelvin Sensing, ±7% Charge Accuracy

LTC4059 900mA Linear Lithium-Ion Battery Charger 2mm × 2mm DFN Package, Thermal Regulation, Charge Current Monitor Output

LTC4065/LTC4065A Standalone Li-Ion Battery Chargers in 2 × 2 DFN 4.2V, ±0.6% Float Voltage, Up to 750mA Charge Current, 2mm × 2mm DFN,

“A” Version has

⎯A⎯C⎯P⎯

R Function.

LTC4411/LTC4412 Low Loss PowerPath Controller in ThinSOT Automatic Switching Between DC Sources, Load Sharing,

Replaces ORing Diodes

Power Management

LTC3405/LTC3405A 300mA (I

OUT

), 1.5 MHz, Synchronous Step-Down

DC/DC Converter

95% Effi ciency, VIN = 2.7V to 6V, V

OUT

= 0.8V, IQ = 20μA, ISD < 1μA,

ThinSOT Package

LTC3406/LTC3406A 600mA (I

OUT

), 1.5 MHz, Synchronous Step-Down

DC/DC Converter

95% Effi ciency, VIN = 2.5V to 5.5V, V

OUT

= 0.6V, IQ = 20μA, ISD < 1μA,

ThinSOT Package

LTC3411 1.25A (I

OUT

), 4 MHz, Synchronous Step-Down

DC/DC Converter

95% Effi ciency, VIN = 2.5V to 5.5V, V

OUT

= 0.8V, IQ = 60μA, ISD < 1μA,

MS10 Package

LTC3440 600mA (I

OUT

), 2 MHz, Synchronous Buck-Boost

DC/DC Converter

95% Effi ciency, VIN = 2.5V to 5.5V, V

OUT

= 2.5V, IQ = 25μA, ISD < 1μA,

MS Package

LTC3455 Dual DC/DC Converter with USB Power Manager

and Li-Ion Battery Charger

Seamless Transition Between Power Souces: USB, Wall Adapter and Battery;
95% Effi cient DC/DC Conversion

LTC4055 USB Power Controller and Battery Charger Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal

Regulation, 200mΩ Ideal Diode, 4mm × 4mm QFN16 Package

LTC4066 USB Power Controller and Battery Charger Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal

Regulation, 50mΩ Ideal Diode, 4mm × 4mm QFN24 Package

ThinSOT is a trademark of Linear Technology Corporation.