The LTC®1778 is a synchronous step-down switching
regulator controller optimized for CPU power. The controller uses a valley current control architecture to deliver
very low duty cycles with excellent transient response
without requiring a sense resistor. Operating frequency is
selected by an external resistor and is compensated for
variations in VIN.
Discontinuous mode operation provides high efficiency
operation at light loads. A forced continuous control pin
reduces noise and RF interference, and can assist secondary winding regulation by disabling discontinuous operation when the main output is lightly loaded.
Fault protection is provided by internal foldback current
limiting, an output overvoltage comparator and optional
short-circuit shutdown timer. Soft-start capability for supply sequencing is accomplished using an external timing
capacitor. The regulator current limit level is user programmable. Wide supply range allows operation from 4V to 36V
at the input and from 0.8V up to (0.9)VIN at the output.
, LTC and LT are registered trademarks of Linear Technology Corporation.
No R
All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5481178, 6100678, 6580258, 5847554, 6304066
is a trademark of Linear Technology Corporation.
SENSE
TYPICAL APPLICATIO
R
ON
1.4MΩ
I
BOOST
LTC1778
INTV
V
SW
BG
PGND
V
ON
IN
TG
CB 0.22µF
D
B
CMDSH-3
CC
+
C
4.7µF
FB
C
C
500pF
C
SS
0.1µF
RUN/SS
I
TH
R
C
20k
SGND
PGOOD
Figure 1. High Efficiency Step-Down Converter
VCC
U
M1
Si4884
M2
Si4874
L1
1.8µH
D1
B340A
+
R2
30.1k
R1
14k
1778 F01a
C
IN
10µF
50V
×3
C
OUT
180µF
4V
×2
V
IN
5V TO 28V
V
OUT
2.5V
10A
Efficiency vs Load Current
100
V
OUT
90
80
EFFICIENCY (%)
70
60
0.01
= 2.5V
0.1
LOAD CURRENT (A)
VIN = 5V
VIN = 25V
1
10
1778 F01b
1778fb
1
Page 2
LTC1778/LTC1778-1
TOP VIEW
GN PACKAGE
16-LEAD PLASTIC SSOP
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RUN/SS
V
ON
V
RNG
FCB
I
TH
SGND
I
ON
V
FB
BOOST
TG
SW
PGND
BG
INTV
CC
V
IN
EXTV
CC
WWWU
ABSOLUTE AXI U RATI GS
(Note 1)
Input Supply Voltage (VIN, ION)................. 36V to –0.3V
Boosted Topside Driver Supply Voltage
(BOOST) ................................................... 42V to –0.3V
SW Voltage .................................................. 36V to –5V
EXTV
, (BOOST – SW), RUN/SS,
CC
PGOOD Voltages....................................... 7V to – 0.3V
FCB, V
I
TH
, V
ON
Voltages .......... INTVCC + 0.3V to –0.3V
RNG
, VFB Voltages...................................... 2.7V to –0.3V
On-TimeION = 30µA, VON = 0V (LTC1778-1)198233268ns
Minimum On-TimeION = 180µA50100ns
= 0.8V–1–2µA
FCB
I
= 15µA, VON = 0V (LTC1778-1)396466536ns
ON
1778fb
Page 3
LTC1778/LTC1778-1
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 15V unless otherwise noted.
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
t
OFF(MIN)
V
SENSE(MAX)
V
SENSE(MIN)
∆V
FB(OV)
V
FB(UV)
V
RUN/SS(ON)
V
RUN/SS(LE)
V
RUN/SS(LT)
I
RUN/SS(C)
I
RUN/SS(D)
V
IN(UVLO)
V
IN(UVLOR)
TG R
UP
TG R
DOWN
BG R
UP
BG R
DOWN
TG t
r
TG t
f
BG t
r
BG t
f
Internal VCC Regulator
V
INTVCC
∆V
LDO(LOADREG)
V
EXTVCC
∆V
EXTVCC
∆V
EXTVCC(HYS)
PGOOD Output (LTC1778 Only)
∆V
FBH
∆V
FBL
∆V
FB(HYS)
V
PGL
Minimum Off-TimeION = 30µA250400ns
Maximum Current Sense ThresholdV
– V
V
PGND
SW
Minimum Current Sense ThresholdV
– V
V
PGND
SW
= 1V, VFB = 0.76V●113133153mV
RNG
V
= 0V, VFB = 0.76V●7993107mV
RNG
V
= INTVCC, VFB = 0.76V●158186214mV
RNG
= 1V, VFB = 0.84V– 67mV
RNG
V
= 0V, VFB = 0.84V– 47mV
RNG
= INTVCC, VFB = 0.84V– 93mV
V
RNG
Output Overvoltage Fault Threshold5.57.59.5%
Output Undervoltage Fault Threshold520600680mV
RUN Pin Start Threshold●0.81.52V
RUN Pin Latchoff Enable ThresholdRUN/SS Pin Rising44.5V
RUN Pin Latchoff ThresholdRUN/SS Pin Falling3.54.2V
Soft-Start Charge CurrentV
Soft-Start Discharge CurrentV
= 0V–0.5–1.2–3µA
RUN/SS
= 4.5V, VFB = 0V0.81.83µA
RUN/SS
Undervoltage LockoutVIN Falling●3.43.9V
Undervoltage Lockout ReleaseVIN Rising●3.54V
TG Driver Pull-Up On ResistanceTG High23Ω
TG Driver Pull-Down On ResistanceTG Low23Ω
BG Driver Pull-Up On ResistanceBG High34Ω
BG Driver Pull-Down On ResistanceBG Low12Ω
TG Rise TimeC
TG Fall TimeC
BG Rise TimeC
BG Fall TimeC
Internal VCC Voltage6V < VIN < 30V, V
Internal VCC Load RegulationICC = 0mA to 20mA, V
EXTVCC Switchover VoltageICC = 20mA, V
EXTVCC Switch Drop VoltageICC = 20mA, V
= 3300pF20ns
LOAD
= 3300pF20ns
LOAD
= 3300pF20ns
LOAD
= 3300pF20ns
LOAD
= 4V●4.755.3V
EXTVCC
= 4V–0.1±2%
EXTVCC
Rising●4.54.7V
EXTVCC
= 5V150300mV
EXTVCC
EXTVCC Switchover Hysteresis200mV
PGOOD Upper ThresholdVFB Rising5.57.59.5%
PGOOD Lower ThresholdVFB Falling–5.5–7.5–9.5%
PGOOD HysteresisVFB Returning12%
PGOOD Low VoltageI
= 5mA0.150.4V
PGOOD
Note 1: Absolute Maximum Ratings are those values beyond which the life of
a device may be impaired.
Note 2: T
dissipation P
is calculated from the ambient temperature TA and power
J
as follows:
D
LTC1778E: TJ = TA + (PD • 130°C/W)
Note 3: The LTC1778 is tested in a feedback loop that adjusts V
a specified error amplifier output voltage (I
).
TH
to achieve
FB
Note 4: The LTC1778E is guaranteed to meet performance specifications from
0°C to 70°C. Specifications over the –40°C to 85°C operating temperature
range are assured by design, characterization and correlation with statistical
process controls. The LTC1778I is guaranteed over the full – 40°C to 125°C
operating temperature range.
1778fb
3
Page 4
LTC1778/LTC1778-1
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Transient Response
Transient Response
(Discontinuous Mode)
Start-Up
V
OUT
50mV/DIV
I
L
5A/DIV
LOAD STEP 0A TO 10A
= 15V
V
IN
V
= 2.5V
OUT
FCB = 0V
FIGURE 9 CIRCUIT
Efficiency vs Load Current
100
DISCONTINUOUS
90
80
70
EFFICIENCY (%)
60
50
0.001
MODE
0.01
LOAD CURRENT (A)
20µs/DIV
= 10V
V
IN
V
OUT
EXTV
FIGURE 9 CIRCUIT
0.1
CONTINUOUS
MODE
= 2.5V
= 5V
CC
1
1778 G03
1778 G01
10
V
OUT
50mV/DIV
I
L
5A/DIV
LOAD STEP 1A TO 10A
= 15V
V
IN
V
= 2.5V
OUT
FCB = INTV
CC
FIGURE 9 CIRCUIT
Efficiency vs Input Voltage
100
FCB = 5V
FIGURE 9 CIRCUIT
95
I
LOAD
90
I
= 10A
LOAD
EFFICIENCY (%)
85
80
0
5101520
INPUT VOLTAGE (V)
20µs/DIV
= 1A
1778 G02
2530
1778 G04
RUN/SS
2V/DIV
V
OUT
1V/DIV
I
L
5A/DIV
VIN = 15V
= 2.5V
V
OUT
R
= 0.25Ω
LOAD
Frequency vs Input Voltage
300
FCB = 0V
FIGURE 9 CIRCUIT
280
260
240
FREQUENCY (kHz)
220
200
5
I
10
INPUT VOLTAGE (V)
50ms/DIV
= 10A
OUT
I
= 0A
OUT
15
1778 G19
20
25
1778 G05
Frequency vs Load Current
300
CONTINUOUS MODE
250
200
150
100
FREQUENCY (kHz)
50
0
0
DISCONTINUOUS
MODE
2468
LOAD CURRENT (A)
4
1778 G26
Load Regulation
0
–0.1
(%)
–0.2
OUT
∆V
–0.3
10
–0.4
2
0
LOAD CURRENT (A)
4
FIGURE 9 CIRCUIT
6
8
1778 G06
10
ITH Voltage vs Load Current
2.5
FIGURE 9 CIRCUIT
2.0
1.5
CONTINUOUS
VOLTAGE (V)
1.0
TH
I
0.5
0
0
MODE
DISCONTINUOUS
MODE
5
LOAD CURRENT (A)
10
15
1778 G07
1778fb
Page 5
UW
TEMPERATURE (°C)
–50
0.78
FEEDBACK REFERENCE VOLTAGE (V)
0.79
0.80
0.81
0.82
–2502550
1778 G12
75 100 125
TYPICAL PERFOR A CE CHARACTERISTICS
Current Sense Threshold
vs ITH Voltage
300
RNG
2V
=
V
On-Time vs ION Current
10k
V
VON
= 0V
LTC1778/LTC1778-1
On-Time vs VON Voltage
1000
I
ION
= 30µA
200
100
0
–100
CURRENT SENSE THRESHOLD (mV)
–200
0
1.01.52.0
0.5
ITH VOLTAGE (V)
On-Time vs Temperature
300
I
= 30µA
ION
= 0V
V
VON
250
200
150
ON-TIME (ns)
100
50
1.4V
1V
0.7V
0.5V
2.53.0
1778 G08
1k
ON-TIME (ns)
100
10
1
ION CURRENT (µA)
Current Limit Foldback
150
125
100
= 1V
V
RNG
75
50
25
10100
1778 G20
800
600
400
ON-TIME (ns)
200
0
0
1
VON VOLTAGE (V)
Maximum Current Sense
Threshold vs V
300
250
200
150
100
50
RNG
2
Voltage
3
1778 G21
0
–50
–250
Maximum Current Sense
Threshold vs RUN/SS Voltage
150
125
100
MAXIMUM CURRENT SENSE THRESHOLD (mV)
= 1V
V
RNG
75
50
25
0
1.5
22.533.5
RUN/SS VOLTAGE (V)
50100 125
2575
TEMPERATURE (°C)
1778 G22
1778 G23
MAXIMUM CURRENT SENSE THRESHOLD (mV)
0
0
0.20.40.60.8
VFB (V)
Maximum Current Sense
Threshold vs Temperature
150
V
= 1V
RNG
140
130
120
110
MAXIMUM CURRENT SENSE THRESHOLD (mV)
100
–50 –25
0
TEMPERATURE (°C)
50
25
75
1778 G09
100
1778 G11
125
MAXIMUM CURRENT SENSE THRESHOLD (mV)
0
0.5
0.75
1.01.251.5
V
VOLTAGE (V)
RNG
1.752.0
Feedback Reference Voltage
vs Temperature
1778 G10
1778fb
5
Page 6
LTC1778/LTC1778-1
TEMPERATURE (C)
–50
2.0
UNDERVOLTAGE LOCKOUT THRESHOLD (V)
2.5
3.0
3.5
4.0
–2502550
1778 G18
75 100 125
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Input and Shutdown Currents
Error Amplifier g
2.0
1.8
vs Temperature
m
vs Input Voltage
1200
1000
EXTVCC OPEN
INTV
Load Regulation
CC
60
50
SHUTDOWN CURRENT (µA)
0
–0.1
1.6
(mS)
m
g
1.4
1.2
1.0
–50 –25
25
0
TEMPERATURE (°C)
EXTVCC Switch Resistance
vs Temperature
10
8
6
4
SWITCH RESISTANCE (Ω)
CC
2
EXTV
800
600
400
INPUT CURRENT (µA)
200
50
75
100
125
1778 G13
0
0
510
SHUTDOWN
EXTVCC = 5V
203035
1525
INPUT VOLTAGE (V)
1778 G24
40
30
20
10
0
–0.2
(%)
CC
–0.3
∆INTV
–0.4
–0.5
10
0
INTVCC LOAD CURRENT (mA)
30
40
20
50
1778 G25
RUN/SS Pin Current
FCB Pin Current vs Temperature
0
–0.25
–0.50
–0.75
–1.00
FCB PIN CURRENT (µA)
–1.25
vs Temperature
3
2
1
0
FCB PIN CURRENT (µA)
–1
PULL-DOWN CURRENT
PULL-UP CURRENT
0
–50 –25
6
25
0
TEMPERATURE (°C)
RUN/SS THRESHOLD (V)
50
75
100
125
1778 G14
RUN/SS Latchoff Thresholds
vs Temperature
5.0
4.5
LATCHOFF ENABLE
4.0
3.5
3.0
–50
LATCHOFF THRESHOLD
–2502550
TEMPERATURE (°C)
–1.50
–50
–250
75 100 125
1778 G17
50100 125
2575
TEMPERATURE (°C)
1778 G15
–2
–50 –25
25
0
TEMPERATURE (°C)
Undervoltage Lockout Threshold
vs Temperature
50
75
100
125
1778 G16
1778fb
Page 7
LTC1778/LTC1778-1
U
UU
PI FU CTIO S
RUN/SS (Pin 1): Run Control and Soft-Start Input. A
capacitor to ground at this pin sets the ramp time to full
output current (approximately 3s/µF) and the time delay
for overcurrent latchoff (see Applications Information).
Forcing this pin below 0.8V shuts down the device.
PGOOD (Pin 2, LTC1778): Power Good Output. Open
drain logic output that is pulled to ground when the output
voltage is not within ±7.5% of the regulation point.
(Pin 2, LTC1778-1): On-Time Voltage Input. Voltage
V
ON
trip point for the on-time comparator. Tying this pin to the
output voltage or an external resistive divider from the
output makes the on-time proportional to V
comparator input defaults to 0.7V when the pin is grounded
or unavailable (LTC1778) and defaults to 2.4V when the
pin is tied to INTVCC. Tie this pin to INTVCC in high V
applications to use a lower RON value.
V
(Pin 3): Sense Voltage Range Input. The voltage at
RNG
this pin is ten times the nominal sense voltage at maximum output current and can be set from 0.5V to 2V by a
resistive divider from INTVCC. The nominal sense voltage
defaults to 70mV when this pin is tied to ground, 140mV
when tied to INTVCC.
FCB (Pin 4): Forced Continuous Input. Tie this pin to
ground to force continuous synchronous operation at low
load, to INTVCC to enable discontinuous mode operation
at low load or to a resistive divider from a secondary output
when using a secondary winding.
I
(Pin 5): Current Control Threshold and Error Amplifier
TH
Compensation Point. The current comparator threshold
increases with this control voltage. The voltage ranges
from 0V to 2.4V with 0.8V corresponding to zero sense
voltage (zero current).
SGND (Pin 6): Signal Ground. All small-signal components and compensation components should connect to
this ground, which in turn connects to PGND at one point.
OUT
. The
OUT
ION (Pin 7): On-Time Current Input. Tie a resistor from V
to this pin to set the one-shot timer current and thereby set
the switching frequency.
VFB (Pin 8): Error Amplifier Feedback Input. This pin
connects the error amplifier input to an external resistive
divider from V
EXTVCC (Pin 9): External VCC Input. When EXTVCC ex-
ceeds 4.7V, an internal switch connects this pin to INTV
and shuts down the internal regulator so that controller
and gate drive power is drawn from EXTVCC. Do not exceed
7V at this pin and ensure that EXTVCC < VIN.
VIN (Pin 10): Main Input Supply. Decouple this pin to
PGND with an RC filter (1Ω, 0.1µF).
INTVCC (Pin 11): Internal 5V Regulator Output. The driver
and control circuits are powered from this voltage. Decouple this pin to power ground with a minimum of 4.7µF
low ESR tantalum capacitor.
BG (Pin 12): Bottom Gate Drive. Drives the gate of the
bottom N-channel MOSFET between ground and INTVCC.
PGND (Pin 13): Power Ground. Connect this pin closely to
the source of the bottom N-channel MOSFET, the (–)
terminal of C
SW (Pin 14): Switch Node. The (–) terminal of the bootstrap capacitor CB connects here. This pin swings from a
diode voltage drop below ground up to VIN.
TG (Pin 15): Top Gate Drive. Drives the top N-channel
MOSFET with a voltage swing equal to INTVCC superimposed on the switch node voltage SW.
BOOST (Pin 16): Boosted Floating Driver Supply. The (+)
terminal of the bootstrap capacitor CB connects here. This
pin swings from a diode voltage drop below INTVCC up to
V
+ INTVCC.
IN
.
OUT
and the (–) terminal of CIN.
VCC
IN
CC
1778fb
7
Page 8
LTC1778/LTC1778-1
U
U
W
FU CTIO AL DIAGRA
R
ON
**
I
7
ON
R
SQ
20k
+
–
+
I
REV
–
×
0.7V22.4V
1
tON = (10pF)
1.4V
V
RNG
3
0.7V
V
V
I
CMP
ON
I
VON
ION
1µA
V
IN
V
0.8V
REF
5V
REG
10
BOOST
16
TG
15
SW
14
INTV
CC
11
BG
12
PGND
13
PGOOD*
2
IN
+
C
IN
C
B
M1
L1
D
B
V
OUT
+
C
C
VCC
M2
OUT
FCB
4
–
F
0.8V
+
4.7V
+
–
SHDN
FCNT
ON
OV
9
SWITCH
EXTV
LOGIC
CC
1
240k
I
+
–
×4
LTC1778
*
LTC1778-1
**
THB
0.8V
3.3µA
0.74V
Q2
Q4
Q6
Q3
Q1
EA
–
+
0.8V
1V
Q5
0.6V
RUN
SHDN
1
RUN/SS
SS
–
+
+
–
0.6V
C
I
5
C1
TH
R
C
UV
OV
1.2µA
6V
+
–
+
0.86V
–
C
SS
V
FB
8
SGND
6
1778 FD
R2
R1
8
1778fb
Page 9
OPERATIO
LTC1778/LTC1778-1
U
Main Control Loop
The LTC1778 is a current mode controller for DC/DC
step-down converters. In normal operation, the top
MOSFET is turned on for a fixed interval determined by a
one-shot timer OST. When the top MOSFET is turned off,
the bottom MOSFET is turned on until the current comparator I
ating the next cycle. Inductor current is determined by
sensing the voltage between the PGND and SW pins using
the bottom MOSFET on-resistance . The voltage on the I
pin sets the comparator threshold corresponding to inductor valley current. The error amplifier EA adjusts this
voltage by comparing the feedback signal VFB from the
output voltage with an internal 0.8V reference. If the load
current increases, it causes a drop in the feedback voltage
relative to the reference. The ITH voltage then rises until the
average inductor current again matches the load current.
At low load currents, the inductor current can drop to zero
and become negative. This is detected by current reversal
comparator I
discontinuous operation. Both switches will remain off
with the output capacitor supplying the load current until
the ITH voltage rises above the zero current level (0.8V) to
initiate another cycle. Discontinuous mode operation is
disabled by comparator F when the FCB pin is brought
below 0.8V, forcing continuous synchronous operation.
The operating frequency is determined implicitly by the
top MOSFET on-time and the duty cycle required to
maintain regulation. The one-shot timer generates an ontime that is proportional to the ideal duty cycle, thus
holding frequency approximately constant with changes
in VIN. The nominal frequency can be adjusted with an
external resistor RON.
Overvoltage and undervoltage comparators OV and UV
pull the PGOOD output low if the output feedback voltage
exits a ±7.5% window around the regulation point.
trips, restarting the one-shot timer and initi-
CMP
which then shuts off M2, resulting in
REV
TH
Furthermore, in an overvoltage condition, M1 is turned off
and M2 is turned on and held on until the overvoltage
condition clears.
Foldback current limiting is provided if the output is
shorted to ground. As VFB drops, the buffered current
threshold voltage I
level set by Q4 and Q6. This reduces the inductor valley
current level to one sixth of its maximum value as V
approaches 0V.
Pulling the RUN/SS pin low forces the controller into its
shutdown state, turning off both M1 and M2. Releasing
the pin allows an internal 1.2µA current source to charge
up an external soft-start capacitor CSS. When this voltage
reaches 1.5V, the controller turns on and begins switching, but with the ITH voltage clamped at approximately
0.6V below the RUN/SS voltage. As CSS continues to
charge, the soft-start current limit is removed.
INTVCC/EXTVCC Power
Power for the top and bottom MOSFET drivers and most
of the internal controller circuitry is derived from the
INTVCC pin. The top MOSFET driver is powered from a
floating bootstrap capacitor CB. This capacitor is recharged from INTVCC through an external Schottky diode
DB when the top MOSFET is turned off. When the EXTV
pin is grounded, an internal 5V low dropout regulator
supplies the INTVCC power from VIN. If EXTVCC rises
above 4.7V, the internal regulator is turned off, and an
internal switch connects EXTVCC to INTVCC. This allows
a high efficiency source connected to EXTVCC, such as an
external 5V supply or a secondary output from the
converter, to provide the INTVCC power. Voltages up to
7V can be applied to EXTVCC for additional gate drive. If
the input voltage is low and INTVCC drops below 3.5V,
undervoltage lockout circuitry prevents the power
switches from turning on.
is pulled down by clamp Q3 to a 1V
THB
FB
CC
1778fb
9
Page 10
LTC1778/LTC1778-1
WUUU
APPLICATIO S I FOR ATIO
The basic LTC1778 application circuit is shown in
Figure 1. External component selection is primarily determined by the maximum load current and begins with
the selection of the sense resistance and power MOSFET
switches. The LTC1778 uses the on-resistance of the
synchronous power MOSFET for determining the inductor current. The desired amount of ripple current and
operating frequency largely determines the inductor value.
Finally, CIN is selected for its ability to handle the large
RMS current into the converter and C
is chosen with
OUT
low enough ESR to meet the output voltage ripple and
transient specification.
Choosing the LTC1778 or LTC1778-1
The LTC1778 has an open-drain PGOOD output that
indicates when the output voltage is within ±7.5
% of the
regulation point. The LTC1778-1 trades the PGOOD pin for
a VON pin that allows the on-time to be adjusted. Tying the
VON pin high results in lower values for RON which is useful
in high V
applications. The VON pin also provides a
OUT
means to adjust the on-time to maintain constant frequency operation in applications where V
changes and
OUT
to correct minor frequency shifts with changes in load
current. Finally, the VON pin can be used to provide
additional current limiting in positive-to-negative converters and as a control input to synchronize the switching
frequency with a phase locked loop.
Maximum Sense Voltage and V
RNG
Pin
Inductor current is determined by measuring the voltage
across a sense resistance that appears between the PGND
and SW pins. The maximum sense voltage is set by the
voltage applied to the V
mately (0.133)V
. The current mode control loop will
RNG
pin and is equal to approxi-
RNG
not allow the inductor current valleys to exceed
(0.133)V
RNG/RSENSE
. In practice, one should allow some
margin for variations in the LTC1778 and external component values and a good guide for selecting the sense
resistance is:
V
R
SENSE
=
10 •
RNG
I
OUT MAX
()
An external resistive divider from INTVCC can be used to
set the voltage of the V
pin between 0.5V and 2V
RNG
resulting in nominal sense voltages of 50mV to 200mV.
Additionally, the V
pin can be tied to SGND or INTV
RNG
CC
in which case the nominal sense voltage defaults to 70mV
or 140mV, respectively. The maximum allowed sense
voltage is about 1.33 times this nominal value.
Power MOSFET Selection
The LTC1778 requires two external N-channel power
MOSFETs, one for the top (main) switch and one for the
bottom (synchronous) switch. Important parameters for
the power MOSFETs are the breakdown voltage V
threshold voltage V
transfer capacitance C
, on-resistance R
(GS)TH
and maximum current I
RSS
DS(ON)
(BR)DSS
, reverse
DS(MAX)
,
.
The gate drive voltage is set by the 5V INTVCC supply.
Consequently, logic-level threshold MOSFETs must be
used in LTC1778 applications. If the input voltage is
expected to drop below 5V, then sub-logic level threshold
MOSFETs should be considered.
When the bottom MOSFET is used as the current sense
element, particular attention must be paid to its onresistance. MOSFET on-resistance is typically specified
with a maximum value R
DS(ON)(MAX)
at 25°C. In this case,
additional margin is required to accommodate the rise in
MOSFET on-resistance with temperature:
R
R
DS ON MAX
()( )
=
SENSE
ρ
T
The ρT term is a normalization factor (unity at 25°C)
accounting for the significant variation in on-resistance
2.0
1.5
1.0
0.5
NORMALIZED ON-RESISTANCE
T
ρ
0
–50
Figure 2. R
0
JUNCTION TEMPERATURE (°C)
50
vs. Temperature
DS(ON)
100
150
1778 F02
1778fb
10
Page 11
WUUU
f
V
VR pF
H
OUT
VONON
Z
=
()
[]
10
APPLICATIO S I FOR ATIO
LTC1778/LTC1778-1
with temperature, typically about 0.4%/°C as shown in
Figure 2. For a maximum junction temperature of 100°C,
using a value ρT = 1.3 is reasonable.
The power dissipated by the top and bottom MOSFETs
strongly depends upon their respective duty cycles and
the load current. When the LTC1778 is operating in
continuous mode, the duty cycles for the MOSFETs are:
V
D
D
TOP
BOT
OUT
=
V
IN
–
VV
INOUT
=
V
IN
The resulting power dissipation in the MOSFETs at maximum output current are:
P
P
TOP
BOT
= D
TOP IOUT(MAX)
+ k V
IN
= D
BOT IOUT(MAX)
2
I
2
ρ
T(TOP) RDS(ON)(MAX)
OUT(MAX) CRSS
2
ρ
T(BOT) RDS(ON)(MAX)
f
Both MOSFETs have I2R losses and the top MOSFET
includes an additional term for transition losses, which are
largest at high input voltages. The constant k = 1.7A–1 can
be used to estimate the amount of transition loss. The
bottom MOSFET losses are greatest when the bottom duty
cycle is near 100%, during a short-circuit or at high input
voltage.
Operating Frequency
The choice of operating frequency is a tradeoff between
efficiency and component size. Low frequency operation
improves efficiency by reducing MOSFET switching losses
but requires larger inductance and/or capacitance in order
to maintain low output ripple voltage.
The operating frequency of LTC1778 applications is determined implicitly by the one-shot timer that controls the
on-time tON of the top MOSFET switch. The on-time is set
by the current into the ION pin and the voltage at the V
ON
pin (LTC1778-1) according to:
Tying a resistor RON from VIN to the ION pin yields an ontime inversely proportional to VIN. For a step-down converter, this results in approximately constant frequency
operation as the input supply varies:
To hold frequency constant during output voltage changes,
tie the VON pin to V
when V
> 2.4V. The VON pin has internal clamps that
OUT
or to a resistive divider from V
OUT
OUT
limit its input to the one-shot timer. If the pin is tied below
0.7V, the input to the one-shot is clamped at 0.7V. Similarly, if the pin is tied above 2.4V, the input is clamped at
2.4V. In high V
applications, tying VON to INTVCC so
OUT
that the comparator input is 2.4V results in a lower value
for RON. Figures 3a and 3b show how RON relates to
switching frequency for several common output voltages.
1000
V
= 3.3V
OUT
V
= 1.5V
OUT
SWITCHING FREQUENCY (kHz)
100
100
Figure 3a. Switching Frequency vs R
for the LTC1778 and LTC1778-1 (VON = 0V)
1000
V
OUT
SWITCHING FREQUENCY (kHz)
RON (kΩ)
= 3.3V
V
= 2.5V
OUT
100010000
V
OUT
V
OUT
1778 F03a
ON
= 12V
= 5V
t
ON
VON defaults to 0.7V in the LTC1778.
V
VON
=()10
I
ION
pF
100
100
Figure 3b. Switching Frequency vs R
for the LTC1778-1 (VON = INTVCC)
100010000
RON (kΩ)
1778 F03b
ON
1778fb
11
Page 12
LTC1778/LTC1778-1
∆ =
⎛
⎝
⎜
⎞
⎠
⎟
−
⎛
⎝
⎜
⎞
⎠
⎟
I
V
fL
V
V
L
OUTOUT
IN
1
WUUU
APPLICATIO S I FOR ATIO
Because the voltage at the ION pin is about 0.7V, the
current into this pin is not exactly inversely proportional to
VIN, especially in applications with lower input voltages.
To correct for this error, an additional resistor R
ON2
connected from the ION pin to the 5V INTVCC supply will
further stabilize the frequency.
5
07=.
V
R
V
R
ONON2
Changes in the load current magnitude will also cause
frequency shift. Parasitic resistance in the MOSFET
switches and inductor reduce the effective voltage across
the inductance, resulting in increased duty cycle as the
load current increases. By lengthening the on-time slightly
as current increases, constant frequency operation can be
maintained. This is accomplished with a resistive divider
from the I
pin to the VON pin and V
TH
. The values
OUT
required will depend on the parasitic resistances in the
specific application. A good starting point is to feed about
25% of the voltage change at the ITH pin to the VON pin as
shown in Figure 4a. Place capacitance on the VON pin to
filter out the ITH variations at the switching frequency. The
resistor load on ITH reduces the DC gain of the error amp
and degrades load regulation, which can be avoided by
using the PNP emitter follower of Figure 4b.
due to a dropping input voltage for example, then the
output will drop out of regulation. The minimum input
voltage to avoid dropout is:
tt
+
VV
IN MINOUT
=
()
ONOFF MIN
t
ON
()
A plot of maximum duty cycle vs frequency is shown in
Figure 5.
Inductor Selection
Given the desired input and output voltages, the inductor
value and operating frequency determine the ripple
current:
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
2.0
1.5
1.0
DROPOUT
REGION
Minimum Off-time and Dropout Operation
The minimum off-time t
OFF(MIN)
is the smallest amount of
time that the LTC1778 is capable of turning on the bottom
MOSFET, tripping the current comparator and turning the
MOSFET back off. This time is generally about 250ns. The
minimum off-time limit imposes a maximum duty cycle of
tON/(tON + t
12
OFF(MIN)
). If the maximum duty cycle is reached,
R
VON1
30k
V
OUT
R
VON2
100k
R
C
C
C
C
VON
0.01µF
V
ON
LTC1778
I
TH
(4a)(4b)
Figure 4. Correcting Frequency Shift with Load Current Changes
0.5
SWITCHING FREQUENCY (MHz)
0
00.250.500.75
DUTY CYCLE (V
OUT/VIN
)
1.0
1778 F05
Figure 5. Maximum Switching Frequency vs Duty Cycle
R
VON1
INTV
3k
V
OUT
CC
10k
2N5087
R
VON2
10k
Q1
C
VON
0.01µF
R
C
C
C
V
ON
LTC1778
I
TH
1778 F04
1778fb
Page 13
WUUU
APPLICATIO S I FOR ATIO
LTC1778/LTC1778-1
ripple. Highest efficiency operation is obtained at low
frequency with small ripple current. However, achieving
this requires a large inductor. There is a tradeoff between
component size, efficiency and operating frequency.
A reasonable starting point is to choose a ripple current
that is about 40% of I
OUT(MAX)
. The largest ripple current
occurs at the highest VIN. To guarantee that ripple current
does not exceed a specified maximum, the inductance
should be chosen according to:
⎛
=
⎜
fI
⎝
V
∆
L
⎞
⎛
OUT
⎟
⎠
()()
LMAX
V
OUT
−
1
⎜
V
⎝
IN MAX
⎞
⎟
⎠
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron
cores, forcing the use of more expensive ferrite, molypermalloy or Kool Mµ® cores. A variety of inductors designed
for high current, low voltage applications are available
from manufacturers such as Sumida, Panasonic, Coiltronics, Coilcraft and Toko.
Schottky Diode D1 Selection
The Schottky diode D1 shown in Figure 1 conducts during
the dead time between the conduction of the power
MOSFET switches. It is intended to prevent the body diode
of the bottom MOSFET from turning on and storing charge
during the dead time, which can cause a modest (about
1%) efficiency loss. The diode can be rated for about one
half to one fifth of the full load current since it is on for only
a fraction of the duty cycle. In order for the diode to be
effective, the inductance between it and the bottom MOSFET must be as small as possible, mandating that these
components be placed adjacently. The diode can be omitted if the efficiency loss is tolerable.
CIN and C
Selection
OUT
The input capacitance CIN is required to filter the square
wave current at the drain of the top MOSFET. Use a low
ESR capacitor sized to handle the maximum RMS current.
II
≅
RMSOUT MAX
()
V
OUT
V
IN
V
V
IN
OUT
–1
This formula has a maximum at VIN = 2V
I
RMS
= I
OUT(MAX)
/ 2. This simple worst-case condition is
OUT
, where
commonly used for design because even significant
deviations do not offer much relief. Note that ripple
current ratings from capacitor manufacturers are often
based on only 2000 hours of life which makes it advisable
to derate the capacitor.
The selection of C
is primarily determined by the ESR
OUT
required to minimize voltage ripple and load step
transients. The output ripple ∆V
is approximately
OUT
bounded by:
∆≤∆ +
⎛
VIESR
OUTL
⎜
⎝
8
fC
1
OUT
⎞
⎟
⎠
Since ∆IL increases with input voltage, the output ripple is
highest at maximum input voltage. Typically, once the ESR
requirement is satisfied, the capacitance is adequate for
filtering and has the necessary RMS current rating.
Multiple capacitors placed in parallel may be needed to
meet the ESR and RMS current handling requirements.
Dry tantalum, special polymer, aluminum electrolytic and
ceramic capacitors are all available in surface mount
packages. Special polymer capacitors offer very low ESR
but have lower capacitance density than other types.
Tantalum capacitors have the highest capacitance density
but it is important to only use types that have been surge
tested for use in switching power supplies. Aluminum
electrolytic capacitors have significantly higher ESR, but
can be used in cost-sensitive applications providing that
consideration is given to ripple current ratings and long
term reliability. Ceramic capacitors have excellent low
ESR characteristics but can have a high voltage coefficient
and audible piezoelectric effects. The high Q of ceramic
capacitors with trace inductance can also lead to significant ringing. When used as input capacitors, care must be
taken to ensure that ringing from inrush currents and
switching does not pose an overvoltage hazard to the
power switches and controller. To dampen input voltage
transients, add a small 5µF to 50µF aluminum electrolytic
capacitor with an ESR in the range of 0.5Ω to 2Ω. High
performance through-hole capacitors may also be used,
Kool Mµ is a registered trademark of Magnetics, Inc.
1778fb
13
Page 14
LTC1778/LTC1778-1
WUUU
APPLICATIO S I FOR ATIO
but an additional ceramic capacitor in parallel is recommended to reduce the effect of their lead inductance.
Top MOSFET Driver Supply (C
An external bootstrap capacitor C
, DB)
B
connected to the BOOST
B
pin supplies the gate drive voltage for the topside MOSFET.
This capacitor is charged through diode D
from INTV
B
CC
when the switch node is low. When the top MOSFET turns
on, the switch node rises to V
to approximately V
+ INTVCC. The boost capacitor needs
IN
and the BOOST pin rises
IN
to store about 100 times the gate charge required by the
top MOSFET. In most applications 0.1µF to 0.47µF, X5R or
X7R dielectric capacitor is adequate.
Discontinuous Mode Operation and FCB Pin
The FCB pin determines whether the bottom MOSFET
remains on when current reverses in the inductor. Tying
this pin above its 0.8V threshold enables discontinuous
operation where the bottom MOSFET turns off when
inductor current reverses. The load current at which
current reverses and discontinuous operation begins depends on the amplitude of the inductor ripple current and
will vary with changes in VIN. Tying the FCB pin below the
0.8V threshold forces continuous synchronous operation,
allowing current to reverse at light loads and maintaining
high frequency operation.
In addition to providing a logic input to force continuous
operation, the FCB pin provides a means to maintain a
flyback winding output when the primary is operating in
discontinuous mode. The secondary output V
OUT2
is nor-
mally set as shown in Figure 6 by the turns ratio N of the
V
IN
+
C
V
IN
OPTIONAL
EXTV
CONNECTION
5V < V
CC
< 7V
OUT2
Figure 6. Secondary Output Loop and EXTVCC Connection
EXTV
R4
FCB
R3
SGND
LTC1778
CC
TG
SW
BG
PGND
IN
1N4148
V
•
T1
1:N
+
•
+
OUT2
C
OUT2
1µF
V
OUT1
C
OUT
1778 F06
transformer. However, if the controller goes into discontinuous mode and halts switching due to a light primary
load current, then V
divider from V
V
OUT2(MIN)
until V
OUT2
VV
OUT MIN2
OUT2
below which continuous operation is forced
has risen above its minimum.
()
08 1
will droop. An external resistor
OUT2
to the FCB pin sets a minimum voltage
⎛
.=+
⎜
⎝
⎞
R
4
⎟
R
3
⎠
Fault Conditions: Current Limit and Foldback
The maximum inductor current is inherently limited in a
current mode controller by the maximum sense voltage. In
the LTC1778, the maximum sense voltage is controlled by
the voltage on the V
pin. With valley current control,
RNG
the maximum sense voltage and the sense resistance
determine the maximum allowed inductor valley current.
The corresponding output current limit is:
V
I
LIMIT
SNS MAX
=+∆
R
DS ONT
()
()
1
I
ρ
L
2
The current limit value should be checked to ensure that
I
LIMIT(MIN)
> I
OUT(MAX)
. The minimum value of current limit
generally occurs with the largest VIN at the highest ambient temperature, conditions that cause the largest power
loss in the converter. Note that it is important to check for
self-consistency between the assumed MOSFET junction
temperature and the resulting value of I
which heats
LIMIT
the MOSFET switches.
Caution should be used when setting the current limit
based upon the R
of the MOSFETs. The maximum
DS(ON)
current limit is determined by the minimum MOSFET onresistance. Data sheets typically specify nominal and
maximum values for R
reasonable assumption is that the minimum R
, but not a minimum. A
DS(ON)
DS(ON)
lies
the same amount below the typical value as the maximum
lies above it. Consult the MOSFET manufacturer for further
guidelines.
To further limit current in the event of a short circuit to
ground, the LTC1778 includes foldback current limiting. If
the output falls by more than 25%, then the maximum
sense voltage is progressively lowered to about one sixth
of its full value.
1778fb
14
Page 15
WUUU
APPLICATIO S I FOR ATIO
LTC1778/LTC1778-1
INTVCC Regulator
An internal P-channel low dropout regulator produces the
5V supply that powers the drivers and internal circuitry
within the LTC1778. The INTVCC pin can supply up to
50mA RMS and must be bypassed to ground with a
minimum of 4.7µF low ESR tantalum capacitor. Good
bypassing is necessary to supply the high transient currents required by the MOSFET gate drivers. Applications
using large MOSFETs with a high input voltage and high
frequency of operation may cause the LTC1778 to exceed
its maximum junction temperature rating or RMS current
rating. Most of the supply current drives the MOSFET
gates unless an external EXTVCC source is used. In continuous mode operation, this current is I
+ Q
). The junction temperature can be estimated
g(BOT)
GATECHG
= f(Q
g(TOP)
from the equations given in Note 2 of the Electrical
Characteristics. For example, the LTC1778CGN is limited
to less than 14mA from a 30V supply:
TJ = 70°C + (14mA)(30V)(130°C/W) = 125°C
For larger currents, consider using an external supply with
the EXTVCC pin.
will start-up using the internal linear regulator until the
boosted output supply is available.
External Gate Drive Buffers
The LTC1778 drivers are adequate for driving up to about
30nC into MOSFET switches with RMS currents of 50mA.
Applications with larger MOSFET switches or operating at
frequencies requiring greater RMS currents will benefit
from using external gate drive buffers such as the LTC1693.
Alternately, the external buffer circuit shown in Figure 7
can be used. Note that the bipolar devices reduce the
signal swing at the MOSFET gate, and benefit from an
increased EXTVCC voltage of about 6V.
BOOST
Q1
FMMT619
10Ω10Ω
TG
SW
Figure 7. Optional External Gate Driver
Q2
FMMT720
GATE
OF M1
BG
INTV
PGND
CC
Q3
FMMT619
Q4
FMMT720
GATE
OF M2
1778 F07
EXTVCC Connection
The EXTVCC pin can be used to provide MOSFET gate drive
and control power from the output or another external
source during normal operation. Whenever the EXTV
CC
pin is above 4.7V the internal 5V regulator is shut off and
an internal 50mA P-channel switch connects the EXTV
CC
pin to INTVCC. INTVCC power is supplied from EXTVCC until
this pin drops below 4.5V. Do not apply more than 7V to
the EXTVCC pin and ensure that EXTVCC ≤ VIN. The following list summarizes the possible connections for EXTVCC:
1. EXTVCC grounded. INTV
is always powered from the
CC
internal 5V regulator.
2. EXTVCC connected to an external supply. A high efficiency supply compatible with the MOSFET gate drive
requirements (typically 5V) can improve overall
efficiency.
3. EXTVCC connected to an output derived boost network.
The low voltage output can be boosted using a charge
pump or flyback winding to greater than 4.7V. The system
Soft-Start and Latchoff with the RUN/SS Pin
The RUN/SS pin provides a means to shut down the
LTC1778 as well as a timer for soft-start and overcurrent
latchoff. Pulling the RUN/SS pin below 0.8V puts the
LTC1778 into a low quiescent current shutdown (IQ <
30µA). Releasing the pin allows an internal 1.2µA current
source to charge up the external timing capacitor CSS. If
RUN/SS has been pulled all the way to ground, there is a
delay before starting of about:
V
15
t
DELAYSSSS
=
.
12
.
CsFC
=µ
13
./
A
µ
()
When the voltage on RUN/SS reaches 1.5V, the LTC1778
begins operating with a clamp on ITH of approximately
0.9V. As the RUN/SS voltage rises to 3V, the clamp on I
TH
is raised until its full 2.4V range is available. This takes an
additional 1.3s/µF, during which the load current is folded
back until the output reaches 75% of its final value. The pin
can be driven from logic as shown in Figure 7. Diode D1
1778fb
15
Page 16
LTC1778/LTC1778-1
WUUU
APPLICATIO S I FOR ATIO
reduces the start delay while allowing CSS to charge up
slowly for the soft-start function.
After the controller has been started and given adequate
time to charge up the output capacitor, CSS is used as a
short-circuit timer. After the RUN/SS pin charges above
4V, if the output voltage falls below 75% of its regulated
value, then a short-circuit fault is assumed. A 1.8µA cur-
rent then begins discharging C
. If the fault condition
SS
persists until the RUN/SS pin drops to 3.5V, then the controller turns off both power MOSFETs, shutting down the
converter permanently. The RUN/SS pin must be actively
pulled down to ground in order to restart operation.
The overcurrent protection timer requires that the soft-start
timing capacitor C
be made large enough to guarantee
SS
that the output is in regulation by the time CSS has reached
the 4V threshold. In general, this will depend upon the size
of the output capacitance, output voltage and load current
characteristic. A minimum soft-start capacitor can be
estimated from:
CSS > C
OUT VOUT RSENSE
(10–4 [F/V s])
Generally 0.1µF is more than sufficient.
Overcurrent latchoff operation is not always needed or
desired. Load current is already limited during a shortcircuit by the current foldback circuitry and latchoff
operation can prove annoying during troubleshooting.
The feature can be overridden by adding a pull-up current
greater than 5µA to the RUN/SS pin. The additional
current prevents the discharge of CSS during a fault and
also shortens the soft-start period. Using a resistor to V
IN
as shown in Figure 8a is simple, but slightly increases
shutdown current. Connecting a resistor to INTVCC as
INTV
CC
V
3.3V OR 5VRUN/SS
Figure 8. RUN/SS Pin Interfacing with Latchoff Defeated
IN
RSS*
D1
C
SS
(8a)(8b)
RSS*
RUN/SS
D2*
2N7002
*OPTIONAL TO OVERRIDE
OVERCURRENT LATCHOFF
C
SS
1778 F08
shown in Figure 8b eliminates the additional shutdown
current, but requires a diode to isolate CSS . Any pull-up
network must be able to pull RUN/SS above the 4.2V
maximum threshold of the latchoff circuit and overcome
the 4µA maximum discharge current.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Although all dissipative
elements in the circuit produce losses, four main sources
account for most of the losses in LTC1778 circuits:
1. DC I
2
R losses. These arise from the resistances of the
MOSFETs, inductor and PC board traces and cause the
efficiency to drop at high output currents. In continuous
mode the average output current flows through L, but is
chopped between the top and bottom MOSFETs. If the two
MOSFETs have approximately the same R
DS(ON)
, then the
resistance of one MOSFET can simply be summed with the
resistances of L and the board traces to obtain the DC I2R
loss. For example, if R
= 0.01Ω and RL = 0.005Ω, the
DS(ON)
loss will range from 15mW to 1.5W as the output current
varies from 1A to 10A.
2. Transition loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
during switch node transitions. It depends upon the input
voltage, load current, driver strength and MOSFET
capacitance, among other factors. The loss is significant
at input voltages above 20V and can be estimated from:
Transition Loss ≅ (1.7A–1) V
IN
2
I
OUT CRSS
f
3. INTVCC current. This is the sum of the MOSFET driver
and control currents. This loss can be reduced by supplying INTVCC current through the EXTVCC pin from a high
efficiency source, such as an output derived boost network or alternate supply if available.
4. CIN loss. The input capacitor has the difficult job of
filtering the large RMS input current to the regulator. It
must have a very low ESR to minimize the AC I2R loss and
sufficient capacitance to prevent the RMS current from
causing additional upstream losses in fuses or batteries.
1778fb
16
Page 17
WUUU
P
VV
V
AW
BOT
=
()()
Ω
()
=
282 5
28
1215 0010197
2
–.
...
APPLICATIO S I FOR ATIO
LTC1778/LTC1778-1
Other losses, including C
conduction loss during dead time and inductor core loss
generally account for less than 2% additional loss.
When making adjustments to improve efficiency, the
input current is the best indicator of changes in efficiency.
If you make a change and the input current decreases, then
the efficiency has increased. If there is no change in input
current, then there is no change in efficiency.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
equal to ∆I
resistance of C
discharge C
the regulator to return V
During this recovery time, V
overshoot or ringing that would indicate a stability problem. The ITH pin external components shown in Figure 9
will provide adequate compensation for most applications. For a detailed explanation of switching control loop
theory see Application Note 76.
LOAD
OUT
OUT
(ESR), where ESR is the effective series
. ∆I
OUT
generating a feedback error signal used by
ESR loss, Schottky diode D1
OUT
immediately shifts by an amount
also begins to charge or
LOAD
to its steady-state value.
OUT
can be monitored for
OUT
Selecting a standard value of 1.8µH results in a maximum
ripple current of:
.
µ
Ω
⎛
1
–
⎜
⎝
= 1.5:
1
+
2
25
.
∆ =
L
2501 8
()
Next, choose the synchronous MOSFET switch. Choosing
a Si4874 (R
θ
= 40°C/W) yields a nominal sense voltage of:
JA
V
SNS(NOM)
Tying V
for a nominal value of 110mV with current limit occurring
at 146mV. To check if the current limit is acceptable,
assume a junction temperature of about 80°C above a
70°C ambient with ρ
I
LIMIT
and double check the assumed TJ in the MOSFET:
TJ = 70°C + (1.97W)(40°C/W) = 149°C
to 1.1V will set the current sense voltage range
RNG
≥
15 0010
()
V
kHzH
()
= 0.0083Ω (NOM) 0.010Ω (MAX),
DS(ON)
= (10A)(1.3)(0.0083Ω) = 108mV
150°C
mV
146
..
()
⎞
25
.
V
51
.
=I
⎟
28
V
⎠
AA
5112
.
()
A
=
Design Example
As a design example, take a supply with the following
specifications: VIN = 7V to 28V (15V nominal), V
±5%, I
timing resistor with VON = V
and choose the inductor for about 40% ripple current at
the maximum VIN:
OUT(MAX)
R
=
ON
L
2500 4 10
()()()
= 10A, f = 250kHz. First, calculate the
:
OUT
V
25
.
VkHzpF
0 725010
.
()()()
V
25
.
kHzA
.
⎛
25
−
1
⎜
28
⎝
M
=Ω
142
.
⎞
V
.
=µ
23
⎟
V
⎠
= 2.5V
OUT
H=
.
Because the top MOSFET is on for such a short time, an
Si4884 R
40°C/W will be sufficient. Checking its power dissipation
at current limit with ρ
P
TJ = 70°C + (0.7W)(40°C/W) = 98°C
The junction temperatures will be significantly less at
nominal current, but this analysis shows that careful
attention to heat sinking will be necessary in this circuit.
DS(ON)(MAX)
.
25
=
TOP
V
28
.
1 7 2812100250
()( )( )()()
...
=+=
03004007
= 0.0165Ω, C
= 1.4:
100°C
V
2
..
A
121 4 0 0165
()()
2
VApFkHz
WWW
()
= 100pF, θJA =
RSS
Ω
+
1778fb
17
Page 18
LTC1778/LTC1778-1
WUUU
APPLICATIO S I FOR ATIO
CIN is chosen for an RMS current rating of about 5A at
85°C. The output capacitors are chosen for a low ESR of
0.013Ω to minimize output voltage changes due to inductor ripple current and load steps. The ripple voltage will be
only:
∆V
OUT(RIPPLE)
= ∆I
L(MAX)
(ESR)
= (5.1A) (0.013Ω) = 66mV
However, a 0A to 10A load step will cause an output
change of up to:
∆V
OUT(STEP)
= ∆I
(ESR) = (10A) (0.013Ω) = 130mV
LOAD
An optional 22µF ceramic output capacitor is included to
minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 9.
PC Board Layout Checklist
When laying out a PC board follow one of the two suggested approaches. The simple PC board layout requires
a dedicated ground plane layer. Also, for higher currents,
it is recommended to use a multilayer board to help with
heat sinking power components.
• The ground plane layer should not have any traces and
it should be as close as possible to the layer with power
MOSFETs.
• Place CIN, C
, MOSFETs, D1 and inductor all in one
OUT
compact area. It may help to have some components on
the bottom side of the board.
• Place LTC1778 chip with pins 9 to 16 facing the power
components. Keep the components connected to pins
1 to 8 close to LTC1778 (noise sensitive components).
•
Use an immediate via to connect the components to
ground plane including SGND and PGND of LTC1778.
Use several bigger vias for power components.
• Use compact plane for switch node (SW) to improve
cooling of the MOSFETs and to keep EMI down.
• Use planes for VIN and V
to maintain good voltage
OUT
filtering and to keep power losses low.
• Flood all unused areas on all layers with copper. Flood-
ing with copper will reduce the temperature rise of
power component. You can connect the copper areas to
any DC net (VIN, V
, GND or to any other DC rail in
OUT
your system).
C
SS
0.1µF
R3
R4
11k
39k
C
C1
R
C
500pF
20k
C
C2
100pF
R1
14.0k
C2
R2
6.8nF
30.1k
CIN: UNITED CHEMICON THCR60EIHI06ZT
: CORNELL DUBILIER ESRE181E04B
C
OUT1-2
L1: SUMIDA CEP125-1R8MC-H
R
PG
100k
R
1.4MΩ
1
RUN/SS
2
PGOOD
3
V
RNG
4
FCB
5
I
TH
6
SGND
7
I
ON
8
V
FB
ON
M1
Si4884
M2
Si4874
LTC1778
BOOST
PGND
INTV
EXTV
SW
V
TG
BG
D
B
16
15
14
13
12
11
CC
10
IN
9
CC
CMDSH-3
C
B
0.22µF
C
VCC
+
4.7µF
R
1Ω
C
F
0.1µF
F
Figure 9. Design Example: 2.5V/10A at 250kHz
L1
1.8µH
D1
B340A
+
1778 F09
C
IN
10µF
35V
×3
C
OUT1-2
180µF
4V
×2
C
OUT3
22µF
6.3V
X7R
V
IN
5V TO 28V
V
OUT
2.5V
10A
1778fb
18
Page 19
WUUU
APPLICATIO S I FOR ATIO
LTC1778/LTC1778-1
When laying out a printed circuit board, without a ground
plane, use the following checklist to ensure proper operation of the controller. These items are also illustrated in
Figure 10.
• Segregate the signal and power grounds. All small
signal components should return to the SGND pin at
one point which is then tied to the PGND pin close to the
source of M2.
• Place M2 as close to the controller as possible, keeping
the PGND, BG and SW traces short.
C
SS
C
C1
R
C
C
C2
R1
1
2
3
4
5
6
7
8
LTC1778
RUN/SS
PGOOD
V
RNG
FCB
I
TH
SGND
I
ON
V
FB
BOOST
SW
PGND
INTV
EXTV
16
15
TG
14
13
12
BG
11
CC
10
V
IN
9
CC
C
B
D
B
C
VCC
+
•
Connect the input capacitor(s) CIN close to the power
MOSFETs. This capacitor carries the MOSFET AC
current.
• Keep the high dV/dT SW, BOOST and TG nodes away
from sensitive small-signal nodes.
• Connect the INTV
to the INTV
CC
• Connect the top driver boost capacitor C
decoupling capacitor C
CC
and PGND pins.
B
closely
VCC
closely to the
BOOST and SW pins.
• Connect the V
pin decoupling capacitor CF closely to
IN
the VIN and PGND pins.
L
M1
D1
M2
C
F
R
F
C
OUT
C
IN
+
V
IN
–
–
V
OUT
+
R
R2
BOLD LINES INDICATE HIGH CURRENT PATHS
ON
1778 F10
Figure 10. LTC1778 Layout Diagram
1778fb
19
Page 20
LTC1778/LTC1778-1
TYPICAL APPLICATIO S
U
1.5V/10A at 300kHz from 3.3V Input
C
SS
0.1µF
R
R
R1
R2
11k
39k
C
C1
R
C
680pF
20k
C
C2
100pF
R1
10k
R2
8.87k
C
: MURATA GRM42-2X5R226K6.3
IN1-2
: CORNELL DUBILIER ESRE271M02B
C
OUT
R
PG
100k
R
ON
576k
1
2
3
4
5
6
7
8
LTC1778
RUN/SS
PGOOD
V
RNG
FCB
I
TH
SGND
I
ON
V
FB
BOOST
PGND
INTV
EXTV
SW
V
TG
BG
D
B
16
15
14
13
12
11
CC
10
IN
9
CC
CMDSH-3
C
B
0.22µF
C
VCC
4.7µF
5V
M1
IRF7811A
L1, 0.68µH
M2
IRF7811A
D1
B320B
V
IN
C
IN1-2
+
22µF
6.3V
×2
C
OUT
+
270µF
2V
×2
1778 TA01
C
IN3
330µF
6.3V
3.3V
V
OUT
1.5V
10A
1.2V/6A at 300kHz
C
SS
0.1µF
R
PG
100k
C
C1
R
470pF
C
20k
C
C2
100pF
R1
20k
R
ON
R2
10k
2200pF
CIN: TAIYO YUDEN TMK432BJ106MM
: CORNELL DUBILIER ESRD181M02B
C
OUT1
: TAIYO YUDEN JMK316BJ106ML
C
OUT2
L1: TOKO 919AS-1R8N
510k
C2
1
2
3
4
5
6
7
8
LTC1778
RUN/SS
PGOOD
V
RNG
FCB
I
TH
SGND
I
ON
V
FB
BOOST
PGND
INTV
EXTV
SW
V
BG
D
B
16
15
TG
14
13
12
11
CC
10
IN
9
CC
CMDSH-3
C
B
0.22µF
C
VCC
4.7µF
R
1Ω
C
F
0.1µF
F
M1
1/2 FDS6982S
M2
1/2 FDS6982S
L1
1.8µH
1778 TA02
V
IN
C
OUT2
10µF
6.3V
5V TO 25V
V
OUT
1.2V
6A
1778fb
C
IN
10µF
25V
×2
+
C
OUT1
180µF
2V
20
Page 21
TYPICAL APPLICATIO S
C
SS
C
C1
100pF
10k 1%
1nF
C
R1
140k
1
1%
R2
0.1µF
R
C
47k
C
220pF
C2
1
2
3
4
5
6
7
8
R
1.5M
RUN/SS
V
V
FCB
I
TH
SGND
I
ON
V
ON2
1%
LTC1778-1
ON
RNG
FB
R
1.5M
1%
U
Single Inductor, Positive Output Buck/Boost
D
B
CMDSH-3
C
B
0.22µF
C
VCC
4.7µF
C
F
0.1µF
PGND
1Ω
M1
IRF7811A
L1 4.8µH
M2
IRF7811A
R
F
C
: MARCON THER70EIH226ZT
IN
: AVX TPSV107M020R0085
C
OUT
L1: SCHOTT 36835-1
ON1
BOOST
PGND
INTV
EXTV
TG
SW
BG
V
16
15
14
13
12
11
CC
10
IN
9
CC
D1
B340A
LTC1778/LTC1778-1
V
I
IN
OUT
18V
6A
12V
5A
6V
3.3A
V
IN
C
OUT
100µF
20V
×6
6V TO 18V
V
OUT
12V
C
IN
22µF
50V
IR 12CWQ03FN
×2
M3
Si4888
D2
+
1778 TA04
C
SS
0.1µF
C
C1
2.2nF
R1
10k
R2
140k
LTC1778-1
1
RUN/SS
2
V
3
V
4
R
C
20k
C
C2
100pF
R
1.6M
C2
2200pF
:
C
UNITED CHEMICON THCR70E1H226ZT (847) 696-2000
IN
:
C
SANYO 16SV220M(619) 661-6835
OUT
L1:
SUMIDA CDRH127-100(847) 956-0667
M1, M2:
FAIRCHILD FDS6680A(408) 822-2126
D1:
DIODES, INC. B340A(805) 446-4800
FCB
5
I
TH
6
SGND
7
I
ON
8
V
ON
ON
RNG
FB
BOOST
PGND
INTV
EXTV
SW
V
TG
BG
CC
IN
CC
12V/5A at 300kHz
D
B
16
15
14
13
12
11
10
9
CMDSH-3
C
B
0.22µF
C
VCC
+
4.7µF
R
1Ω
C
F
0.1µF
F
M1
L1 10µH
M2
V
IN
14V TO 28V
C
IN
22µF
50V
V
OUT
12V
C
OUT
220µF
16V
5A
1778fb
+
D1
1778 TA05
21
Page 22
LTC1778/LTC1778-1
TYPICAL APPLICATIO S
C
SS
C
C1
4700pF
R1
10k
R2
52.3k
0.1µF
R
10k
C
C
100pF
C2
R
ON
698k
1
2
3
4
5
6
7
8
LTC1778-1
RUN/SS
V
ON
V
RNG
FCB
I
TH
SGND
I
ON
V
FB
U
Positive-to-Negative Converter, –5V/5A at 300kHz
D
B
CMDSH-3
C
B
0.22µF
C
VCC
4.7µF
RF
1Ω
C
F
0.1µF
M1
IRF7811A
L1 2.7µH
M2
IRF7822
D1
B340A
BOOST
PGND
INTV
EXTV
TG
SW
BG
V
16
15
14
13
12
11
CC
10
IN
9
CC
V
I
IN
OUT
20V
8A
10V
6.7A
5V
5A
V
IN
C
IN1
10µF
25V
×2
+
C
OUT
100µF
6V
×3
C
IN2
10µF
35V
5V TO 20V
V
OUT
–5V
C
: TAIYO YUDEN TMK432BJ106MM
IN1
: SANYO 35CV10GX
C
IN2
: PANASONIC EEFUD0J101R
C
OUT
L1: PANASONIC ETQPAF2R7H
1778 TA06
22
1778fb
Page 23
PACKAGE DESCRIPTIO
LTC1778/LTC1778-1
U
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
.045 ±.005
.254 MIN
RECOMMENDED SOLDER PAD LAYOUT
.007 – .0098
(0.178 – 0.249)
.016 – .050
NOTE:
1. CONTROLLING DIMENSION: INCHES
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
(0.406 – 1.270)
INCHES
(MILLIMETERS)
.150 – .165
.0250 BSC.0165 ± .0015
.015 ± .004
(0.38 ± 0.10)
0° – 8° TYP
× 45°
.229 – .244
(5.817 – 6.198)
.0532 – .0688
(1.35 – 1.75)
.008 – .012
(0.203 – 0.305)
TYP
16
15
12
.189 – .196*
(4.801 – 4.978)
14
12 11 10
13
5
4
3
678
.0250
(0.635)
BSC
.009
(0.229)
9
(0.102 – 0.249)
REF
.150 – .157**
(3.810 – 3.988)
.004 – .0098
GN16 (SSOP) 0204
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
1778fb
23
Page 24
LTC1778/LTC1778-1
TYPICAL APPLICATIO
U
Typical Application 2.5V/3A at 1.4MHz
C
SS
0.1µF
C
C1
R
470pF
R1
11.5k
C
33k
C
C2
100pF
R
R2
24.9k
2200pF
CIN: TAIYO YUDEN TMK432BJ106MM
: CORNELL DUBILIER ESRD121M04B
C
OUT
L1: TOKO A921CY-1R0M
220k
C2
R
100k
ON
D
B
LTC1778
1
RUN/SS
PG
2
PGOOD
3
V
RNG
4
FCB
5
I
TH
6
SGND
7
I
ON
8
EXTV
V
FB
BOOST
SW
PGND
INTV
16
15
TG
14
13
12
BG
11
CC
10
V
IN
9
CC
CMDSH-3
C
B
0.22µF
C
VCC
4.7µF
RF
1Ω
C
F
0.1µF
M1
1/2 Si9802
M2
1/2 Si9802
L1, 1µH
V
IN
9V TO 18V
C
IN
10µF
25V
V
OUT
2.5V
C
OUT
120µF
4V
1778 TA03
3A
+
RELATED PARTS
PART NUMBERDESCRIPTIONCOMMENTS
LTC1622550kHz Step-Down Controller8-Pin MSOP; Synchronizable; Soft-Start; Current Mode
LTC1625/LTC1775No R
LTC1628-PGDual, 2-Phase Synchronous Step-Down ControllerPower Good Output; Minimum Input/Output Capacitors;
LTC1628-SYNCDual, 2-Phase Synchronous Step-Down ControllerSynchronizable 150kHz to 300kHz
LTC1709-7High Efficiency, 2-Phase Synchronous Step-Down ControllerUp to 42A Output; 0.925V ≤ V
with 5-Bit VID
LTC1709-8High Efficiency, 2-Phase Synchronous Step-Down ControllerUp to 42A Output; VRM 8.4; 1.3V ≤ V