Datasheet LTC1606 Datasheet (Linear Technology)

FEATURES

Final Electrical Specifications

■

Sample Rate: 250ksps

■

Single 5V Supply

■

Bipolar Input Range: ±10V

■

Signal-to-Noise Ratio: 90dB Typ

■

Power Dissipation: 75mW Typ

■

Integral Nonlinearity: ±2.0LSB Max

■

Guaranteed No Missing Codes

■

Operates with Internal or External Reference

■

Internal Synchronized Clock

■

28-Pin SSOP Package

■

Improved 2nd Source to AD976A and ADS7805

U

APPLICATIONS

■

Industrial Process Control

■

Multiplexed Data Acquisition Systems

■

High Speed Data Acquisition for PCs

■

Digital Signal Processing

LTC1606

16-Bit, 250ksps,

Single Supply ADC

March 2000

U

DESCRIPTION

The LTC®1606 is a 250ksps, sampling 16-bit A/D con­verter that draws only 75mW (typical) from a single 5V
supply. This easy-to-use device includes sample-and­hold, precision reference, switched capacitor successive
approximation A/D and trimmed internal clock.

The LTC1606’s input range is an industry standard ±10V.
Maximum DC specs include ±2.0LSB INL and 16 bits no
missing codes over temperature. An external reference
can be used if greater accuracy over temperature is
needed.

The 90dB signal-to-noise ratio offers an improvement of
3dB over competing devices, and the RMS transition noise
is reduced (0.65LSB vs 1LSB) relative to competitive
parts.

The ADC has a microprocessor compatible, 16-bit or two
byte parallel output port. A convert start input and a data
ready signal (BUSY) ease connections to FIFOs, DSPs and
microprocessors.

, LTC and LT are registered trademarks of Linear Technology Corporation.

±10V

INPUT

Low Power, 250kHz, 16-Bit Sampling ADC on 5V Supply

5V

6 TO 13

15 TO 22

26

25

24

23

10µF

DIGITAL
CONTROL
SIGNALS

28 27

V

DIGVANA

200Ω

1

33.2k

4

4.096V

10µF

3

2.5V

2.2µF

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

V

CAP

REF

7.35k

IN

2.5k 9k

1.64x
BUFFER

4k

REFERENCE

AGND1

AGND25DGND

2

16-BIT

SAMPLING ADC

CONTROL

LOGIC AND

TIMING

14

D15 TO D0

BUSY

CS

R/C

BYTE

1606 TA01

0.1µF

16-BIT
OR 2 BYTE
PARALLEL
BUS

1

LTC1606

W

O

A

(Notes 1, 2)

V

ANA

V

DIG

V

DIG

LUTEXI TIS

S

.......................................................................... 7V

to V

........................................................... 0.3V

ANA

........................................................................... 7V

A

WUW

U

ARB

G

Ground Voltage Difference

DGND, AGND1 and AGND2 .............................. ±0.3V

Analog Inputs (Note 3)

VIN..................................................................... ±25V

CAP ............................ V

+ 0.3V to AGND2 – 0.3V

ANA

REF....................................Indefinite Short to AGND2

Momentary Short to V

Digital Input Voltage (Note 4) ........ V

Digital Output Voltage........ V

– 0.3V to V

DGND

– 0.3V to 10V

DGND

DIG

ANA

+ 0.3V

Power Dissipation.............................................. 500mW

Operating Ambient Temperature Range

LTC1606AC/LTC1606C............................0°C to 70°C

LTC1606AI/LTC1606I ......................... – 40°C to 85°C

Storage Temperature Range ................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

/

PACKAGE

V

IN

AGND1

REF

CAP

AGND2

D15 (MSB)

D14
D13
D12
D11
D10

D9
D8

DGND

Consult factory for Military grade parts.

O

RDER I FOR ATIO

TOP VIEW

1
2
3
4
5
6
7
8

9
10
11
12
13
14

G PACKAGE

28-LEAD PLASTIC SSOP

T

= 125°C, θJA = 95°C/W

JMAX

28
27
26
25
24
23
22
21
20
19
18
17
16
15

V

DIG

V

ANA

BUSY
CS
R/C
BYTE
D0
D1
D2
D3
D4
D5
D6
D7

WU

ORDER PART

NUMBER

LTC1606ACG
LTC1606AIG
LTC1606CG
LTC1606IG

U

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CONVERTER CHARACTERISTICS

temperature range, otherwise specifications are at TA = 25°C. (Notes 5, 6)

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

Resolution ● 16 16 Bits
No Missing Codes ● 15 16 Bits
Transition Noise 0.65 0.65 LSB
Integral Linearity Error (Note 7) ● ±3 ±2 LSB
Bipolar Zero Error Ext. Reference = 2.5V (Note 8) ● ±10 ±10 mV
Bipolar Zero Error Drift ±2 ±2 ppm/°C
Full-Scale Error Drift ±7 ±5 ppm/°C
Full-Scale Error Ext. Reference = 2.5V (Notes 12, 13) ● ±0.50 ±0.25 %
Full-Scale Error Drift Ext. Reference = 2.5V ±2 ±2 ppm/°C
Power Supply Sensitivity

= V

DIG

= V

DD

V

ANA

VDD = 5V ±5% (Note 9) ±8 ±8 LSB

The ● indicates specifications which apply over the full operating

LTC1606 LTC1606A

RMS

2

LTC1606

UU

ANALOG INPUT

specifications are at TA = 25°C. (Note 5)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

IN

C

IN

R

IN

Analog Input Range (Note 9) 4.75V ≤ V
Analog Input Capacitance 10 pF
Analog Input Impedance 10 kΩ

The ● indicates specifications which apply over the full operating temperature range, otherwise

LTC1606/LTC1606A

≤ 5.25V, 4.75V ≤ V

ANA

≤ 5.25V ● ±10 V

DIG

UW

DYNAMIC ACCURACY

SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

S/(N + D) Signal-to-(Noise + Distortion) Ratio 1kHz Input Signal (Note 14) 90 90 dB

THD Total Harmonic Distortion 1kHz Input Signal, First 5 Harmonics –102 – 102 dB

Peak Harmonic or Spurious Noise 1kHz Input Signal –102 –102 dB

Full-Power Bandwidth (Note 15) 275 275 kHz
Aperture Delay 40 40 ns
Aperture Jitter Sufficient to Meet AC Specs Sufficient to Meet AC Specs
Transient Response Full-Scale Step (Note 9) 2 2 µs
Overvoltage Recovery (Note 16) 150 150 ns

(Notes 5, 14)

LTC1606 LTC1606A

10kHz Input Signal 90 87 90 dB
20kHz, –60dB Input Signal 30 30 dB

10kHz Input Signal, First 5 Harmonics –94 –89 – 94 dB

10kHz Input Signal –94 –94 dB

UU U

INTERNAL REFERENCE CHARACTERISTICS

operating temperature range, otherwise specifications are at TA = 25°C. (Note 5)

PARAMETER CONDITIONS MIN TYP MAX UNITS

V

Output Voltage I

REF

V

Output Tempco I

REF

Internal Reference Source Current 1 µA
External Reference Voltage for Specified Linearity (Notes 9, 10) 2.30 2.50 2.70 V
External Reference Current Drain Ext. Reference = 2.5V (Note 9) ● 100 µA
CAP Output Voltage I

= 0 ● 2.470 2.500 2.520 V

OUT

= 0 ±5 ppm/°C

OUT

= 0 4.096 V

OUT

The ● indicates specifications which apply over the full

LTC1606/LTC1606A

3

LTC1606

UU

DIGITAL INPUTS AND DIGITAL OUTPUTS

operating temperature range, otherwise specifications are at TA = 25°C. (Note 5)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

IH

V

IL

I

IN

C

IN

V

OH

V

OL

I

OZ

C

OZ

I

SOURCE

I

SINK

High Level Input Voltage VDD = 5.25V ● 2.4 V
Low Level Input Voltage VDD = 4.75V ● 0.8 V
Digital Input Current VIN = 0V to V
Digital Input Capacitance 5pF
High Level Output Voltage VDD = 4.75V IO = –10µA 4.5 V

Low Level Output Voltage VDD = 4.75V IO = 160µA 0.05 V

Hi-Z Output Leakage D15 to D0 V
Hi-Z Output Capacitance D15 to D0 CS High (Note 9) ● 15 pF
Output Source Current V
Output Sink Current V

OUT

OUT

OUT

DD

= 0V to VDD, CS High ● ±10 µA

= 0V –10 mA
= V

DD

The ● indicates specifications which apply over the full

LTC1606/LTC1606A

● ±10 µA

IO = –200µA ● 4.0 V

IO = 1.6mA ● 0.10 0.4 V

10 mA

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TIMING CHARACTERISTICS

range, otherwise specifications are at TA = 25°C. (Note 5)

The ● indicates specifications which apply over the full operating temperature

LTC1606/LTC1606A

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

f

SAMPLE(MAX)

t

CONV

t

ACQ

t

1

t

2

t

3

t

4

t

5

t

6

t

7

t

8

t

9

t

10

t

11

t

12

Maximum Sampling Frequency ● 250 kHz
Conversion Time ● 2.5 µs
Acquisition Time ● 1.5 µs
Convert Pulse Width (Note 11) ● 40 ns
Data Valid Delay After R/C↓ (Note 9) ● 2.5 µs
BUSY Delay from R/C↓ CL = 30pF ● 65 ns
BUSY Low ● 2.5 µs
BUSY Delay After End of Conversion 100 ns
Aperture Delay 40 ns
Bus Relinquish Time ● 15 50 ns
BUSY Delay After Data Valid ● 20 90 ns
Previous Data Valid After R/C↓ 2 µs
R/C to CS Setup Time (Notes 9, 10) ● 5ns
Time Between Conversions ● 4 µs
Bus Access CL = 30pF, (Notes 10) ● 15 60 ns
Byte Delay CL = 30pF, (Notes 9, 10) ● 15 60 ns

4

LTC1606

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POWER REQUIREMENTS

range, otherwise specifications are at TA = 25°C. (Note 5)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

DD

I

DD

P

DIS

Positive Supply Voltage (Notes 9, 10) 4.75 5.25 V
Positive Supply Current ● 15 20 mA
Power Dissipation ● 75 100 mW

The ● indicates specifications which apply over the full operating temperature

LTC1606/LTC1606A

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.
Note 2: All voltage values are with respect to ground with DGND, AGND1

and AGND2 wired together (unless otherwise noted).

input

IN

ANA

DD

=

DD

.

Note 3: When these pin voltages are taken below ground or above V

= VDD, they will be clamped by internal diodes. This product can

V

DIG

handle input currents of greater than 100mA below ground or above V
without latch-up.

Note 4: When these pin voltages are taken below ground, they will be
clamped by internal diodes. This product can handle input currents of
90mA below ground without latchup. These pins are not clamped to V

Note 5: VDD = 5V, f
specified.

Note 6: Linearity, offset and full-scale specifications apply for a V
with respect to ground.

Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual end points of the transfer curve.
The deviation is measured from the center of the quantization band.

Note 8: Bipolar offset is the offset voltage measured from –0.5 LSB when
the output code flickers between 0000 0000 0000 0000 and 1111 1111
1111 1111.

= 250kHz, tr = tf = 5ns unless otherwise

SAMPLE

UUU

PIN FUNCTIONS

Note 9: Guaranteed by design, not subject to test.
Note 10: Recommended operating conditions.
Note 11: With CS low the falling R/C edge starts a conversion. If R/C

returns high at a critical point during the conversion, it can create errors.
For best results, ensure that R/C returns high within 1µs after the start of
the conversion.

Note 12: As measured with fixed resistors shown in Figure 4. Adjustable to
zero with external potentiometer.

Note 13: Full-scale error is the worst-case of –FS or +FS untrimmed
deviation from ideal first and last code transitions, divided by the transition
voltage (not divided by the full-scale range) and includes the effect of
offset error.

Note 14: All specifications in dB are referred to a full-scale ±10V input.
Note 15: Full-power bandwidth is defined as full-scale input frequency at

which a signal-to-(noise + distortion) degrades to 60dB or 10 bits of
accuracy.

Note 16: Recovers to specified performance after (2 • FS) input
overvoltage.

VIN (Pin 1): Analog Input. Connect through a 200Ω
resistor to the analog input. Full-scale input range is
±10V.

AGND1 (Pin 2): Analog Ground. Tie to analog ground
plane.

REF (Pin 3): 2.5V Reference Output. Bypass with 2.2µF
tantalum capacitor. Can be driven with an external refer­ence.

CAP (Pin 4): Reference Buffer Output. Bypass with 10µF
tantalum capacitor. The capacitor output voltage is 4.096V
when REF = 2.5V.

AGND2 (Pin 5): Analog Ground. Tie to analog ground
plane.

D15 to D8 (Pins 6 to 13): Three-State Data Outputs.
Hi-Z state when CS is high or when R/C is low.

DGND (Pin 14): Digital Ground.
D7 to D0 (Pins 15 to 22): Three-State Data Outputs.

Hi-Z state when CS is high or when R/C is low.
BYTE (Pin 23): Byte Select. With BYTE low, data will be

output with Pin 6 (D15) being the MSB and Pin 22 (D0)
being the LSB. With BYTE high the upper eight bits and
the lower eight bits will be switched. The MSB is output
on Pin 15 and bit 8 is output on Pin 22. Bit 7 is output on
Pin 6 and the LSB is output on Pin 13.

R/C (Pin 24): Read/Convert Input. With CS low, a falling
edge on R/C puts the internal sample-and-hold into the
hold state and starts a conversion. With CS low, a rising
edge on R/C enables the output data bits.

5

LTC1606

1k 30pF 30pF

DBN

DBN

1k

5V

1606 TC02

A. VOH TO Hi-Z B. VOL TO Hi-Z

PIN FUNCTIONS

UUU

CS (Pin 25): Chip Select. Internally OR’d with R/C. With
R/C low, a falling edge on CS will initiate a conversion.
With R/C high, a falling edge on CS will enable the output
data.

BUSY (Pin 26): Output Shows Converter Status. It is low
when a conversion is in progress. Data valid on the rising
edge of BUSY. CS or R/C must be high when BUSY rises

TEST CIRCUITS

Load Circuit for Access Timing

5V

1k

DBN

1k 30pF 30pF

A. Hi-Z TO VOH AND VOL TO V

OH

DBN

1606 TC01

B. Hi-Z TO VOL AND VOH TO V

OL

or another conversion will start without time for signal
acquisition.

V

(Pin 27): 5V Analog Supply. Bypass to ground with

ANA

a 0.1µF ceramic and a 10µF tantalum capacitor.

V

(Pin 28): 5V Digital Supply. Connect directly to Pin

DIG

27.

Load Circuit for Output Float Delay

UU

W

FUNCTIONAL BLOCK DIAGRA

V

IN

REF

CAP

(4.096V)

AGND1
AGND2

DGND

7.35k

4k

2.5V REF

REF BUF

1.64x

2.5k9k

INTERNAL

CLOCK

16-BIT CAPACITIVE DAC

SUCCESSIVE APPROXIMATION

CS

C

SAMPLE

C

SAMPLE

REGISTER

CONTROL LOGIC

R/C BYTE

ZEROING SWITCHES

16

BUSY

+

COMP

–

OUTPUT LATCHES

1606 BD

V

ANA

V

DIG

D15

•

•

•

D0

6

LTC1606

U

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APPLICATIONS INFORMATION

Conversion Details

The LTC1606 uses a successive approximation algorithm
and an internal sample-and-hold circuit to convert an
analog signal to a 16-bit or two byte parallel output. The
ADC is complete with a precision reference and an internal
clock. The control logic provides easy interface to micro­processors and DSPs. (Please refer to the Digital Interface
section for the data format.)

Conversion start is controlled by the CS and R/C inputs. At
the start of conversion the successive approximation
register (SAR) is reset. Once a conversion cycle has
begun, it cannot be restarted.

During the conversion, the internal 16-bit capacitive DAC
output is sequenced by the SAR from the most significant
bit (MSB) to the least significant bit (LSB). Referring to
Figure 1, VIN is connected through the resistor divider to
the sample-and-hold capacitor during the acquire phase
and the comparator offset is nulled by the autozero switches.
In this acquire phase, a minimum delay of 1.5µs will
provide enough time for the sample-and-hold capacitor to
acquire the analog signal. During the convert phase, the
autozero switches open, putting the comparator into the
compare mode. The input switch switches C

SAMPLE

ground, injecting the analog input charge onto the sum­ming junction. This input charge is successively com­pared with the binary-weighted charges supplied by the
capacitive DAC. Bit decisions are made by the high speed
comparator. At the end of a conversion, the DAC output
balances the VIN input charge. The SAR contents (a 16-bit
data word) that represents the VIN are loaded into the
16-bit output latches.

SAMPLE

C

R

IN1

V

IN

SAMPLE

R

HOLD

IN2

Figure 1. LTC1606 Simplified Equivalent Circuit

SAMPLE

C

DAC

V

DAC

DAC

SI

–

+

COMPARATOR

to

S
A
R

16-BIT

LATCH

1606 • F01

Driving the Analog Inputs

The nominal input range for the LTC1606 is ±10V or
(±4 • V

) and the input is overvoltage protected to ±25V.

REF

The input impedance is typically 10kΩ, therefore, it should
be driven with a low impedance source. Wideband noise
coupling into the input can be minimized by placing a
1000pF capacitor at the input as shown in Figure 2. An
NPO-type capacitor gives the lowest distortion. Place the
capacitor as close to the device input pin as possible. If an
amplifier is to be used to drive the input, care should be
taken to select an amplifier with adequate accuracy, linear­ity and noise for the application. The following list is a
summary of the op amps that are suitable for driving the
LTC1606. More detailed information is available in the
Linear Technology data books and LinearViewTM CD-ROM.

200Ω

A

IN

1000pF 33.2k

Figure 2. Analog Input Filtering

V

IN

CAP

1606 • F02

LT1007 - Low noise precision amplifier. 2.7mA supply
current ±5V to ±15V supplies. Gain bandwidth product
8MHz. DC applications.

LT1097 - Low cost, low power precision amplifier. 300µA
supply current. ±5V to ±15V supplies. Gain bandwidth
product 0.7MHz. DC applications.

LT1227 - 140MHz video current feedback amplifier. 10mA
supply current. ±5V to ±15V supplies. Low noise and low
distortion.

LT1360 - 37MHz voltage feedback amplifier. 3.8mA sup­ply current. ±5V to ±15V supplies. Good AC/DC specs.

LT1363 - 50MHz voltage feedback amplifier. 6.3mA sup­ply current. Good AC/DC specs.

LT1364/LT1365 - Dual and quad 50MHz voltage feedback
amplifiers. 6.3mA supply current per amplifier. Good AC/
DC specs.

LT1468 - 90MHz 22V/µs 16-bit accurate amplifier.

LinearView is a trademark of Linear Technology Corporation

7

LTC1606

U

WUU

APPLICATIONS INFORMATION

Internal Voltage Reference

The LTC1606 has an on-chip, temperature compensated,
curvature corrected, bandgap reference, which is factory
trimmed to 2.50V. The full-scale range of the ADC is equal
to (±4 • V
reference is connected to the input of a buffer (1.64x)
through a 4k resistor (see Figure 3). The input to the buffer
or the output of the reference is available at REF (Pin 3).
The internal reference can be overdriven with an external
reference if more accuracy is needed. The buffer output
drives the internal DAC and is available at CAP (Pin 4). The
CAP pin can be used to drive a steady DC load of less than
2mA. Driving an AC load is not recommended because it
can cause the performance of the converter to degrade.

(4.096V)

) or nominally ±10V. The output of the

REF

REF

(2.5V)

2.2µF

CAP

10µF

3

+

4

4k

–

0.64R

BANDGAP

REFERENCE

R

INTERNAL

CAPACITOR

1606 • F03

DAC

Figure 3. Internal or External Reference Source

is applied to VIN and R4 is adjusted until the output code
is changing between 0111 1111 1111 1110 and 0111
1111 1111 1111. Figure 6 shows the bipolar transfer
characteristic of the LTC1606.

1

2.2µF

+

2.2µF

576k

10µF

2

3
4

5

V

IN

AGND1

REF
CAP

AGND2

1
2

3

4

5

LTC1606

V

IN

AGND1

REF

LTC1606

CAP

AGND2

1606 • F04

1606 • F05

±10V INPUT

200Ω

1%

33.2k
1%

+

10µF

Figure 4. ±10V Input Without Trim

±10V INPUT

200Ω

1%

+

33.2k
1%

5V

R4

50k

+

R3
50k

Figure 5. ±10V Input with Offset and Gain Trim

For minimum code transition noise, the REF pin and the
CAP pin should each be decoupled with a capacitor to
filter wideband noise from the reference and the buffer
(2.2µF tantalum for the REF pin and 10µF tantalum for the
CAP pin).

Offset and Gain Adjustments

The LTC1606 offset and full-scale errors have been trimmed
at the factory with the external resistors shown in Figure

4. This allows for external adjustment of offset and full
scale in applications where absolute accuracy is impor­tant. See Figure 5 for the offset and gain trim circuit. First,
adjust the offset to zero by adjusting resistor R3. Apply an
input voltage of –152.6µV (–0.5LSB) and adjust R3 so the
code is changing between 1111 1111 1111 1111 and 0000
0000 0000 0000. The gain error is trimmed by adjusting
resistor R4. An input voltage of 9.999542V (+FS – 1.5LSB)

8

011...111

011...110

000...001

000...000

111...111

111...110

OUTPUT CODE

100...001

100...000

BIPOLAR

ZERO

FS = 20V
1LSB = FS/65536

–1

0V

1

LSB

INPUT VOLTAGE (V)

LSB

FS/2 – 1LSB–FS/2

1606 • F06

Figure 6. LTC1606 Bipolar Transfer Characteristics

LTC1606

U

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APPLICATIONS INFORMATION

DC Performance

One way of measuring the transition noise associated with
a high resolution ADC is to use a technique where a DC
signal is applied to the input of the ADC and the resulting
output codes are collected over a large number of conver­sions. For example in Figure 7, the distribution of output
code is shown for a DC input that has been digitized 4096
times. The distribution is Gaussian and the RMS code
transition is about 0.65LSB.

2500

2000

1500

COUNTS

1000

500

0

–3 –2 –1 0 1 2 3 4

CODE

Figure 7. Histogram for 4096 Conversions

DIGITAL INTERFACE

Internal Clock

The ADC has an internal clock that is trimmed to achieve
a typical conversion time of 2.3µs. No external adjust-
ments are required and, with the typical acquisition time of
1µs, throughput performance of 250ksps is assured.

t

1

R/C

1606 • F07

Timing and Control

Conversion start and data read are controlled by two
digital inputs: CS and R/C. To start a conversion and put
the sample-and-hold into the hold mode, bring CS and
R/C low for no less than 40ns. Once initiated, it cannot be
restarted until the conversion is complete. Converter
status is indicated by the BUSY output and this is low while
the conversion is in progress.

There are two modes of operation. The first mode is shown
in Figure 8. The digital input R/C is used to control the start
of conversion. CS is tied low. When R/C goes low, the
sample-and-hold goes into the hold mode and a conver­sion is started. BUSY goes low and stays low during the
conversion and will go back high after the conversion has
been completed and the internal output shift registers
have been updated. R/C should remain low for no less than
40ns. During the time R/C is low, the digital outputs are in
a Hi-Z state. R/C should be brought back high within 1µs
after the start of the conversion to ensure that no errors
occur in the digitized result. The second mode, shown in
Figure 9, uses the CS signal to control the start of a
conversion and the reading of the digital output. In this
mode the R/C input signal should be brought low no less
than 10ns before the falling edge of CS. The minimum
pulse width for CS is 40ns. When CS falls, BUSY goes low
and will stay low until the end of the conversion. BUSY will
go high after the conversion has been completed. The new
data is valid when CS is brought back low again to initiate
a read. Again, it is recommended that both R/C and CS
return high within 1µs after the start of the conversion.

BUSY

MODE

DATA MODE

t

t

2

t

3

t

6

ACQUIRE CONVERT CONVERTACQUIRE

t

CONV

t

9

PREVIOUS

DATA VALID

Hi-Z NOT VALID Hi-Z

t

7

PREVIOUS

DATA VALID

11

t

4

t

5

t

ACQ

DATA

VALID

t

8

Figure 8. Conversion Timing with Outputs Enabled After Conversion (CS Tied Low)

DATA

VALID

1606 • F08

9

LTC1606

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APPLICATIONS INFORMATION

R/C

BUSY

MODE

DATA BUS

t

10

t

1

CS

t

t

6

ACQUIRE CONVERT ACQUIRE

Figure 9. Using CS to Control Conversion and Read Timing

t

10

3

t

CONV

t

10

t

1

t

4

t

12

DATA

VALID

t

10

Hi-ZHI-Z

t

1606 • F09

7

R/C

BYTE

PINS 6 TO 13

PINS 15 TO 22

t

10

CS

Hi-Z

Hi-Z

t

12

HIGH BYTE

LOW BYTE

LOW BYTE

t

12

HIGH BYTE

t

7

t

10

Hi-Z

Hi-Z

1606 • F10

Figure 10. Using CS and BYTE to Control Data Bus Read Timing

10

LTC1606

U

WUU

APPLICATIONS INFORMATION

Output Data

The output data can be read as a 16-bit word or it can be
read as two 8-bit bytes. The format of the output data is
two’s complement. The digital input pin BYTE is used to
control the two byte read. With the BYTE pin low, the first
eight MSBs are output on the D15 to D8 pins and the eight
LSBs are output on the D7 to D0 pins. When the BYTE pin
is taken high, the eight LSBs replace the eight MSBs
(Figure 10).

Dynamic Performance

FFT (Fast Fourier Transform) test techniques are used to
test the ADC’s frequency response, distortion and noise at
the rated throughput. By applying a low distortion sine
wave and analyzing the digital output using an FFT algo­rithm, the ADC’s spectral content can be examined for
frequencies outside the fundamental.

Signal-to-Noise Ratio

The Signal-to-Noise and Distortion Ratio (SINAD) is the
ratio between the RMS amplitude of the fundamental input
frequency to the RMS amplitude of all other frequency
components at the A/D output. The output is band limited
to frequencies from above DC and below half the sampling
frequency. A typical LTC1606 has a SINAD of 90dB and
THD of –102dB with a 250kHz sampling rate and a 1kHz
input.

Total Harmonic Distortion

Total Harmonic Distortion (THD) is the ratio of the RMS
sum of all harmonics of the input signal to the fundamental
itself. The out-of-band harmonics alias into the frequency
band between DC and half the sampling frequency. THD is

expressed as:

2

2

√V

+ V

2

THD = 20log

where V1 is the RMS amplitude of the fundamental fre­quency and V2 through VN are the amplitudes of the
second through Nth harmonics.

Board Layout, Power Supplies and Decoupling

Wire wrap boards and molded sockets are not recom­mended for high resolution or high speed A/D converters.
To obtain the best performance from the LTC1606, a
printed circuit board is required. Layout for the printed
circuit board should ensure the digital and analog signal
lines are separated as much as possible. In particular, care
should be taken not to run any digital track alongside an
analog signal track or underneath the ADC. The analog
input should be screened by AGND.

Pay particular attention to the design of the analog and
digital ground planes. The DGND pin of the LTC1606
should be tied to the analog ground plane. Placing the
bypass capacitor as close as possible to the power supply,
the reference and reference buffer output is very impor­tant. Low impedance common returns for these bypass
capacitors are essential to low noise operation of the ADC,
and the foil width for these tracks should be as wide as
possible. Also, since any potential difference in grounds
between the signal source and ADC appears as an error
voltage in series with the input signal, attention should be
paid to reducing the ground circuit impedance as much as
possible.

3

+ V

V

1

2

... + V

4

2

N

11

LTC1606

PACKAGE DESCRIPTION

5.20 – 5.38**
(0.205 – 0.212)

U

Dimensions in inches (millimeters) unless otherwise noted.

G Package

28-Lead Plastic SSOP (0.209)

(LTC DWG # 05-08-1640)

10.07 – 10.33*

(0.397 – 0.407)

2526 22 21 20 19 181716 1523242728

12345678 9 10 11 12 1413

° – 8°

0

7.65 – 7.90

(0.301 – 0.311)

1.73 – 1.99

(0.068 – 0.078)

0.13 – 0.22

(0.005 – 0.009)

NOTE: DIMENSIONS ARE IN MILLIMETERS

*

DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.152mm (0.006") PER SIDE

**

DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE

0.55 – 0.95

(0.022 – 0.037)

0.65

(0.0256)

BSC

0.25 – 0.38

(0.010 – 0.015)

0.05 – 0.21

(0.002 – 0.008)

G28 SSOP 1098

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PART NUMBER DESCRIPTION COMMENTS

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LTC1419 Low Power 14-Bit, 800ksps ADC True 14-Bit Linearity, 81.5dB SINAD, 150mW Dissipation
LT1460-2.5 Micropower Precision Series Reference 0.075% Max, 10ppm/°C Max, Only 130µA Supply Current
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LTC1604 16-Bit, 333ksps ADC ±2.5V Input, 90dB SINAD, 100dB THD, No Missing Codes
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12

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

[phone] ● FAX: [phone]

●

www.linear-tech.com

1606i LT/TP 0300 4K • PRINTED IN THE USA

 LINEAR TECHNOLOGY CORPORATION 2000