Linear Phase and Phase Matched Filters for I/Q
Signal Processing
■
Pin Programmable Cutoff Frequency Lowpass Filters
U
DESCRIPTIO
The LTC®1569-7 is a 10th order lowpass filter featuring
linear phase and a root raised cosine amplitude response.
The high selectivity of the LTC1569-7 combined with its
linear phase in the passband makes it suitable for filtering
both in data communications and data acquisition sytems.
Furthermore, its root raised cosine response offers the
optimum pulse shaping for PAM data communications
The filter attenuation is 50dB at 1.5 • f
f
, and in excess of 80dB at 6 • f
CUTOFF
CUTOFF
, 60dB at 2 •
CUTOFF
. DC-accuracy-
.
sensitive applications benefit from the 5mV maximum DC
offset.
The LTC1569-7 is the first sampled data filter which does
not require an external clock yet its cutoff frequency can be
set with a single external resistor with a typical accuracy
of 3.5% or better
. The external resistor programs an
internal oscillator whose frequency is divided by either 1,
4 or 16 prior to being applied to the filter network. Pin 5
determines the divider setting. Thus, up to three cutoff
frequencies can be obtained for each external resistor
value. Using various resistor values and divider settings,
the cutoff frequency can be programmed over a range of
seven octaves. Alternatively, the cutoff frequency can be
set with an external clock and the clock-to-cutoff frequency ratio is 32:1. The ratio of the internal sampling rate
to the filter cutoff frequency is 64:1.
The LTC1569-7 is fully tested for a cutoff frequency of
256kHz/128kHz with single 5V/3V supply although up to
300kHz cutoff frequencies can be obtained.
The LTC1569-7 features power savings modes and it is
available in an SO-8 surface mount package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
U
TYPICAL APPLICATION
Single 3V Supply, 128kHz/32kHz/8kHz Lowpass Filter
18
+
IN
OUTV
IN
3V
3.48k
2k
27
–
IN
LTC1569-7
36
GND
1µF
45
–
V
DIV/CLK
EASY TO SET f
f
CUTOFF
CUTOFF
128kHz (10k/R
=
1, 4 OR 16
V
OUT
= 10k
R
EXT
+
V
R
X
1/16
1/4
1/1
:
)
EXT
1µF
100pF
1569-7 TA01
Frequency Response, f
0
–20
3V
3V
–40
GAIN (dB)
–60
–80
–100
1
101001000
FREQUENCY (kHz)
= 128kHz/32kHz/8kHz
CUTOFF
1569-7 TA01a
1
Page 2
LTC1569-7
1
2
3
4
8
7
6
5
TOP VIEW
OUT
V
+
R
X
DIV/CLK
IN
+
IN
–
GND
V
–
S8 PACKAGE
8-LEAD PLASTIC SO
WU
A
W
O
LUTEXI TIS
S
A
WUW
ARB
U
G
PACKAGE
/
O
RDER IFORATIO
(Note 1)
Total Supply Voltage................................................ 11V
Power Dissipation.............................................. 500mW
Operating Temperature
LTC1569C ............................................... 0°C to 70°C
ORDER PART
NUMBER
LTC1569CS8-7
LTC1569IS8-7
LTC1569I............................................ –40°C to 85°C
Storage Temperature ............................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)..................300°C
T
= 125°C, θJA = 80°C/W (Note 6)
JMAX
S8 PART
MARKING
15697
1569I7
Consult factory for Military grade parts.
LECTRICAL CCHARA TERIST
E
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = 3V (V+ = 3V, V– = 0V), f
PARAMETERCONDITIONSMINTYPMAXUNITS
Filter GainVS = 5V, f
f
CUTOFF
= 5k, Pin 5 Shorted to Pin 4fIN = 128kHz = 0.5 • f
R
EXT
VS = 2.7V, f
f
CUTOFF
Pin 6 Shorted to Pin 4, External Clock f
Filter PhaseVS = 2.7V, f
f
CUTOFF
Pin 4, External Clockf
Filter Cutoff AccuracyR
when Self-ClockedV
Filter Output DC SwingVS = 3V, Pin 3 = 1.11V2.1V
2
= 10.24k from Pin 6 to Pin 7,125kHz ±1%
EXT
= 3V, Pin 5 Shorted to Pin 4
S
VS = 5V, Pin 3 = 2V3.9V
VS = ±5V8.6V
= 128kHz, R
CUTOFF
= 8.192MHz,fIN = 5120Hz = 0.02 • f
CLK
= 256kHz, VIN = 2.5V
= 1MHz,fIN = 625Hz = 0.02 • f
CLK
= 31.25kHz, VIN = 1V
= 4MHz,fIN = 2500Hz = 0.02 • f
CLK
= 125kHz, Pin 6 Shorted tofIN = 25kHz = 0.2 • f
ICS
= 10k unless otherwise specified.
LOAD
,f
P-P
,f
P-P
= 51.2kHz = 0.2 • f
IN
= 204.8kHz = 0.8 • f
f
IN
f
= 256kHz = f
IN
= 256kHz = f
f
IN
= 384kHz = 1.5 • f
f
IN
f
= 512kHz = 2 • f
IN
= 768kHz = 3 • f
f
IN
= 6.25kHz = 0.2 • f
IN
= 15.625kHz = 0.5 • f
IN
= 25kHz = 0.8 • f
f
IN
= 31.25kHz = f
f
IN
f
= 46.875kHz = 1.5 • f
IN
= 62.5kHz = 2 • f
f
IN
= 93.75kHz = 3 • f
f
IN
= 62.5kHz = 0.5 • f
IN
= 100kHz = 0.8 • f
f
IN
= 125kHz = f
f
IN
f
= 187.5kHz = 1.5 • f
IN
LTC1569C●8.4V
LTC1569I●8.0V
CUTOFF
CUTOFF
, LTC1569C●–5.7–3.8–2.3dB
CUTOFF
, LTC1569I●–6.2–3.8–2.0dB
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
●–0.100.000.10dB
●–0.25–0.15–0.05dB
●–0.50–0.41–0.25dB
●–1.1–0.65–0.40dB
●–58–48dB
●–62–54dB
●–67–64dB
●–0.080.000.12dB
●–0.25–0.15–0.05dB
●–0.50–0.40–0.30dB
●–0.75–0.65–0.50dB
●–3.3–3.15–3.0dB
●–57–52dB
●–60–54dB
●–66–58dB
–11Deg
●–114–112–110Deg
●788082Deg
●–85–83–81Deg
●155158161Deg
–95Deg
●1.9V
●3.7V
U
P-P
P-P
P-P
P-P
P-P
P-P
P-P
Page 3
LTC1569-7
LECTRICAL CCHARA TERIST
E
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = 3V (V+ = 3V, V– = 0V), f
Power Supply Voltage wherePin 5 Shorted to Pin 4, Note 3●3.74.24.6V
Low Power Mode is Enabled
Clock FeedthroughR
Wideband NoiseNoise BW = DC to 2 • f
THDfIN = 10kHz, 1.5V
Clock-to-Cutoff32
Frequency Ratio
Max Clock FrequencyVS = 3V5MHz
(Note 4)V
Min Clock Frequency3V to ±5V, TA < 85°C3kHz
(Note 5)
Input Frequency RangeAliased Components <–65dB0.9 • f
= 4.096MHz, f
CLK
= 10k, Pin 5 Shorted to Pin 4VS = 3V±2±5mV
EXT
= 10k, Pin 5 Shorted to Pin 4VS = 3V–25µV/°C
EXT
VS = 5VMin Logical “1”4.0V
VS = ±5VMin Logical “1”4.0V
= 1.028MHz (10k from Pin 6 to Pin 7,VS = 3V68mA
CLK
f
= 4.096MHz (10k from Pin 6 to Pin 7,VS = 3V9.5mA
CLK
Pin 5 Shorted to Pin 4, ÷ 1), f
f
= 8.192MHz (5k from Pin 6 to Pin 7,VS = 5V20mA
CLK
Pin 5 Shorted to Pin 4, ÷ 1), f
= 10k, Pin 5 Open0.4mV
EXT
P-P
= 5V9.6MHz
S
= ±5V13MHz
V
S
ICS
= 128kHz, R
CUTOFF
= 32kHz●9mA
CUTOFF
= 128kHz●14mA
CUTOFF
= 256kHz●30mA
CUTOFF
CUTOFF
= 10k unless otherwise specified.
LOAD
= 5V±6±12mV
S
= ±5V±15mV
V
S
V
= 5V–25µV/°C
S
= ±5V±25µV/°C
V
S
Max Logical “0”0.5V
Max Logical “0”0.5V
VS = 5V79mA
VS = 10V913mA
VS = 10V27mA
●10mA
●14mA
●37mA
125µV
74dB
CLK
RMS
RMS
Hz
Note 1: Absolute maximum ratings are those values beyond which the life
of a device may be impaired.
Note 2: DC offset is measured with respect to Pin 3.
Note 3: There are several operating modes which reduce the supply
current. For V
oscillator is used as the clock source and the divide-by-4 or divide-by-16
mode is enabled, the supply current is reduced by 60% independent of the
value of V
< 4V, the current is reduced by 50%. If the internal
S
.
S
Note 4: The maximum clock frequency is arbitrarily defined as the
frequency at which the filter AC response exhibits >1dB of gain peaking.
Note 5: The minimum clock frequency is arbitrarily defined as the frequecy
at which the filter DC offset changes by more than 5mV.
Note 6: Thermal resistance varies depending upon the amount of PC board
metal attached to the device. θ
covered with 2oz copper on both sides.
is specified for a 2500mm2 test board
JA
3
Page 4
LTC1569-7
FREQUENCY (kHz)
1
GAIN (dB)
DELAY (µs)
1
0
–1
–2
–3
–4
20
19
18
17
16
15
14
13
12
11
10
10100
1569-7 G04
VS = 3V
f
C
= 128kHz
R
EXT
= 10k
PIN 5 AT V
–
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Gain vs Frequency
10
LOG MAG (10dB/DIV)
–90
101001000
5
FREQUENCY (kHz)
VS = 3V
f
= 128kHz
C
= 10k
R
EXT
PIN 5 AT V
1569-7 G03
–
Passband Gain and Group Delay
vs Frequency
–68
–70
–72
THD (dB)
–74
–76
–78
4
THD vs Input Frequency
VS = 5V
PIN 3 = 2V
VIN = 1.5V
P-P
f
= 128kHz
CUTOFF
+
IN
TO OUT
= 10k
R
EXT
PIN 5 AT V
1030507090406080100
020
INPUT FREQUENCY (kHz)
–
5V Supply Current
23
21
19
17
15
(mA)
13
SUPPLY
I
11
9
DIV-BY-16
7
5
1
101001000
f
CUTOFF
1569-7 G01
DIV-BY-1
DIV-BY-4
(kHz)
EXT CLK
1569-7 G06
THD vs Input Voltage
–50
VS = 3V
PIN 3 = 1.11V
–60
–70
THD (dB)
–80
–90
12345
0
VS = 5V
PIN 3 = 2V
fIN = 10kHz
f
CUTOFF
IN
R
PIN 5 AT V
INPUT VOLTAGE (V
+
TO OUT
EXT
P-P
= 128kHz
= 10k
)
(mA)
SUPPLY
I
(mA)
SUPPLY
I
–
1569-7 G02
±
5V Supply Current
35
32
29
26
23
20
17
14
11
DIV-BY-16
8
5
1
101001000
3V Supply Current
12
11
10
9
8
7
DIV-BY-16
6
5
4
1
f
CUTOFF
101001000
DIV-BY-1
EXT CLK
DIV-BY-4
(kHz)
f
CUTOFF
1569-7 G07
DIV-BY-1
EXT CLK
DIV-BY-4
(kHz)
1569-7 G05
Page 5
UUU
PIN FUNCTIONS
LTC1569-7
IN+/IN– (Pins 1, 2): Signals can be applied to either or
both input pins. The DC gain from IN+ (Pin 1) to OUT
(Pin␣ 8) is 1.0, and the DC gain from Pin 2 to Pin 8 is –1. The
input range, input resistance and output range are described in the Applications Information section. Input
voltages which exceed the power supply voltages should
be avoided. Transients will not cause latchup if the current
into/out of the input pins is limited to 20mA.
GND (Pin 3): The GND pin is the reference voltage for the
filter and should be externally biased to 2V (1.11V) to
maximize the dynamic range of the filter in applications
using a single 5V (3V) supply. For single supply operation,
the GND pin should be bypassed with a quality 1µF
ceramic capacitor to V– (Pin 4). The impedance of the
circuit biasing the GND pin should be less than 2kΩ as the
GND pin generates a small amount of AC and DC current.
For dual supply operation, connect Pin␣ 3 to a high quality
DC ground. A ground plane should be used. A poor ground
will increase DC offset, clock feedthrough, noise and
distortion.
V–/V+ (Pins 4, 7): For 3V, 5V and ±5V applications a
quality 1µF ceramic bypass capacitor is required from V
+
(Pin 7) to V– (Pin 4) to provide the transient energy for the
internal clock drivers. The bypass should be as close as
possible to the IC. In dual supply applications (Pin 3 is
grounded), an additional 0.1µF bypass from V+ (Pin 7) to
GND (Pin 3) and V– (Pin 4) to GND (Pin 3) is recommended.
The maximum voltage difference between GND (Pin 3) and
V+ (Pin 7) should not exceed 5.5V.
DIV/CLK (Pin 5): DIV/CLK serves two functions. When the
internal oscillator is enabled, DIV/CLK can be used to
engage an internal divider. The internal divider is set to 1:1
when DIV/CLK is shorted to V– (Pin 4). The internal divider
is set to 4:1 when DIV/CLK is allowed to float (a 100pF
bypass to V– is recommended). The internal divider is set
to 16:1 when DIV/CLK is shorted to V+ (Pin 7). In the
divide-by-4 and divide-by-16 modes the power supply
current is reduced by typically 60%.
When the internal oscillator is disabled (RX shorted
to V–) DIV/CLK becomes an input pin for applying an
external clock signal. For proper filter operation, the clock
waveform should be a squarewave with a duty cycle as
close as possible to 50% and CMOS voltages levels (see
Electrical Characteristics section for voltage levels). DIV/
CLK pin voltages which exceed the power supply voltages
should be avoided. Transients will not cause latchup if the
fault current into/out of the DIV/CLK pin is limited to 40mA.
RX (Pin 6): Connecting an external resistor between the R
X
pin and V+ (Pin 7) enables the internal oscillator. The value
of the resistor determines the frequency of oscillation. The
maximum recommended resistor value is 40k and the
minimum is 3.8k/8k (single 5V/3V supply). The internal
oscillator is disabled by shorting the RX pin to V– (Pin 4).
(Please refer to the Applications Information section.)
OUT (Pin 8): Filter Output. This pin can drive 10kΩ and/or
40pF loads. For larger capacitive loads, an external 100Ω
series resistor is recommended. The output pin can exceed the power supply voltages by up to ±2V without
latchup.
BLOCK DIAGRA
W
+
IN
1OUT
–
2
IN
3
GND
–
4
V
10TH ORDER
LINEAR PHASE
FILTER NETWORK
POWER
CONTROL
DIVIDER/
BUFFER
PRECISION
OSCILLATOR
8
7
6
5
+
V
R
X
DIV/CLK
R
1569-7 BD
EXT
5
Page 6
LTC1569-7
U
WUU
APPLICATIONS INFORMATION
Self-Clocking Operation
The LTC1569-7 features a unique internal oscillator which
sets the filter cutoff frequency using a single external
resistor
128kHz, where the filter cutoff frequency error is typically
<1% when a 0.1% external 10k resistor is used. With
different resistor values and internal divider settings, the
cutoff frequency can be accurately varied from 2kHz to
150kHz/300kHz (single 3V/5V supply). As shown in
Figure 1, the divider is controlled by the DIV/CLK (Pin 5).
Table 1 summarizes the cutoff frequency vs external
resistor values for the divide-by-1 mode.
In the divide-by-4 and divide-by-16 modes, the cutoff
frequencies in Table 1 will be lowered by 4 and 16
respectively. When the LTC1569-7 is in the divide-by-4
and divide-by-16 modes the power is automatically
. The design is optimized for VS = 3V, f
18
+
IN
OUT
27
–
IN
LTC1569-7
36
GND
45
–
V
128kHz (10k/R
f
=
CUTOFF
1.010
1.008
1.006
1.004
1.002
1.000
0.998
0.996
NORMALIZED FILTER CUTOFF
0.994
0.992
0.990
–50
Figure 3. Filter Cutoff vs Temperature,
Divide-by-1 Mode, R
DIV/CLK
1, 4 OR 16
VS = 3V
= 5V
V
S
= 10V
V
S
–25
+
V
R
EXT
R
X
)
EXT
DIVIDE-BY-16
DIVIDE-BY-4
100pF
DIVIDE-BY-1
Figure 1
0255075100
TEMPERATURE (°C)
= 10k
EXT
V
V
1569-7 F01
1569-7 F03
CUTOFF
+
–
=
reduced. This results in a 60% power savings with a single
5V supply.
Table1. f
R
EXT
3844Ω320kHz±3.0%
5010Ω256kHz±2.5%
10k128kHz±1%
20.18k64kHz±2.0%
40.2k32kHz±3.5%
CUTOFF
vs R
Typical f
, VS = 3V, TA = 25°C, Divide-by-1 Mode
EXT
CUTOFF
Typical Variation of f
CUTOFF
The power reduction in the divide-by-4 and divide-by-16
modes, however, effects the fundamental oscillator frequency. Hence, the effective divide ratio will be slightly
different from 4:1 or 16:1 depending on VS, TA and R
EXT
.
Typically this error is less than 1% (Figures 4 and 6).
1.04
R
= 5k
1.03
1.02
1.01
1.00
0.99
0.98
NORMALIZED FILTER CUTOFF
0.97
0.96
Figure 2. Filter Cutoff vs V
Divide-by-1 Mode, TA = 25°C
4.08
4.04
DIVIDE RATIO
4.00
3.96
Figure 4. Typical Divide Ratio in the
Divide-by-4 Mode, TA = 25°C
EXT
= 10k
R
EXT
= 20k
R
EXT
= 40k
R
EXT
2
46810
V
(V)
SUPPLY
SUPPLY
R
= 5k
EXT
= 10k
R
EXT
= 20k
R
EXT
= 40k
R
EXT
2
46810
V
(V)
SUPPLY
1569-7 F02
,
1569-7 F04
6
Page 7
LTC1569-7
U
WUU
APPLICATIONS INFORMATION
1.010
–50
VS = 3V
= 5V
V
S
= 10V
V
S
–25
0255075100
TEMPERATURE (°C)
= 10k
EXT
1569-7 F05
1.010
1.008
1.006
1.004
1.002
1.000
0.998
0.996
NORMALIZED FILTER CUTOFF
0.994
0.992
0.990
–50
Figure 7. Filter Cutoff vs Temperature,
Divide-by-16 Mode, R
1.008
1.006
1.004
1.002
1.000
0.998
0.996
NORMALIZED FILTER CUTOFF
0.994
0.992
0.990
Figure 5. Filter Cutoff vs Temperature,
Divide-by-4 Mode, R
VS = 3V
= 5V
V
S
= 10V
V
S
–25
0255075100
TEMPERATURE (°C)
= 10k
EXT
16.32
R
= 5k
EXT
= 10k
R
EXT
= 20k
R
EXT
= 40k
R
16.16
DIVIDE RATIO
16.00
15.84
EXT
2
46810
V
(V)
SUPPLY
Figure 6. Typical Divide Ratio in the
Divide-by-16 Mode, TA = 25°C
1569-7 F07
1569-7 F06
The cutoff frequency is easily estimated from the equation
in Figure 1. Examples 1 and 2 illustrate how to use the
graphs in Figures 2 through 7 to get a more precise
estimate of the cutoff frequency.
Example 1: LTC1569-7, R
= 20k, VS = 3V, divide-by-16
EXT
mode, DIV/CLK (Pin␣ 5) connected to V+ (Pin 7), TA = 25°C.
Using the equation in Figure 1, the approximate filter
cutoff frequency is f
= 128kHz • (10k/20k)
CUTOFF
• (1/16) = 4kHz.
For a more precise f
a value of f
CUTOFF
when R
estimate, use Table 1 to get
CUTOFF
= 20k and use the graph
EXT
in Figure 6 to find the correct divide ratio when VS = 3V
and R
= 20k. Based on Table 1 and Figure 6, f
EXT
CUTOFF
= 64kHz • (20.18k/20k) • (1/16.02) = 4.03kHz.
From Table 1, the part-to-part variation of f
CUTOFF
will
be ±2%. From the graph in Figure 7, the 0°C to 70°C
drift of f
Example 2: LTC1569-7, R
will be –0.2% to 0.2%.
CUTOFF
EXT
= 5k, VS = 5V, divide-by-1
mode, DIV/CLK (Pin␣ 5) connected to V– (Pin 4), TA = 25°C.
Using the equation in Figure 1, the approximate filter
cutoff frequency is f
= 128kHz • (10k/5k)
CUTOFF
• (1/1) = 256kHz.
For a more precise f
f
frequency for R
CUTOFF
estimate, use Table 1 to get
CUTOFF
= 5k and use Figure 2 to
EXT
correct for the supply voltage when VS = 5V. From
Table␣ 1 and Figure 2, f
= 256k • (5.01k/5k) •
CUTOFF
0.970 = 249kHz.
7
Page 8
LTC1569-7
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WUU
APPLICATIONS INFORMATION
The oscillator is sensitive to transients on the positive
supply. The IC should be soldered to the PC board and the
PCB layout should include a 1µF ceramic capacitor be-
tween V+ (Pin 7) and V– (Pin 4) , as close as possible to
the IC to minimize inductance. Avoid parasitic capacitance
on RX and avoid routing noisy signals near RX (Pin 6). Use
a ground plane connected to V– (Pin 4) for single supply
applications. Connect a ground plane to GND (Pin 3) for
dual supply applications and connect V– (Pin 4) to a
copper trace with low thermal resistance.
Input and Output Range
The input signal range includes the full power supply
range. The output voltage range is typically (V– + 50mV)
to (V+ – 0.8V). To maximize the undistorted peak-to-peak
signal swing of the filter, the GND (Pin 3) voltage should
be set to 2V (1.11V) in single 5V (3V) supply applications.
The LTC1569-7 can be driven with a single-ended or
differential signal. When driven differentially, the voltage
between IN+ and IN– (Pin 1 and Pin 2) is filtered with a DC
gain of 1. The single-ended output voltage OUT (Pin 8) is
referenced to the voltage of the GND (Pin 3). The common
mode voltage of IN+ and IN– can be any voltage that keeps
the input signals within the power supply range.
For noninverting single-ended applications, connect IN
to GND or to a quiet DC reference voltage and apply the
input signal to IN+. If the input is DC coupled then the DC
gain from IN+ to OUT will be 1. This is true given IN+ and
OUT are referenced to the same voltage, i.e., GND, V– or
some other DC reference. To achieve the distortion levels
shown in the Typical Performance Characteristics the
–
2
IN
+
IN
– GND
i =
125k
+
1
IN
3
GND
125k
+
–
–
+
8
125k
1569-7 F08
Figure 8
–
OUT
input signal at IN+ should be centered around the DC
voltage at IN–. The input can also be AC coupled, as shown
in the Typical Applications section.
For inverting single-ended filtering, connect IN+ to GND or
to quiet DC reference voltage. Apply the signal to IN–. The
DC gain from IN– to OUT is –1, assuming IN– is referenced
to IN+ and OUT is reference to GND.
Refer to the Typical Performance Characteristics section
to estimate the THD for a given input level.
Dynamic Input Impedance
The unique input sampling structure of the LTC1569-7 has
a dynamic input impedance which depends on the configuration, i.e., differential or single-ended, and the clock
frequency. The equivalent circuit in Figure 8 illustrates the
input impedance when the cutoff frequency is 128kHz. For
other cutoff frequencies replace the 125k value with
125k • (128kHz/f
When driven with a single-ended signal into IN– with IN
CUTOFF
).
+
tied to GND, the input impedance is very high (~10MΩ).
When driven with a single-ended signal into IN+ with IN
–
tied to GND, the input impedance is a 125k resistor to GND.
When driven with a complementary signal whose common mode voltage is GND, the IN+ input appears to have
125k to GND and the IN– input appears to have –125k to
GND. To make the effective IN– impedance 125k when
driven differentially, place a 62.5k resistor from IN– to
GND. For other cutoff frequencies use 62.5k • (128kHz/
f
), as shown in the Typical Applications section. The
CUTOFF
typical variation in dynamic input impedance for a given
clock frequency is ±10%.
Wideband Noise
The wideband noise of the filter is the RMS value of the
device’s output noise spectral density. The wideband
noise data is used to determine the operating signal-tonoise at a given distortion level. The wideband noise is
nearly independent of the value of the clock frequency and
excludes the clock feedthrough. Most of the wideband
noise is concentrated in the filter passband and cannot be
removed with post filtering (Table 2). Table 3 lists the
typical wideband noise for each supply.
8
Page 9
LTC1569-7
U
WUU
APPLICATIONS INFORMATION
Table 2. Wideband Noise vs Supply Voltage, Single 3V Supply
BandwidthTotal Integrated Noise
DC to f
CUTOFF
DC to 2 • f
DC to f
Table 3. Wideband Noise vs Supply Voltage, f
Power SupplyDC to 2 • f
3V125µV
5V135µV±5V145µV
CUTOFF
CLK
Clock Feedthrough
Clock feedthrough is defined as the RMS value of the clock
frequency and its harmonics that are present at the filter’s
OUT pin (Pin 8). The clock feedthrough is measured with
IN+ and IN– (Pins 1 and 2) grounded and depends on the
PC board layout and the power supply decoupling. Table␣ 4
shows the clock feedthrough (the RMS sum of the first 11
harmonics) when the LTC1569-7 is self-clocked with
R
= 10k, DIV/CLK (Pin 5) open (divide-by-4 mode). The
EXT
clock feedthrough can be reduced with a simple RC post
filter.
Table 4. Clock Feedthrough
Power SupplyFeedthrough
3V0.4mV
5V0.6mV
±5V0.9mV
DC Accuracy
DC accuracy is defined as the error in the output voltage
after DC offset and DC gain errors are removed. This is
similar to the definition of the integral nonlinearity in A/D
converters. For example, after measuring values of V
vs V
shows that V
for a typical LTC1569-7, a linear regression
IN(DC)
OUT(DC)
= V
• 0.99854 + 0.00134V is the
IN(DC)
straight line that best fits the data. The DC accuracy
describes how much the actual data deviates from this
straight line (i.e., DCERROR = V
OUT(DC)
+ 0.00134V). In a 12-bit system with a full-scale value of
2V, the LSB is 488µV. Therefore, if the DCERROR of the
filter is less than 488µV over a 2V range, the filter has
105µV
RMS
125µV
RMS
155µV
RMS
= 128kHz
CUTOFF
Total Integrated Noise
CUTOFF
RMS
RMS
RMS
RMS
RMS
RMS
OUT(DC)
– (V
IN(DC)
• 0.99854
12-bit DC accuracy. Figure 9 illustrates the typical DC
accuracy of the LTC1569-7 on a single 5V supply.
488
244
000
DC ERROR (µV)
–244
VS = 5V
= 10k
R
EXT
= 25°C
T
–488
A
–1.5 –1.0 –0.500.51.01.5
VIN DC (V)
1569-7 F09
Figure 9
DC Offset
The output DC offset of the LTC1569-7 is trimmed to less
than ±5mV. The trimming is performed with VS = 1.9V,
–1.1V with the filter cutoff frequency set to 8kHz (R
EXT
=
10k, DIV/CLK shorted to V+). To obtain optimum DC offset
performance, appropriate PC layout techniques should be
used. The filter IC should be soldered to the PC board. The
power supplies should be well decoupled including a 1µF
ceramic capacitor from V+ (Pin 7) to V– (Pin 4). A ground
plane should be used. Noisy signals should be isolated
from the filter input pins.
When the power supply is 3V, the output DC offset should
not change more than ±2mV when the clock frequency
varies from 64kHz to 8192kHz. When the clock frequency
is fixed, the output DC offset will typically change by ±3mV
(±15mV) when the power supply varies from 3V to 5V
(±5V) in the divide-by-1 mode. In the divide-by-4 or
divide-by-16 modes, the output DC offset will typically
change –9mV (–27mV) when the power supply varies
from 3V to 5V (±5V). The offset is measured with respect
to GND (Pin 3).
Aliasing
Aliasing is an inherent phenomenon of sampled data
filters. In lowpass filters significant aliasing only occurs
when the frequency of the input signal approaches the
sampling frequency or multiples of the sampling frequency. The LTC1569-7 samples the input signal twice
9
Page 10
LTC1569-7
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WUU
APPLICATIONS INFORMATION
every clock period. Therefore, the sampling frequency is
twice the clock frequency and 64 times the filter cutoff
frequency. Input signals with frequencies near 2 • f
± f
will be aliased to the passband of the filter and
CUTOFF
CLK
appear at the output unattenuated.
Power Supply Current
The power supply current depends on the operating mode.
When the LTC1569-7 is in the divide-by-1 mode, or when
U
TYPICAL APPLICATIOS
Single 3V Operation, AC Coupled Input,
128kHz Cutoff Frequency
0.1µF
18
V
IN
3V
3.48k
f
CUTOFF
1µF
2k
+
IN
27
–
IN
LTC1569-7
36
GND
45
–
DIV/CLK
V
128kHz
=
()
()
n = 1
R
n = 1, 4, 16 FOR PIN 5 AT
GROUND, OPEN, V
OUT
10k
EXT
V
OUT
R
= 10k
EXT
+
V
R
X
1569-7 TA02
+
3V
1µF
clocked externally, the supply current is reduced by 50%
for supply voltages below 4V. For the divide-by-4 and
divide-by-16 modes, the supply current is reduced by
60% relative to the current when clocked externally,
independent of the power supply voltage. Power supply
current versus cutoff frequency for various operating
modes is shown in the “Typical Performance Characteristics” section.
Single 3V, AC Coupled Input,
128kHz Cutoff Frequency
16µs
14µs
1569-7 TA02a
12µs
140k020k80k 100k40k 60k120k
0
–10
–20
–30
GAIN (dB)
–40
–50
–60
–70
–80
–90
80k 100k160k 180k240k 260k120k 140k200k 220k280k
0300k
FREQUENCY (Hz)
GROUP DELAY
10
Single 3V Supply Operation, DC Coupled,
32kHz Cutoff Frequency
18
V
3V
3.48k
2k
1µF
f
CUTOFF
+
IN
IN
27
–
IN
LTC1569-7
36
GND
45
–
DIV/CLK
V
128kHz
=
()
()
n = 4
R
n = 1, 4, 16 FOR PIN 5 AT
GROUND, OPEN, V
OUT
10k
EXT
V
OUT
R
= 10k
EXT
+
V
R
X
100pF
+
1µF
1569-7 TA04
Single 5V Operation, 300kHz Cutoff Frequency,
DC Coupled Differential Inputs with Balanced Input Impedance
+
V
IN
®
1460-2.5
5V
IN
GND
3V
LT
(SOT-23)
OUT
–
V
IN
18
+
IN
27
–
IN
LTC1569-7
27k
36
GND
1µF
45
–
V
DIV/CLK
f
128kHz
~
CUTOFF
()
()
n = 1
4.1k
n = 1, 4, 16 FOR PIN 5 AT
GROUND, OPEN, V
OUT
10k
V
OUT
R
EXT
+
V
R
X
+
= 4.1k
5V
1µF
1569-7 TA03
Page 11
TYPICAL APPLICATION
LTC1569-7
U
Dual 5V Supply Operation,
DC Coupled Filter with External Clock Source
18
V
0.1µF
–5V
+
IN
IN
27
–
IN
LTC1569-7
36
GND
45
–
DIV/CLK
V
1µF
OUT
V
OUT
f
CUTOFF
+
V
R
X
PACKAGE DESCRIPTION
Single 5V Supply Operation, DC Coupled Input,
128kHz Cutoff Frequency
18
= f
CLK
f
CLK
/32
0.1µF
≤ 10MHz
1569-7 TA05
V
5V
5V
0V
5V
2.49k
1.65k
f
CUTOFF
+
IN
IN
27
IN
36
GND
1µF
45
V
128kHz
=
()
n = 1
n = 1, 4, 16 FOR PIN 5 AT
GROUND, OPEN, V
OUT
–
LTC1569-7
–
DIV/CLK
10k
()
R
EXT
U
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
7
8
5
6
V
OUT
R
= 10k
EXT
+
V
R
X
+
5V
1µF
1569-7 TA06
0.228 – 0.244
(5.791 – 6.197)
0.010 – 0.020
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
× 45°
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
0.150 – 0.157**
(3.810 – 3.988)
1
3
2
4
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
TYP
SO8 0996
11
Page 12
LTC1569-7
TYPICAL APPLICATIOS
U
Pulse Shaping Circuit for Single 3V Operation, 300kbps
2 level data, 150kHz Cutoff Filter
+3V
20k
300kbps
DATA
4.99k
20k
+3V
3.48k
2k
18
+
IN
27
–
IN
LTC1569-7
36
GND
1µF
45
–
DIV/CLK
V
OUT
V
R
EXT
+
V
R
X
2-Level, 300kbps Eye Diagram
OUT
= 8.56k
+3V
1µF
1569-7 TA09
Pulse Shaping Circuit for Single 3V Operation, 400kbps
(200ksps) 4 Level Data, 128kHz Cutoff Filter
D
1
D
0
200ksps
DATA
4.99k
10k
+3V
20k
20k
+3V
3.48k
2k
18
+
IN
OUT
27
–
IN
LTC1569-7
36
GND
1µF
45
–
V
DIV/CLK
+
V
R
X
4-Level, 400kbps (200ksps)
Eye Diagram
R
V
EXT
OUT
= 8.56k
+3V
1µF
1569-7 TA10
0.25V/DIV
1µs/DIV
1569-7 TA07
RELATED PARTS
PART NUMBERDESCRIPTIONCOMMENTS
LTC1064-3Linear Phase, Bessel 8th Order Filterf
LTC1064-7Linear Phase, 8th Order Lowpass Filterf
LTC1068-xUniversal, 8th Order Filterf
LTC1069-7Linear Phase, 8th Order Lowpass Filterf
LTC1164-7Low Power, Linear Phase Lowpass Filterf
LTC1264-7Linear Phase, 8th Order Lowpass Filterf
LTC1562/LTC1562-2Universal, 8th Order Active RC Filterf
CLK/fCUTOFF
CLK/fCUTOFF
CLK/fCUTOFF
CLK/fCUTOFF
CLK/fCUTOFF
CLK/fCUTOFF
CUTOFF(MAX)
f
CUTOFF(MAX)
0.3V/DIV
1µs/DIV
1569-7 TA08
= 75/1 or 150/1, Very Low Noise
= 50/1 or 100/1, f
CUTOFF(MAX)
= 25/1, 50/1, 100/1 or 200/1, f
= 25/1, f
CUTOFF(MAX)
= 100kHz
CUTOFF(MAX)
= 200kHz, SO-8
= 50/1 or 100/1, IS = 2.5mA, VS = 5V
= 25/1 or 50/1, f
CUTOFF(MAX)
= 200kHz
= 150kHz (LTC1562)
= 300kHz (LTC1562-2)
= 200kHz
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear-tech.com
15697f LT/TP 0300 4K • PRINTED IN THE USA
LINEAR TECHNOLOGY CORPORATION 1998
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