Page 1
Low Power, 10th Order Lowpass Filter
Final Electrical Specifications
FEATURES
■
One External R Sets Cutoff Frequency
■
Root Raised Cosine Response
■
3mA Supply Current with a Single 3V Supply
■
Up to 64kHz Cutoff on a Single 3V Supply
■
10th Order, Linear Phase Filter in an SO-8
■
DC Accurate, V
■
Low Power Modes
■
Differential or Single-Ended Inputs
■
80dB CMRR (DC)
■
82dB Signal-to-Noise Ratio, VS = 5V
■
Operates from 3V to ±5V Supplies
OS(MAX)
= 5mV
U
APPLICATIO S
■
Data Communication Filters for 3V Operation
■
Linear Phase and Phase Matched Filters for I/Q
Signal Processing
■
Pin Programmable Cutoff Frequency Lowpass Filters
U
DESCRIPTIO
The LTC®1569-6 is a 10th order lowpass filter featuring
linear phase and a root raised cosine amplitude response.
The high selectivity of the LTC1569-6 combined with its
linear phase in the passband makes it suitable for filtering
both in data communications and data acquisition sys-
LTC1569-6
Linear Phase, DC Accurate,
September 1999
tems.
Furthermore, its root raised cosine response offers
the optimum pulse shaping for PAM data communications
. The filter attenuation is 50dB at 1.5 • f
at 2 • f
, and in excess of 80dB at 6 • f
CUTOFF
accuracy-sensitive applications benefit from the 5mV
maximum DC offset.
The LTC1569-6 sampled data filter does not require an
external clock yet its cutoff frequency can be set with a
single external resistor with a typical accuracy of 3.5% or
better
. The external resistor programs an internal oscillator whose frequency is divided by either 1, 4 or 16 prior to
being applied to the filter network. Pin 5 determines the
divider setting. Thus, up to three cutoff frequencies can be
obtained for each external resistor value. Using various
resistor values and divider settings, the cutoff frequency
can be programmed over a range of six octaves. Alternatively, the cutoff frequency can be set with an external
clock and the clock-to-cutoff frequency ratio is 64:1. The
ratio of the internal sampling rate to the filter cutoff
frequency is 128:1.
The LTC1569-6 is fully tested for a cutoff frequency of
64kHz with a single 3V supply.
The LTC1569-6 features power saving modes and it is
available in an SO-8 surface mount package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
CUTOFF
CUTOFF
, 60db
. DC-
TYPICAL APPLICATIO
Single 3V Supply, 64kHz/16kHz/4kHz Lowpass Filter
18
+
IN
IN
3V
3.48k
2k
27
–
IN
LTC1569-6
36
GND
1µF
45
–
V
EASY TO SET f
CUTOFF
64kHz (10k/R
=
f
U
Frequency Response, f
0
OUTV
V
OUT
= 10k
R
EXT
+
V
R
X
1/16
EXT
1/4
1/1
)
DIV/CLK
:
CUTOFF
1, 4 OR 16
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
3V
1µF
3V
100pF
1569-6 TA01
–20
–40
GAIN (dB)
–60
–80
–100
1
= 64kHz/16kHz/4kHz
CUTOFF
10 100 1000
FREQUENCY (kHz)
1569-6 TA01a
1
Page 2
LTC1569-6
1
2
3
4
8
7
6
5
TOP VIEW
OUT
V
+
R
X
DIV/CLK
IN
+
IN
–
GND
V
–
S8 PACKAGE
8-LEAD PLASTIC SO
WU
A
W
O
LUTEXI TIS
S
A
WUW
ARB
U
G
PACKAGE
/
O
RDER I FOR ATIO
(Note 1)
Total Supply Voltage................................................ 11V
Power Dissipation.............................................. 500mW
Operating Temperature ................................ 0°C to 70°C
ORDER PART
NUMBER
LTC1569CS8-6
Storage Temperature ............................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
S8 PART
MARKING
T
= 125°C, θJA = 150°C/W
JMAX
Consult factory for Industrial and Military grade parts.
LECTRICAL C CHARA TERIST
E
ICS
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = 3V (V+ = 3V, V– = 0V), f
PARAMETER CONDITIONS MIN TYP MAX UNITS
Filter Gain VS = 5V, f
Filter Phase VS = 2.7V, f
Filter Cutoff Accuracy R
when Self-Clocked V
Filter Output DC Swing VS = 3V, Pin 3 = 1.11V 2.1 V
(Note 6) ● 1.9 V
2
= 64kHz, R
CUTOFF
= 4.096MHz, fIN = 1280Hz = 0.02 • f
CLK
= 64kHz, VIN = 1.4V
f
CUTOFF
= 10k, Pin 5 Shorted to Pin 4 fIN = 32kHz = 0.5 • f
R
EXT
VS = 2.7V, f
f
CUTOFF
Pin 6 Shorted to Pin 4, External Clock f
f
CUTOFF
Pin 4, External Clock f
= 10.24k from Pin 6 to Pin 7, 62.5kHz ±1%
EXT
= 3V, Pin 5 Shorted to Pin 4
S
VS = 5V, Pin 3 = 2V 3.6 V
VS = ±5V, Pin 5 Shorted to Pin 7, R
= 1MHz, fIN = 312Hz = 0.02 • f
CLK
= 15.625kHz, VIN = 1V
= 4MHz, fIN = 1250Hz = 0.02 • f
CLK
= 62.5kHz, Pin 6 Shorted to fIN = 12.5kHz = 0.2 • f
= 10k unless otherwise specified.
LOAD
,f
P-P
,f
P-P
LOAD
= 12.8kHz = 0.2 • f
IN
f
= 51.2kHz = 0.8 • f
IN
= 64kHz = f
f
IN
= 97.5kHz = 1.5 • f
f
IN
f
= 128kHz = 2 • f
IN
= 192kHz = 3 • f
f
IN
= 3125kHz = 0.2 • f
IN
= 7812kHz = 0.5 • f
IN
= 12.5kHz = 0.8 • f
f
IN
= 15.625kHz = f
f
IN
f
= 23.44kHz = 1.5 • f
IN
= 31.25kHz = 2 • f
f
IN
= 46.88kHz = 3 • f
f
IN
= 31.25kHz = 0.5 • f
IN
= 50kHz = 0.8 • f
f
IN
f
= 62.5kHz = f
IN
= 93.75kHz = 1.5 • f
f
IN
= 20k 8.5 V
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
CUTOFF
● –0.05 0.05 0.15 dB
● –0.25 –0.15 –0.05 dB
● –0.65 –0.55 –0.4 dB
● –1.3 –1.0 –0.7 dB
● –5.3 –3.8 –2.4 dB
● –60 –48 dB
● –62 –50 dB
● –71 –60 dB
● –0.12 0.05 0.16 dB
● –0.25 –0.15 –0.05 dB
● –0.65 –0.55 –0.4 dB
● –1.1 –0.9 –0.7 dB
● –3.6 –3.4 –3.2 dB
● –54 –50 dB
● –60 –55 dB
● –66 –60 dB
● – 114 –111 –108 Deg
● 79 82 85 Deg
● –83 –79 –75 Deg
● 156 162 168 Deg
● 3.2 V
15696
–11 Deg
–91 Deg
U
P-P
P-P
P-P
P-P
P-P
Page 3
LTC1569-6
LECTRICAL C CHARA TERIST
E
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = 3V (V+ = 3V, V– = 0V), f
PARAMETER CONDITIONS MIN TYP MAX UNITS
Output DC Offset R
(Note 2) V
Output DC Offset Drift R
Clock Pin Logic Thresholds VS = 3V Min Logical “1” 2.7 V
when Clocked Externally Max Logical “0” 0.5 V
Power Supply Current f
(Note 3) Pin 5 Open, ÷ 4), f
Clock Feedthrough Pin 5 Open 0.1 mV
Wideband Noise Noise BW = DC to 2 • f
THD fIN = 3kHz, 1.5V
Clock-to-Cutoff 64
Frequency Ratio
Max Clock Frequency VS = 3V 5 MHz
(Note 4) V
Min Clock Frequency VS = 3V, 5V, TA < 85°C 1.5 kHz
(Note 5) V
Input Frequency Range Aliased Components <–65dB 0.9 • f
Note 1: Absolute maximum ratings are those values beyond which the life
of a device may be impaired.
Note 2: DC offset is measured with respect to Pin 3.
Note 3: If the internal oscillator is used as the clock source and the divide-
by-4 or divide-by-16 mode is enabled, the supply current is reduced as
much as 40% relative to the divide-by-1 mode.
= 4.096MHz, f
CLK
= 10k, Pin 5 Shorted to Pin 7 VS = 3V ±2 ±5mV
EXT
= 10k, Pin 5 Shorted to Pin 7 VS = 3V 25 µV/°C
EXT
VS = 5V Min Logical “1” 4.0 V
VS = ±5V Min Logical “1” 4.0 V
= 256kHz (40k from Pin 6 to Pin 7, VS = 3V 3 4 mA
CLK
f
= 4.096MHz (10k from Pin 6 to Pin 7, VS = 3V 8 mA
CLK
Pin 5 Shorted to Pin 4, ÷ 1), f
P-P
= 5V 5 MHz
S
= ±5V 7 MHz
V
S
= ±5V 3kHz
S
ICS
= 64kHz, R
CUTOFF
= 4kHz ● 5mA
CUTOFF
= 64kHz ● 11 mA
CUTOFF
CUTOFF
, f
= 32kHz 80 dB
CUTOFF
= 10k unless otherwise specified.
LOAD
= 5V ±6 ±12 mV
S
= ±5V ±15 mV
V
S
= 5V 25 µV/°C
V
S
V
= ±5V 75 µV/°C
S
Max Logical “0” 0.5 V
Max Logical “0” 0.5 V
VS = 5V 3.5 5 mA
● 6mA
VS = 10V 4.5 7 mA
● 8mA
V
= 5V 9 mA
S
VS = 10V 12 mA
Note 4: The maximum clock frequency is arbitrarily defined as the
frequency at which the filter AC response exhibits >1dB of gain peaking.
Note 5: The minimum clock frequency is arbitrarily defined as the frequecy
at which the filter DC offset changes by more than 5mV.
Note 6: For more details refer to the Input and Output Voltage Range
paragraph in the Applications Information section.
● 13 mA
● 17 mA
95 µV
CLK
RMS
RMS
Hz
3
Page 4
LTC1569-6
UW
TYPICAL PERFOR A CE CHARACTERISTICS
–60
–65
–70
–75
THD (dB)
–80
–85
–90
0
VS = 5V
PIN 3 = 2V
VIN = 1.5V
P-P
f
= 32kHz
CUTOFF
+
IN
TO OUT
5 10 15 20 25 30
INPUT FREQUENCY (kHz)
1569-6 G01
THD (dB)
UUU
PIN FUNCTIONS
THD vs Input VoltageTHD vs Input Frequency
–50
–55
–60
–65
–70
–75
–80
–85
–90
VS = 3V
PIN 3 = 1.11V
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
0
INPUT VOLTAGE (V
VS = 5V
PIN 3 = 2V
fIN = 3kHz
f
CUTOFF
+
IN
TO OUT
)
P-P
= 32kHz
1569-6 G02
IN+/IN– (Pins 1, 2): Signals can be applied to either or
both input pins. The DC gain from IN+ (Pin 1) to OUT
(Pin␣ 8) is 1.0, and the DC gain from Pin 2 to Pin 8 is –1. The
input range, input resistance and output range are described in the Applications Information section. Input
voltages which exceed the power supply voltages should
be avoided. Transients will not cause latchup if the current
into/out of the input pins is limited to 20mA.
GND (Pin 3): The GND pin is the reference voltage for the
filter and should be externally biased to 2V (1.11V) to
maximize the dynamic range of the filter in applications
using a single 5V (3V) supply. For single supply operation,
the GND pin should be bypassed with a quality 1µF
ceramic capacitor to V– (Pin 4). The impedance of the
circuit biasing the GND pin should be less than 2kΩ as the
GND pin generates a small amount of AC and DC current.
For dual supply operation, connect Pin␣ 3 to a high quality
DC ground. A ground plane should be used. A poor ground
will increase DC offset, clock feedthrough, noise and
distortion.
+
V–/V
(Pins 4, 7): For 3V, 5V and ±5V applications a
quality 1µF ceramic bypass capacitor is required from V
+
(Pin 7) to V– (Pin 4) to provide the transient energy for the
internal clock drivers. The bypass should be as close as
possible to the IC. In dual supply applications (Pin 3 is
grounded), an additional 0.1µF bypass from V+ (Pin 7) to
GND (Pin 3) and V– (Pin 4) to GND (Pin 3) is recommended.
The maximum voltage difference between GND (Pin 3) and
V+ (Pin 7) should not exceed 5.5V.
DIV/CLK (Pin 5): DIV/CLK serves two functions. When the
internal oscillator is enabled, DIV/CLK can be used to
engage an internal divider. The internal divider is set to 1:1
when DIV/CLK is shorted to V– (Pin 4). The internal divider
is set to 4:1 when DIV/CLK is allowed to float (a 100pF
bypass to V– is recommended). The internal divider is set
to 16:1 when DIV/CLK is shorted to V+ (Pin 7). In the
divide-by-4 and divide-by-16 modes the power supply
current is reduced by as much as 40%.
When the internal oscillator is disabled (RX shorted
to V–) DIV/CLK becomes an input pin for applying an
external clock signal. For proper filter operation, the clock
waveform should be a squarewave with a duty cycle as
close as possible to 50% and CMOS voltages levels (see
Electrical Characteristics section for voltage levels). DIV/
CLK pin voltages which exceed the power supply voltages
should be avoided. Transients will not cause latchup if the
fault current into/out of the DIV/CLK pin is limited to 40mA.
4
Page 5
UUU
PIN FUNCTIONS
LTC1569-6
RX (Pin 6): Connecting an external resistor between the R
X
pin and V+ (Pin 7) enables the internal oscillator. The value
of the resistor determines the frequency of oscillation. The
maximum recommended resistor value is 40k and the
minimum is 3.8k. The internal oscillator is disabled by
shorting the RX pin to V– (Pin 4). (Please refer to the
Applications Information section.)
W
BLOCK DIAGRA
+
1 OUT
IN
10TH ORDER
LINEAR PHASE
FILTER NETWORK
POWER
CONTROL
IN
GND
–
2
3
–
4
V
OUT (Pin 8): Filter Output. This pin can drive 10kΩ and/or
40pF loads. For larger capacitive loads, an external 100Ω
series resistor is recommended. The output pin can exceed the power supply voltages by up to ±2V without
latchup.
8
+
7
V
R
EXT
6
R
X
DIVIDER/
BUFFER
5
DIV/CLK
PRECISION
OSCILLATOR
U
WUU
APPLICATIONS INFORMATION
Self-Clocking Operation
The LTC1569-6 features a unique internal oscillator which
sets the filter cutoff frequency using a single external
resistor
64kHz, where the filter cutoff frequency error is typically
<1% when a 0.1% external 10k resistor is used. With
different resistor values and internal divider settings, the
cutoff frequency can be accurately varied from 1kHz to
64kHz. As shown in Figure 1, the divider is controlled by
the DIV/CLK (Pin 5). Table 1 summarizes the cutoff
frequency vs external resistor values for the divide-by-1
mode.
. The design is optimized for VS = 3V, f
CUTOFF
=
1569-6 BD
+
IN
–
IN
LTC1569-6
GND
–
DIV/CLK
V
64kHz (10k/R
1, 4 OR 16
OUT
+
V
R
X
)
EXT
18
27
36
45
f
=
CUTOFF
Figure 1
R
EXT
DIVIDE-BY-16
DIVIDE-BY-4
100pF
DIVIDE-BY-1
1569-6 F01
+
V
–
V
5
Page 6
LTC1569-6
U
WUU
APPLICATIONS INFORMATION
Table1. f
R
EXT
3844Ω* N/A ±3.0%
5010Ω* N/A ±2.5%
10k 64kHz ±1%
20.18k 32kHz ±2.0%
40.2k 16kHz ±3.5%
*REXT values less than 10k can be used only in the divide-by-16 mode.
In the divide-by-4 and divide-by-16 modes, the cutoff
frequencies in Table 1 will be lowered by 4 and 16
respectively. When the LTC1569-6 is in the divide-by-4
vs R
CUTOFF
1.04
1.03
1.02
1.01
1.00
0.99
0.98
NORMALIZED FILTER CUTOFF
0.97
0.96
, VS = 3V, T
EXT
Typical f
R
R
R
R
2
CUTOFF
= 5k
EXT
= 10k
EXT
= 20k
EXT
= 40k
EXT
4 6 810
Figure 2. Filter Cutoff vs V
Divide-by-1 Mode, T
= 25°C, Divide-by-1 Mode
A
Typical Variation of f
V
(V)
SUPPLY
= 25°C
A
SUPPLY
1569-6 F02
,
CUTOFF
and divide-by-16 modes the power is automatically reduced. This results in up to a 40% power savings with a
single 5V supply.
The power reduction in the divide-by-4 and divide-by-16
modes, however, effects the fundamental oscillator frequency. Hence, the effective divide ratio will be slightly
different from 4:1 or 16:1 depending on VS, TA and R
EXT
.
Typically this error is less than 1% (Figures 4 and 6).
The cutoff frequency is easily estimated from the equation
in Figure 1. Examples 1 and 2 illustrate how to use the
graphs in Figures 2 through 7 to get a more precise
estimate of the cutoff frequency.
1.010
–50
VS = 3V
= 5V
V
S
= 10V
V
S
–25
0 25 50 75 100
TEMPERATURE (°C)
= 10k
EXT
1569-6 F03
1.008
1.006
1.004
1.002
1.000
0.998
0.996
NORMALIZED FILTER CUTOFF
0.994
0.992
0.990
Figure 3. Filter Cutoff vs Temperature,
Divide-by-1 Mode, R
6
4.08
R
= 5k
EXT
= 10k
R
EXT
= 20k
R
EXT
= 40k
R
4.04
DIVIDE RATIO
4.00
3.96
EXT
2
4 6 810
V
(V)
SUPPLY
Figure 4. Typical Divide Ratio in the
Divide-by-4 Mode, T
= 25°C
A
1569-6 F04
1.010
–50
VS = 3V
= 5V
V
S
= 10V
V
S
–25
0 25 50 75 100
TEMPERATURE (°C)
1569-6 F05
1.008
1.006
1.004
1.002
1.000
0.998
0.996
NORMALIZED FILTER CUTOFF
0.994
0.992
0.990
Figure 5. Filter Cutoff vs Temperature,
Divide-by-4 Mode, R
EXT
= 10k
Page 7
LTC1569-6
U
WUU
APPLICATIONS INFORMATION
16.32
R
= 5k
EXT
= 10k
R
EXT
= 20k
R
EXT
= 40k
R
16.16
DIVIDE RATIO
16.00
15.84
Figure 6. Typical Divide Ratio in the
Divide-by-16 Mode, T
Example 1: LTC1569-6, R
mode, DIV/CLK (Pin␣ 5) connected to V+ (Pin 7), TA = 25°C.
Using the equation in Figure 1, the approximate filter
cutoff frequency is f
• (1/16) = 2kHz.
For a more precise f
a value of f
CUTOFF
in Figure 6 to find the correct divide ratio when VS = 3V
and R
= 20k. Based on Table 1 and Figure 6, f
EXT
= 32kHz • (20.18k/20k) • (1/16.02) = 2.01kHz.
From Table 1, the part-to-part variation of f
be ±2%. From the graph in Figure 7, the 0°C to 70°C
drift of f
CUTOFF
EXT
2
4 6 810
V
(V)
SUPPLY
= 25°C
A
= 20k, VS = 3V, divide-by-16
EXT
= 64kHz • (10k/20k)
CUTOFF
estimate, use Table 1 to get
CUTOFF
when R
= 20k and use the graph
EXT
will be –0.2% to 0.2%.
1569-6 F06
CUTOFF
CUTOFF
will
1.010
–50
VS = 3V
= 5V
V
S
= 10V
V
S
–25
0 25 50 75 100
TEMPERATURE (°C)
= 10k
EXT
1569-6 F07
1.008
1.006
1.004
1.002
1.000
0.998
0.996
NORMALIZED FILTER CUTOFF
0.994
0.992
0.990
Figure 7. Filter Cutoff vs Temperature,
Divide-by-16 Mode, R
the IC to minimize inductance. Avoid parasitic capacitance
on RX and avoid routing noisy signals near RX (Pin 6). Use
a ground plane connected to V– (Pin 4) for single supply
applications. Connect a ground plane to GND (Pin 3) for
dual supply applications and connect V– (Pin 4) to a
copper trace with low thermal resistance.
Input and Output Voltage Range
The input signal range includes the full power supply
range. For a single 3V supply, the output voltage swing is
typciallly 2.1V
and at least 1.9V
P-P
over the commercial
P-P
temperature range. For single 5V and ±5V supplies, the
output swing depends on clock frequency and divider
setting.
Example 2: LTC1569-6, R
= 10k, VS = 5V, divide-by-1
EXT
mode, DIV/CLK (Pin␣ 5) connected to V– (Pin 4), TA = 25°C.
Using the equation in Figure 1, the approximate filter
cutoff frequency is f
= 64kHz • (10k/10k)
CUTOFF
• (1/1) = 64kHz.
For a more precise f
estimate, use Figure 2 to
CUTOFF
correct for the supply voltage when VS = 5V. From
Table␣ 1 and Figure 2, f
= 64k • (10k/10k) • 0.970
CUTOFF
= 62.1kHz.
The oscillator is sensitive to transients on the positive
supply. The IC should be soldered to the PC board and the
PCB layout should include a 1µF ceramic capacitor be-
tween V+ (Pin 7) and V– (Pin 4) , as close as possible to
For R
VS = 5V, the output swing is typically 3.6V
(3.2V
divide-by-16 modes (f
= 10k, divide-by-1 mode (f
EXT
0°C to 70°C). For R
P-P
CUTOFF
= 64kHz) and
CUTOFF
P-P
= 10k, divide-by-4 or
EXT
= 16kHz or 4kHz) and
VS = 5V, the output swing is typically limited to
V
= V– + 80mV and V
MIN
For R
= 10k, divide-by-1 mode and VS = ±5V, the output
EXT
voltage is typically 5V
R
= 10k, divide-by-4 mode (f
EXT
VS = ±5V, the output voltage range is typically 6.3V
(5.8V
(f
CUTOFF
typically 8.5V
0°C to 70°C). For R
P-P
= 4kHz) and VS = ±5V, the output voltage is
(7.5V
P-P
output voltage range increases as R
= V+ – 1V or 3.92V
MAX
(4.3V
P-P
EXT
0°C to 70°C). In each case, the
P-P
0°C to 70°C). For
P-P
= 16kHz) and
CUTOFF
= 10k, divide-by-16 mode
is increased until
EXT
P-P
.
P-P
7
Page 8
LTC1569-6
U
WUU
APPLICATIONS INFORMATION
it reaches the typical limits V
voltage swings are for R
R
= 20k for VS = ±5V.
LOAD
LOAD
To maximize the undistorted peak-to-peak signal swing of
the filter, the GND (Pin 3) voltage should be set to 2V
(1.11V) in single 5V (3V) supply applications.
The LTC1569-6 can be driven with a single-ended or
differential signal. When driven differentially, the voltage
between IN+ and IN– (Pin 1 and Pin 2) is filtered with a DC
gain of 1. The single-ended output voltage OUT (Pin 8) is
referenced to the voltage of the GND (Pin 3). The common
mode voltage of IN+ and IN– can be any voltage that keeps
the input signals within the power supply range.
For noninverting single-ended applications, connect IN
to GND or to a quiet DC reference voltage and apply the
input signal to IN+. If the input is DC coupled then the DC
gain from IN+ to OUT will be 1. This is true given IN+ and
OUT are referenced to the same voltage, i.e., GND, V– or
some other DC reference. To achieve the distortion levels
shown in the Typical Performance Characteristics the
input signal at IN+ should be centered around the DC
voltage at IN–. The input can also be AC coupled, as shown
in the Typical Applications section.
For inverting single-ended filtering, connect IN+ to GND or
to quiet DC reference voltage. Apply the signal to IN–. The
DC gain from IN– to OUT is –1, assuming IN– is referenced
to IN+ and OUT is reference to GND.
Refer to the Typical Performance Characteristics section
to estimate the THD for a given input level.
Dynamic Input Impedance
MAX
and V
. The above
MIN
= 10k for VS = 3V and 5V.
–
When driven with a complementary signal whose common mode voltage is GND, the IN+ input appears to have
125k to GND and the IN– input appears to have –125k to
GND. To make the effective IN– impedance 125k when
driven differentially, place a 62.5k resistor from IN– to
GND. For other cutoff frequencies use 62.5k • (128kHz/
f
), as shown in the Typical Applications section. The
CUTOFF
typical variation in dynamic input impedance for a given
clock frequency is ±10%.
Wideband Noise
The wideband noise of the filter is the RMS value of the
device’s output noise spectral density. The wideband
noise data is used to determine the operating signal-tonoise at a given distortion level. The wideband noise is
nearly independent of the value of the clock frequency and
excludes the clock feedthrough. Most of the wideband
noise is concentrated in the filter passband and cannot be
removed with post filtering (Table 2). Table 3 lists the
typical wideband noise for each supply.
Table 2. Wideband Noise vs Supply Voltage, Single 3V Supply
Bandwidth Total Integrated Noise
DC to f
CUTOFF
DC to 2 • f
DC to f
Table 3. Wideband Noise vs Supply Voltage, f
Power Supply DC to 2 • f
3V 95µV
5V 100µV
±5V 105µV
CUTOFF
CLK
80µV
RMS
95µV
RMS
110µV
RMS
= 64kHz
CUTOFF
Total Integrated Noise
CUTOFF
RMS
RMS
RMS
The unique input sampling structure of the LTC1569-6 has
a dynamic input impedance which depends on the configuration, i.e., differential or single-ended, and the clock
frequency. The equivalent circuit in Figure 8 illustrates the
input impedance when the cutoff frequency is 64kHz. For
other cutoff frequencies replace the 125k value with
125k • (64kHz/f
When driven with a single-ended signal into IN– with IN
CUTOFF
).
+
tied to GND, the input impedance is very high (~10MΩ).
When driven with a single-ended signal into IN+ with IN
–
tied to GND, the input impedance is a 125k resistor to GND.
8
Clock Feedthrough
Clock feedthrough is defined as the RMS value of the clock
frequency and its harmonics that are present at the filter’s
OUT pin (Pin 8). The clock feedthrough is measured with
IN+ and IN– (Pins 1 and 2) grounded and depends on the
PC board layout and the power supply decoupling. Table␣ 4
shows the clock feedthrough (the RMS sum of the first 11
harmonics) when the LTC1569-7 is self-clocked with
R
= 10k, DIV/CLK (Pin 5) open (divide-by-4 mode). The
EXT
clock feedthrough can be reduced with a simple RC post
filter.
Page 9
LTC1569-6
U
WUU
APPLICATIONS INFORMATION
Table 4. Clock Feedthrough
Power Supply Feedthrough
3V 0.1mV
5V 0.3mV
±5V 0.9mV
DC Accuracy
DC accuracy is defined as the error in the output voltage
after DC offset and DC gain errors are removed. This is
similar to the definition of the integral nonlinearity in A/D
converters. For example, after measuring values of V
vs V
shows that V
for a typical LTC1569-6, a linear regression
IN(DC)
OUT(DC)
= V
• 0.99854 + 0.00134V is the
IN(DC)
straight line that best fits the data. The DC accuracy
describes how much the actual data deviates from this
straight line (i.e., DCERROR = V
OUT(DC)
– (V
+ 0.00134V). In a 12-bit system with a full-scale value of
2V, the LSB is 488µV. Therefore, if the DCERROR of the
filter is less than 488µV over a 2V range, the filter has
12-bit DC accuracy. Figure 9 illustrates the typical DC
accuracy of the LTC1569-6 on a single 5V supply.
DC Offset
The output DC offset of the LTC1569-6 is trimmed to less
than ±5mV. The trimming is performed with VS = 1.9V,
–1.1V with the filter cutoff frequency set to 4kHz (R
10k, DIV/CLK shorted to V+). To obtain optimum DC offset
performance, appropriate PC layout techniques should be
RMS
RMS
RMS
IN(DC)
OUT(DC)
• 0.99854
=
EXT
used. The filter IC should be soldered to the PC board. The
power supplies should be well decoupled including a 1µF
ceramic capacitor from V+ (Pin 7) to V– (Pin 4). A ground
plane should be used. Noisy signals should be isolated
from the filter input pins.
When the power supply is 3V, the output DC offset should
change less than ±2mV when the clock frequency varies
from 64kHz to 4096kHz. When the clock frequency is
fixed, the output DC offset will typically change by less
than ±3mV (±15mV) when the power supply varies from
3V to 5V (±5V) in the divide-by-1 mode. In the divide-by4 or divide-by-16 modes, the output DC offset will typically
change less than –9mV (– 27mV) when the power supply
varies from 3V to 5V (±5V). The offset is measured with
respect to GND (Pin 3).
Aliasing
Aliasing is an inherent phenomenon of sampled data
filters. In lowpass filters significant aliasing only occurs
when the frequency of the input signal approaches the
sampling frequency or multiples of the sampling frequency. The LTC1569-6 samples the input signal twice
every clock period. Therefore, the sampling frequency is
twice the clock frequency and 128 times the filter cutoff
frequency. Input signals with frequencies near 2 • f
± f
will be aliased to the passband of the filter and
CUTOFF
CLK
appear at the output unattenuated.
IN+ – GND
i =
GND
IN
125k
IN
488
–
2
+
1
3
125k
+
244
–
0
DC ERROR (µV)
–244
VS = 5V
= 10k
R
EXT
= 25°C
T
A
–488
–1.5 –1.0 –0.5 0 0.5 1.0 1.5
VIN DC (V)
Figure 9
1569-6 F09
–
+
125k
Figure 8
–
8
OUT
+
1569-6 F06
9
Page 10
LTC1569-6
U
TYPICAL APPLICATIO S
Single 3V Operation, AC Coupled Input,
64kHz Cutoff Frequency
0.1µF
18
V
IN
3V
3.48k
f
CUTOFF
1µF
2k
+
IN
27
–
IN
LTC1569-6
36
GND
45
–
DIV/CLK
V
64kHz
=
()
()
n = 1
R
n = 1, 4, 16 FOR PIN 5 AT
GROUND, OPEN, V
OUT
V
R
10k
EXT
V
OUT
R
EXT
+
X
+
Single 3V Supply Operation, DC Coupled,
16kHz Cutoff Frequency
18
V
3V
3.48k
2k
1µF
f
CUTOFF
+
IN
IN
27
–
IN
LTC1569-6
36
GND
45
–
DIV/CLK
V
64kHz
=
()
()
n = 4
R
n = 1, 4, 16 FOR PIN 5 AT
GROUND, OPEN, V
OUT
10k
EXT
V
OUT
R
= 10k
EXT
+
V
R
X
100pF
+
= 10k
1569-6 TA02
1µF
1569-6 TA04
1µF
Single 3V, AC Coupled Input,
64kHz Cutoff Frequency
GROUP DELAY
32µs
28µs
1569-6 TA02a
24µs
70k0 10k 40k 50k20k 30k 60k
3V
0
–10
–20
–30
GAIN (dB)
–40
–50
–60
–70
–80
–90
40k 50k 80k 90k 120k 130k60k 70k 100k 110k 140k
0 150k
FREQUENCY (Hz)
Single 5V Operation, 50kHz Cutoff Frequency,
DC Coupled Differential Inputs with Balanced Input Impedance
+
V
IN
3V
®
LT
(SOT-23)
5V
IN
1460-2.5
GND
OUT
–
V
IN
18
+
IN
27
–
IN
LTC1569-6
9.4k
36
GND
1µF
45
–
DIV/CLK
V
64kHz
~
f
CUTOFF
()
()
n = 1
12.8k
n = 1, 4, 16 FOR PIN 5 AT
GROUND, OPEN, V
OUT
10k
V
OUT
R
EXT
+
V
R
X
+
= 12.8k
5V
1µF
1569-6 TA03
10
±5V Supply Operation, DC Coupled Filter with External Clock Source
18
V
0.1µF
–5V
+
IN
IN
27
–
IN
LTC1569-6
36
GND
45
–
V
DIV/CLK
1µF
OUT
V
OUT
f
CUTOFF
+
V
R
X
= f
–5V
CLK
f
CLK
/64
5V
0.1µF
5V
0V
≤ 5MHz
1569-6 TA05
Page 11
PACKAGE DESCRIPTION
U
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
7
8
5
6
LTC1569-6
0.228 – 0.244
(5.791 – 6.197)
0.010 – 0.020
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
×
°
45
0.016 – 0.050
(0.406 – 1.270)
0°– 8° TYP
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
TYP
0.150 – 0.157**
(3.810 – 3.988)
1
3
2
4
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
SO8 1298
11
Page 12
LTC1569-6
U
TYPICAL APPLICATIO S
Single 5V Supply Operation, DC Coupled Input,
16kHz Cutoff Frequency
18
V
5V
2.49k
1.65k
f
CUTOFF
+
IN
IN
27
–
IN
LTC1569-6
36
GND
1µF
45
–
DIV/CLK
V
64kHz
=
()
()
n = 4
R
n = 1, 4, 16 FOR PIN 5 AT
GROUND, OPEN, V
OUT
10k
EXT
V
OUT
R
= 10k
EXT
+
V
R
X
100pF
+
1569-6 TA06
5V
1µF
0.5V/DIV
INPUT 32ksps (OR 64kbps) 1569-6 TA07
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LTC1064-3 Linear Phase, Bessel 8th Order Filter f
LTC1064-7 Linear Phase, 8th Order Lowpass Filter f
LTC1068-x Universal, 8th Order Filter f
LTC1069-7 Linear Phase, 8th Order Lowpass Filter f
LTC1164-7 Low Power, Linear Phase Lowpass Filter f
LTC1264-7 Linear Phase, 8th Order Lowpass Filter f
LTC1562/LTC1562-2 Universal, 8th Order Active RC Filter f
CLK/fCUTOFF
CLK/fCUTOFF
CLK/fCUTOFF
CLK/fCUTOFF
CLK/fCUTOFF
CLK/fCUTOFF
CUTOFF(MAX)
f
CUTOFF(MAX)
= 75/1 or 150/1, Very Low Noise
= 50/1 or 100/1, f
CUTOFF(MAX)
= 25/1, 50/1, 100/1 or 200/1, f
= 25/1, f
CUTOFF(MAX)
= 200kHz, SO-8
= 100kHz
CUTOFF(MAX)
= 50/1 or 100/1, IS = 2.5mA, VS = 5V
= 25/1 or 50/1, f
CUTOFF(MAX)
= 200kHz
= 150kHz (LTC1562)
= 300kHz (LTC1562-2)
= 200kHz
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear-tech.com
15696i LT/TP 0999 4K • PRINTED IN THE USA
LINEAR TECHNOLOGY CORPORATION 1999
Loading...