Datasheet LTC1546 Datasheet (Linear Technology)

Final Electrical Specifications

FEATURES

■

Software-Selectable Transceiver Supports:
RS232, RS449, EIA530, EIA530-A, V.35, V.36, X.21

■

TUV Telecom Services Inc. Certified NET1,
NET2 and TBR2 Compliant

■

On-Chip Cable Termination

■

Pin Compatible with LTC1543

■

Complete DTE or DCE Port with LTC1544

■

Operates from Single 5V Supply

■

Small Footprint

LTC1546

Software-Selectable

Multiprotocol Transceiver

with Termination

December 1999

U

DESCRIPTIO

The LTC®1546 is a 3-driver/3-receiver multiprotocol trans­ceiver with on-chip cable termination. When combined with
the LTC1544, this chip set forms a complete software­selectable DTE or DCE interface port that supports the
RS232, RS449, EIA530, EIA530-A, V.35, V.36 and X.21
protocols. All necessary cable termination is provided inside
the LTC1546. In most applications, the LTC1546 replaces
both an LTC1543 and an LTC1344A without any changes to
the PC board.

U

APPLICATIO S

■

Data Networking

■

CSU and DSU

■

Data Routers

TYPICAL APPLICATIO

Complete DTE or DCE Multiprotocol Serial Interface with DB-25 Connector

LL

D4

R2 R1R4

R3

U

LTC1544

D3

DTRDSR DCDCTS

D2 D1

RTS

The LTC1546 runs from a single 5V supply using an internal
charge pump that requires only five space-saving surface
mounted capacitors. The LTC1546 is available in a 28-lead
SSOP surface mount package.

, LTC and LT are registered trademarks of Linear Technology Corporation.

RXCRXD

LTC1546

R1R2R3

TXDSCTETXC

D1

D2D3

TTTTT

CTS B

LL A (141)

DSR A (109)

DSR B

CTS A (106)

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

DCD A (107)

DCD B

DTR B

RTS A (105)

RTS B

DTR A (108)

SG (102)

SHIELD (101)

RXD B

DB-25 CONNECTOR

RXC B

RXD A (104)

RXC A (115)

TXC B

TXC A (114)

SCTE B

SCTE A (113)

TXD B

21424111512179314192062322513 81018 7 16

TXD A (103)

1546 TA01

1

LTC1546

PACKAGE/ORDER I FOR ATIO

UU

W

WWWU

ABSOLUTE AXI U RATI GS

(Note 1)

Supply Voltage ....................................................... 6.5V

Input Voltage

Transmitters ........................... –0.3V to (VCC + 0.3V)

Receivers............................................... –18V to 18V

Logic Pins .............................. –0.3V to (VCC + 0.3V)

Output Voltage

Transmitters ................. (VEE – 0.3V) to (VDD + 0.3V)

Receivers................................ –0.3V to (VCC + 0.3V)

VEE........................................................ –10V to 0.3V

VDD....................................................... –0.3V to 10V

Short-Circuit Duration

Transmitter Output ..................................... Indefinite

Receiver Output.......................................... Indefinite

VEE.................................................................. 30 sec

Operating Temperature Range

LTC1546C ............................................... 0°C to 70°C

LTC1546I........................................... –40°C to 85°C

Storage Temperature Range ................ –65°C to 150°C

Lead Temperature (Soldering, 10 sec)................. 300°C

TOP VIEW

–

1

C1

+

2

C1

3

V

DD

4

V

CC

5

D1

6

D2

7

D3

8

R1

9

R2

10

R3

11

M0

12

M1

13

M2

14

DCE/DTE

*θJA SOLDERED TO A TYPICAL CIRCUIT BOARD
IS TYPICALLY 60°C/W

CHARGE PUMP

D1

D2

D3

R1

R2

R3

G PACKAGE

28-LEAD PLASTIC SSOP

T

= 150°C, θJA = 90°C/W*

JMAX

T

T

ORDER PART

+

C2

28

–

C2

27

V

26

EE

GND

25

D1 A

24

D1 B

23

D2 A

22

D2 B

21

D3/R1 A

20

T

D3/R1 B

19

R2 A

18

T

R2 B

17

R3 A

16

T

R3 B

15

NUMBER

LTC1546CG
LTC1546IG

Consult factory for Military grade parts.

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. VCC = 5V (Notes 2, 3)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Supplies

I

CC

P

D

+

V

–

V

VCC Supply Current (DCE Mode, RS530, RS530-A, X.21 Modes, No Load 14 mA
All Digital Pins = GND or V

) RS530, RS530-A, X.21 Modes, Full Load ● 100 130 mA

CC

V.35 Mode

● 126 170 mA

V.28 Mode, No Load 20 mA
V.28 Mode, Full Load ● 35 75 mA
No-Cable Mode

● 60 500 µA

Internal Power Dissipation (DCE Mode) RS530, RS530-A, X.21 Modes, Full Load 410 mW

V.35 Mode, Full Load 625 mW
V.28 Mode, Full Load 150 mW

Positive Charge Pump Output Voltage V.11 or V.28 Mode, No Load ● 8.0 9.3 V

V.35 Mode
V.28 Mode, with Load
V.28 Mode, with Load, I

= 10mA 6.5 V

DD

● 7.0 8.0 V

● 8.0 8.7 V

Negative Charge Pump Output Voltage V.28 Mode, No Load –9.6 V

V.28 Mode, Full Load
V.35 Mode
RS530, RS530-A, X.21 Modes, Full Load

● – 7.5 –8.5 V

● – 5.5 –6.5 V

● – 4.5 –6.0 V

2

LTC1546

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. VCC = 5V (Notes 2, 3)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

f

OSC

t

r

Logic Inputs and Outputs

V

IH

V

IL

I

IN

V

OH

V

OL

I

OSR

I

OZR

V.11 Driver

V

ODO

V

ODL

∆V

OD

V

OC

∆V

OC

I

SS

I

OZ

tr, t

f

t

PLH

t

PHL

∆t Input to Output Difference, t
t

SKEW

V.11 Receiver

V

TH

∆V

TH

R

IN

tr, t

f

t

PLH

t

PHL

∆t Input to Output Difference, t

V.35 Driver

V

OD

VOA, V
V

OC

Charge Pump Oscillator Frequency 500 kHz
Charge Pump Rise Time No-Cable Mode/Power-Off to Normal Operation 2 ms

Logic Input High Voltage ● 2V
Logic Input Low Voltage ● 0.8 V
Logic Input Current D1, D2, D3 ● ±10 µA

M0, M1, M2, DCE = GND
M0, M1, M2, DCE = V

CC

● –120 –75 – 30 µA

● ±10 µA

Output High Voltage IO = –3mA ● 3 4.5 V
Output Low Voltage IO = 3mA ● 0.3 0.45 V
Output Short-Circuit Current 0V ≤ VO ≤ V

CC

Three-State Output Current M0 = M1 = M2 = VCC, 0V ≤ VO ≤ V

CC

● –50 50 mA

±1 µA

Open Circuit Differential Output Voltage RL = 1.95k (Figure 1) ● ±5V
Loaded Differential Output Voltage RL = 50Ω (Figure 1) 0.5V

= 50Ω (Figure 1) ● ±2V

R

L

ODO

0.67V

ODO

Change in Magnitude of Differential RL = 50Ω (Figure 1) ● 0.2 V
Output Voltage

Common Mode Output Voltage RL = 50Ω (Figure 1) ● 3V
Change in Magnitude of Common Mode RL = 50Ω (Figure 1) ● 0.2 V

Output Voltage
Short-Circuit Current V
Output Leakage Current V

= GND ±150 mA

OUT

 and VB ≤ 0.25V, Power Off or ● ±1 ±100 µA

A

No-Cable Mode or Driver Disabled

Rise or Fall Time (Figures 2, 13) ● 21525 ns
Input to Output Rising (Figures 2, 13) ● 15 40 65 ns
Input to Output Falling (Figures 2, 13) ● 15 40 65 ns

– t

PLH

 (Figures 2, 13) ● 0312 ns

PHL

Output to Output Skew (Figures 2, 13) 3 ns

Input Threshold Voltage –7V ≤ VCM ≤ 7V ● –0.2 0.2 V
Input Hysteresis –7V ≤ VCM ≤ 7V ● 15 40 mV
Input Impedance –7V ≤ VCM ≤ 7V (Figure 3) ● 100 103 Ω
Rise or Fall Time CL = 50pF (Figures 4, 14) 15 ns
Input to Output Rising CL = 50pF (Figures 4, 14) ● 50 90 ns
Input to Output Falling CL = 50pF (Figures 4, 14) ● 50 90 ns

– t

 C

PLH

PHL

= 50pF (Figures 4, 14) ● 0425 ns

L

Differential Output Voltage Open Circuit, RL = 1.95k (Figure 5) ● ±1.2 V

With Load, –4V ≤ V

Single-Ended Output Voltage Open Circuit, RL = 1.95k (Figure 5) ● ±1.2 V

OB

≤ 4V (Figure 6) ±0.44 ±0.55 ±0.66 V

CM

Transmitter Output Offset RL = 50Ω (Figure 5) ● ±0.6 V

V

3

LTC1546

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. VCC = 5V (Notes 2, 3)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

I

OH

I

OL

I

OZ

R

OD

R

OC

tr, t

f

t

PLH

t

PHL

∆t Input to Output Difference, t
t

SKEW

V.35 Receiver

V

TH

∆V

TH

R

ID

R

IC

tr, t

f

t

PLH

t

PHL

∆t Input to Output Difference, t

V.28 Driver

V

O

I

SS

R

OZ

SR Slew Rate RL = 7k, CL = 0 (Figures 11, 15) ● 430V/µs
t

PLH

t

PHL

V.28 Receiver
V

THL

V

TLH

∆V

TH

R

IN

tr, t

f

t

PLH

t

PHL

Transmitter Output High Current VA, VB = 0V ● – 13 –11 – 9.0 mA
Transmitter Output Low Current VA, VB = 0V ● 9.0 11 13 mA
Transmitter Output Leakage Current V

 and VB ≤ 0.25V ● ±1 ±100 µA

A

Transmitter Differential Mode Impedance ● 50 100 150 Ω
Transmitter Common Mode Impedance – 2V ≤ VCM ≤ 2V (Figure 7) 135 150 165 Ω
Rise or Fall Time (Figures 8, 13) 5 ns
Input to Output (Figures 8, 13) ● 15 35 65 ns
Input to Output (Figures 8, 13) ● 15 35 65 ns

– t

PLH

 (Figures 8, 13) ● 016 ns

PHL

Output to Output Skew (Figures 8, 13) 4 ns

Differential Receiver Input Threshold Voltage –2V ≤ VCM ≤ 2V (Figure 9) ● –0.2 0.2 V
Receiver Input Hysteresis –2V ≤ VCM ≤ 2V (Figure 9) ● 15 40 mV
Receiver Differential Mode Impedance –2V ≤ VCM ≤ 2V ● 90 103 110 Ω
Receiver Common Mode Impedance –2V ≤ VCM ≤ 2V (Figure 10) 135 150 165 Ω
Rise or Fall Time CL = 50pF (Figures 4, 14) 15 ns
Input to Output CL = 50pF (Figures 4, 14) ● 50 90 ns
Input to Output CL = 50pF (Figures 4, 14) ● 50 90 ns

– t

PLH

 C

PHL

= 50pF (Figures 4, 14) ● 0425 ns

L

Output Voltage Open Circuit ● ±10 V

= 3k (Figure 11) ● ±5 ±8.5 V

R

L

Short-Circuit Current V

= GND ● ±150 mA

OUT

Power-Off Resistance –2V < VO < 2V, Power Off ● 300 Ω

or No-Cable Mode

Input to Output RL = 3k, CL = 2500pF (Figures 11, 15) ● 1.5 2.5 µs
Input to Output RL = 3k, CL = 2500pF (Figures 11, 15) ● 1.5 2.5 µs

Input Low Threshold Voltage (Figure 12) ● 1.2 0.8 V
Input High Threshold Voltage (Figure 12) ● 2 1.2 V
Receiver Input Hysteresis (Figure 12) ● 0 0.05 0.3 V
Receiver Input Impedance – 15V ≤ VA ≤ 15V ● 357 kΩ
Rise or Fall Time CL = 50pF (Figures 12, 16) 15 ns
Input to Output CL = 50pF (Figures 12, 16) ● 60 300 ns
Input to Output CL = 50pF (Figures 12, 16) ● 160 300 ns

Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.

Note 2: All currents into device pins are positive; all currents out of device
are negative. All voltages are referenced to device ground unless otherwise
specified.

4

Note 3: All typicals are given for V

= 3.3µF and TA = 25°C.

C

VEE

= 5V, C1 = C2 = C

CC

VCC

= C

VDD

= 1µF,

LTC1546

U

UU

PI FU CTIO S

C1–␣ (Pin 1): Capacitor C1 Negative Terminal. Connect a
1µF capacitor between C1+ and C1–.

C1+ (Pin 2): Capacitor C1 Positive Terminal. Connect a
1µF capacitor between C1+ and C1–.

VDD (Pin 3): Generated Positive Supply Voltage for
V.28. Connect a 1µF capacitor to ground.

VCC (Pin 4): Positive Supply Voltage Input. 4.75V ≤ V
≤ 5.25V. Bypass with a 1µF capacitor to ground.

D1 (Pin 5): TTL Level Driver 1 Input.
D2 (Pin 6): TTL Level Driver 2 Input.
D3 (Pin 7): TTL Level Driver 3 Input.
R1 (Pin 8): CMOS Level Receiver 1 Output.
R2 (Pin 9): CMOS Level Receiver 2 Output.
R3 (Pin 10): CMOS Level Receiver 3 Output.
M0 (Pin 11): TTL Level Mode Select Input 0 with Pull-Up

to VCC. See Table 1.
M1 (Pin 12): TTL Level Mode Select Input 1 with Pull-Up

to VCC. See Table 1.
M2 (Pin 13): TTL Level Mode Select Input 2 with Pull-Up

to VCC. See Table 1.

CC

R3 B (Pin 15): Receiver 3 Noninverting Input.
R3 A (Pin 16): Receiver 3 Inverting Input.
R2 B (Pin 17): Receiver 2 Noninverting Input.
R2 A (Pin 18): Receiver 2 Inverting Input.
D3/R1 B (Pin 19): Receiver 1 Noninverting Input and

Driver 3 Noninverting Output.
D3/R1 A (Pin 20): Receiver 1 Inverting Input and Driver 3

Inverting Output.

D2 B (Pin 21): Driver 2 Noninverting Output.
D2 A (Pin 22): Driver 2 Inverting Output.
D1 B (Pin 23): Driver 1 Noninverting Output.
D1 A (Pin 24): Driver 1 Inverting Output.
GND (Pin 25): Ground.
VEE (Pin 26): Negative Supply Voltage. Connect a 3.3µF

capacitor to GND.
C2– (Pin 27): Capacitor C2 Negative Terminal. Connect a

1µF capacitor between C2+ and C2–.
C2+ (Pin 28): Capacitor C2 Positive Terminal. Connect a

1µF capacitor between C2+ and C2–.

DCE/DTE (Pin 14): TTL Level Mode Select Input with Pull­Up to VCC. See Table 1.

5

LTC1546

BLOCK DIAGRA

W

CHARGE

PUMP

–

C1

+

C1

2

V

3

DD

V

4

CC

50Ω

–

+

C1

C2

+

–

C1

C2

V

V

DD

EE

V

GND

CC

+

C2

281

–

C2

27

V

26

EE

GND

25

D1A

24

DCE/DTE

D1

D2

D3

R1

R2

D1

5

D2

6

D3

7

14

8

9

S1

S2

125Ω

50Ω

D1B

23

22

D2A

50Ω

S1

S2

125Ω

50Ω

D2B

21

20

19

18

D3/R1 A

D3/R1 B

R2A

20k

10k 6k

S3

S2

10k

20k

R1

20k

6k

10k

R2

S3

S2

125Ω

51.5Ω

S1

125Ω

51.5Ω

51.5Ω

6

10k

20k
20k

6k

10k

R3

10

R3

10k

20k

S3

S2

125Ω

51.5Ω

51.5Ω

51.5Ω

R2B

17

R3A

16

R3B

15

1546 BD

A

B

D

1546 F02

R

L

100Ω

C

L

100pF

C

L

100pF

A

B

1546 F04

R

C

L

R

A

1546 F12

C

L

V

A

TEST CIRCUITS

D

LTC1546

R

B

A

L

V

OD

V

R

OC

L

1546 F01

Figure 1. V.11 Driver DC Test Circuit

I

B

B

I

A

VCM = ±7V

+
–

A

2(VB – VA)

RIN =

Figure 3. Input Impedance Test Circuit

V

OB

125Ω

V

50Ω

50Ω

OA

R

L

V

OD

V

R

OC

L

1546 F05

Figure 5. V.35 Driver Open-Circuit Test

R

I

– I

B

A

1546 F03

V

OB

50Ω

125Ω 125Ω

50Ω

V

OA

Figure 6. V.35 Driver Test Circuit

50Ω

50Ω

1546 F06

Figure 2. V.11 Driver AC Test Circuit

Figure 4. V.11, V.35 Receiver AC Test Circuit

50Ω

125Ω

V

CM

50Ω

1546 F07

+
–

Figure 7. V.35 Driver Common Mode
Impedance Test Circuit

= ±2V

V

CM

50Ω50Ω

50Ω

1546 F08

125Ω

+

V

TH

–
+

V

CM

–

1546 F09

125Ω

50Ω

Figure 8. V.35 Driver AC Test Circuit Figure 9. V.35 Receiver DC Test Circuit

CM

–

+

= ±2V

V

Figure 10. Receiver Common Mode

51.5Ω
125Ω

51.5Ω

1546 F10

Impedance Test Circuit

D

A

R

C

L

L

1546 F11

Figure 11. V.28 Driver Test Circuit Figure 12. V.28 Receiver Test Circuit

7

LTC1546

W

U

ODE SELECTIO

Table 1

LTC1546 MODE NAME M2 M1 M0 DCE/DTE D1 D2 D3 R1 R2 R3

Not Used (Default V.11) 0000V.11 V.11 Z V.11 V.11 V.11
RS530A 0010V.11 V.11 Z V.11 V.11 V.11
RS530 0100V.11 V.11 Z V.11 V.11 V.11
X.21 0110V.11 V.11 Z V.11 V.11 V.11
V.35 1000V.35 V.35 Z V.35 V.35 V.35
RS449/V.36 1010V.11 V.11 Z V.11 V.11 V.11
V.28/RS232 1100V.28 V.28 Z V.28 V.28 V.28
No Cable 1110ZZZZZZ
Not Used (Default V.11) 0001V.11 V.11 V.11 Z V.11 V.11
RS530A 0011V.11 V.11 V.11 Z V.11 V.11
RS530 0101V.11 V.11 V.11 Z V.11 V.11
X.21 0111V.11 V.11 V.11 Z V.11 V.11
V.35 1001V.35 V.35 V.35 Z V.35 V.35
RS449/V.36 1011V.11 V.11 V.11 Z V.11 V.11
V.28/RS232 1101V.28 V.28 V.28 Z V.28 V.28
No Cable 1111ZZZZZZ

UWW

SWITCHI G TI E WAVEFOR S

B – A

B – A

–V

5V

D

0V

V

O

–V

O

A

B

V

O

1.5V 1.5V

t

PLH

50%

90%

10%

t

r

t

SKEW

Figure 13. V.11, V.35 Driver Propagation Delays

V

OD2

OD2

V

OH

R

V

OL

0V

t

PLH

1.5V

f = 1MHz : tr ≤ 10ns : tf ≤ 10ns

1/2 V

O

f = 1MHz : tr ≤ 10ns : tf ≤ 10ns

INPUT

OUTPUT

t

PHL

90%

0V

t

PHL

50%

10%

t

f

1.5V

t

SKEW

1546 F13

1546 F14

8

Figure 14. V.11, V.35 Receiver Propagation Delays

UWW

SWITCHI G TI E WAVEFOR S

LTC1546

3V

D

0V

V

O

A

–V

O

1.5V

t

PHL

3V

0V

SR =

–3V

t

f

Figure 15. V.28 Driver Propagation Delays

V

IH

A

V

IL

V

OH

R

V

OL

1.3V

t

PHL

0.8V

Figure 16. V.28 Receiver Propagation Delays

WUUU

APPLICATIO S I FOR ATIO

1.5V

t

PLH

6V

t

f

–3V

1.7V

t

0V

PLH

3V

6V

SR =

t

t

r

2.4V

1546 F15

r

1546 F16

Overview

The LTC1546 and LTC1544 form a complete software­selectable DTE or DCE interface port that supports the
RS232, RS449, EIA530, EIA530-A, V.35, V.36 and X.21
protocols. Cable termination is provided on-chip, elimi­nating the need for discrete termination designs.

A complete DCE-to-DTE interface operating in EIA530
mode is shown in Figure 17. The LTC1546 half of each port
is used to generate and appropriately terminate the clock
and data signals. The LTC1544 is used to generate the
control signals along with LL (Local Loopback).

Mode Selection

The interface protocol is selected using the mode select
pins M0, M1 and M2 (see Table 1).

For example, if the port is configured as a V.35 interface,
the mode selection pins should be M2 = 1, M1 = 0, M0 = 0.
For the control signals, the drivers and receivers will
operate in V.28 (RS232) electrical mode. For the clock and
data signals, the drivers and receivers will operate in V.35

electrical mode. The DCE/DTE pin will configure the port
for DCE mode when high, and DTE when low.

The interface protocol may be selected simply by plugging
the appropriate interface cable into the connector. The
mode pins are routed to the connector and are left uncon­nected (1) or wired to ground (0) in the cable as shown in
Figure 18. The internal pull-up current sources will ensure
a binary 1 when a pin is left unconnected.

The mode selection may also be accomplished by using
jumpers to connect the mode pins to ground or VCC.

When the cable is removed, leaving all mode pins uncon­nected, the LTC1546/LTC1544 will enter no-cable mode.
In this mode the LTC1546/LTC1544 supply current drops
to less than 500µA and the LTC1546/LTC1544 driver
outputs are forced into a high impedance state. At the
same time, the R2 and R3 receivers of the LTC1546 are
differentially terminated with 103Ω and the other receiv­ers on the LTC1546 and LTC1544 are terminated with
30kΩ to ground.

9

LTC1546

WUUU

APPLICATIO S I FOR ATIO

SERIAL

CONTROLLER

TXD

LTC1546

D1

TXD

103Ω

DCEDTE

LTC1546

SERIAL

CONTROLLER

R3

TXD

SCTE

TXC

RXC

RXD

RTS

DTR

DCD

D2

D3

R1

R2

R3

LTC1544

D1

D2

D3

R1

103Ω

103Ω

103Ω

SCTE

TXC

RXC

RXD

RTS

DTR

DCD

103Ω

R2

R1

D3

D2

D1

LTC1544

R3

R2

R1

D3

SCTE

TXC

RXC

RXD

RTS

DTR

DCD

DSR

CTS

R2

R3

LL

D4 R4

R4

DSR

CTS

Figure 17. Complete Multiprotocol Interface in EIA530 Mode

Cable Termination

Traditional implementations used expensive relays to
switch resistors or required the user to change termina­tion modules every time a new interface standard was
selected. Switching the terminations with FETs is difficult
because the FETs must remain off when the signal voltage
is beyond the supply voltage. Alternatively, custom cables

10

D2

D1

LL

D4

DSR

CTS

LL

1546 F17

may contain termination in the cable head or route signals
to various terminations on the board.

The LTC1546/LTC1544 chipset solves the cable termina­tion switching problem by automatically providing the
appropriate termination and switching on-chip for the
V.10 (RS423), V.11 (RS422), V.28 (RS232) and V.35
electrical protocols.

AA

'

CC

'

GENERATOR

BALANCED

INTERCONNECTING

CABLE

LOAD

CABLE

TERMINATION

RECEIVER

1546 F19

WUUU

APPLICATIO S I FOR ATIO

LTC1546

(DATA)

11

M0

LTC1546

DCE/DTE

DCE/DTE

LTC1544

M1

M2

M2

M1

M0

(DATA)

12

13

14

14

13

12

11

Figure 18: Single Port DCE V.35 Mode Selection in the Cable

V.10 (RS423) Interface

All V.10 drivers and receivers necessary for the RS449,
EIA530, EIA530-A, V.36 and X.21 protocols are imple­mented on the LTC1544.

CONNECTOR

NC

NC

CABLE

1546 F18

A typical V.10 unbalanced interface is shown in Figure 19.
A V.10 single-ended generator with output A and ground
C is connected to a differential receiver with input A' con­nected to A, and ground C' connected via the signal return
to ground C. Usually, no cable termination is required for
V.10 interfaces, but the receiver inputs must be compliant
with the impedance curve shown in Figure 20.

The V.10 receiver configuration in the LTC1544 is shown
in Figure 21. In V.10 mode, switch S3 inside the LTC1544
is turned off. The noninverting input is disconnected
inside the LTC1544 receiver and connected to ground. The
cable termination is then the 30k input impedance to
ground of the LTC1544 V.10 receiver.

V.11 (RS422) Interface

A typical V.11 balanced interface is shown in Figure 22. A
V.11 differential generator with outputs A and B and
ground C is connected to a differential receiver with input
A' connected to A, input B' connected to B, and ground C'
connected via the signal return to ground C. The V.11

–3.25mA

Figure 19. Typical V.10 Interface

I

Z

–10V

–3V

3V 10V

Figure 20. V.10 Receiver Input Impedance

1546 F20

3.25mA

V

Z

11

LTC1546

WUUU

APPLICATIO S I FOR ATIO

A

A

'

R5

R8

20k

6k

S3

R4

B

B'

C'

20k

GND

Figure 21. V.10 Receiver Configuration

BALANCED

INTERCONNECTING

GENERATOR

AA'

B

C

CABLE

B'

C'

Figure 22. Typical V.11 Interface

LTC1544

R6

RECEIVER

10k

R7
10k

CABLE

TERMINATION

100Ω
MIN

1546 F21

LOAD

RECEIVER

1546 F22

A

'

R1

51.5Ω

S1

R3

S2

124Ω

R2

51.5Ω

B

'

C

'

R8
6k

S3

GND

R5

20k

R4

20k

R6
10k

R7
10k

LTC1546

RECEIVER

1546 F23

Figure 23. V.11 Receiver Configuration

connected to A and ground C' connected via the signal
return to ground C.

In V.28 mode, S3 is closed inside the LTC1546/LTC1544
which connects a 6k (R8) impedance to ground in parallel
with 20k (R5) plus 10k (R6) for a combined impedance of
5k as shown in Figure 25. Proper termination is only pro­vided when the B input of the receivers is floating, since S1
of the LTC1546’s R2 and R3 receivers remains on in V.28
mode1. The noninverting input is disconnected inside the
LTC1546/LTC1544 receiver and connected to a TTL level
reference voltage to give a 1.4V receiver trip point.

interface has a differential termination at the receiver end
that has a minimum value of 100Ω. The termination
resistor is optional in the V.11 specification, but for the
high speed clock and data lines, the termination is essen­tial to prevent reflections from corrupting the data. The
receiver inputs must also be compliant with the imped­ance curve shown in Figure 20.

In V.11 mode, all switches are off except S1 of the
LTC1546’s receivers which connects a 103Ω differential
termination impedance to the cable as shown in Figure

231. The LTC1544 only handles control signals, so no
termination other than its V.11 receivers’ 30k input imped­ance is necessary.

V.28 (RS232) Interface

A typical V.28 unbalanced interface is shown in Figure 24.
A V.28 single-ended generator with output A and ground
C is connected to a single-ended receiver with input A'

1

Actually, there is no switch S1 in receivers R2 and R3. However, for simplicity, all termination
networks on the LTC1546 can be treated identically if it is assumed that an S1 switch exists and is
always closed on the R2 and R3 receivers.

BALANCED

INTERCONNECTING

GENERATOR

CABLE

AA

CC

Figure 24. Typical V.28 Interface

A

'

R1

51.5Ω

S1

B

'

C

'

S2

R2

51.5Ω

R3

124Ω

R8
6k

S3

GND

R5

20k

R4

20k

Figure 25. V.28 Receiver Configuration

CABLE

TERMINATION

'

'

R6
10k

R7
10k

LOAD

RECEIVER

1546 F24

LTC1546

RECEIVER

1546 F25

12

WUUU

APPLICATIO S I FOR ATIO

LTC1546

V.35 Interface

A typical V.35 balanced interface is shown in Figure 26. A
V.35 differential generator with outputs A and B and
ground C is connected to a differential receiver with input
A' connected to A, input B' connected to B, and ground C'
connected via the signal return to ground C. The V.35
interface requires a T or delta network termination at the
receiver end and the generator end. The receiver differen­tial impedance measured at the connector must be
100Ω␣ ±10Ω, and the impedance between shorted termi­nals (A' and B') and ground (C') must be 150Ω ±15Ω.

In V.35 mode, both switches S1 and S2 inside the LTC1546
are on, connecting a T network impedance as shown in
Figure 27. The 30k input impedance of the receiver is
placed in parallel with the T network termination, but does
not affect the overall input impedance significantly.

The generator differential impedance must be 50Ω to
150Ω and the impedance between shorted terminals (A
and B) and ground (C) must be 150Ω ±15Ω.

BALANCED

INTERCONNECTING

GENERATOR

50Ω

50Ω

125Ω

CABLE

TERMINATION

A

A

B

'

B

'

CABLE

125Ω

LOAD

RECEIVER

50Ω

50Ω

No-Cable Mode

The no-cable mode (M0 = M1 = M2 = 1) is intended for
the case when the cable is disconnected from the con­nector. The charge pump, bias circuitry, drivers and
receivers are turned off, the driver outputs are forced into
a high impedance state, and the supply current drops to
less than 200µA. Note that the LTC1546’s R2 and R3
receivers continue to be terminated by a 103Ω differen­tial impedance.

Charge Pump

The LTC1546 uses an internal capacitive charge pump to
generate VDD and VEE as shown in Figure 28. A voltage
doubler generates about 8V on VDD and a voltage inverter
generates about –7.5V on VEE. Four 1µF surface mounted
tantalum or ceramic capacitors are required for C1, C2, C3
and C4. The VEE capacitor C5 should be a minimum of

3.3µF. All capacitors are 16V and should be placed as close
as possible to the LTC1546 to reduce EMI.

3

V

C1
1µF

C4
1µF

DD

2

+

C1

LTC1546

1

–

C1

4

V

CC

C3
1µF

5V

C2

C2

V

GND

28

+

C2

27

–

26

EE

25

1µF

C5

+

3.3µF

1546 F28

C

C

'

Figure 26. Typical V.35 Interface

A

'

R1

51.5Ω

S1

R2

51.5Ω

B

'

C

'

R3

S2

124Ω

R8
6k

S3

GND

R5

20k

R4

20k

R6
10k

R7
10k

Figure 27. V.35 Receiver Configuration

LTC1546

RECEIVER

1546 F27

1546 F26

Figure 28. Charge Pump

Receiver Fail-Safe

All LTC1546/LTC1544 receivers feature fail-safe opera­tion in all modes. If the receiver inputs are left floating or
are shorted together by a termination resistor, the receiver
output will always be forced to a logic high.

DTE vs DCE Operation

The DCE/DTE pin acts as an enable for Driver 3/Receiver
1 in the LTC1546, and Driver 3/Receiver 1 and Driver 4/
Receiver 4 in the LTC1544. The INVERT pin in the LTC1544
allows the Driver 4/Receiver 4 enable to be high or low true
polarity.

13

LTC1546

WUUU

APPLICATIO S I FOR ATIO

The LTC1546/LTC1544 can be configured for either DTE
or DCE operation in one of two ways: a dedicated DTE or
DCE port with a connector of appropriate gender or a port
with one connector that can be configured for DTE or DCE
operation by rerouting the signals to the LTC1546/LTC1544
using a dedicated DTE cable or dedicated DCE cable.

A dedicated DTE port using a DB-25 male connector is
shown in Figure 29. The interface mode is selected by logic
outputs from the controller or from jumpers to either V
or GND on the mode select pins. A dedicated DCE port
using a DB-25 female connector is shown in Figure 30.

A port with one DB-25 connector, that can be configured
for either DTE or DCE operation is shown in Figure 31. The
configuration requires separate cables for proper signal
routing in DTE or DCE operation. For example, in DTE
mode, the TXD signal is routed to Pins 2 and 14 via the
LTC1546’s Driver 1. In DCE mode, Driver 1 now routes the
RXD signal to Pins 2 and 14.

Multiprotocol Interface with RL, LL, TM
and a DB-25 Connector

If the RL, LL and TM signals are implemented, there are not
enough drivers and receivers available in the LTC1546/
LTC1544. In Figure 32, the required control signals are
handled by the LTC1545. The LTC1545 has an additional
single-ended driver/receiver pair that can handle two more
optional control signals such as TM and RL.

CC

Cable-Selectable Multiprotocol Interface

A cable-selectable multiprotocol DTE/DCE interface is
shown in Figure 33. The select lines M0, M1 and DCE/DTE
are brought out to the connector. The mode is selected by
the cable by wiring M0 (connector Pin 18) and M1 (con­nector Pin 21) and DCE/DTE (connector Pin 25) to ground
(connector Pin 7) or letting them float. If M0, M1 or DCE/
DTE is floating, internal pull-up current sources will pull
the signals to VCC. The select bit M2 is hard wired to VCC.
When the cable is pulled out, the interface will go into the
no-cable mode.

Compliance Testing

The LTC1546/LTC1544 chipset has been tested by TUV
Telecom Services Inc. and passed the NET1, NET2 and
TBR2 requirements. Copies of the test reports are avail­able from LTC or TUV Telecom Services.

The titles of the reports are:

NET1 and NET2: Test Report No. NET2/091301/99.
TBR2: Test Report No. CRT2/091301/99.

The address of TUV Telecom Services Inc. is:

TUV Telecom Services Inc.
Type Approval Division
1775 Old Highway 8, Ste 107
St. Paul, MN 55112 USA
TEL: [phone]
FAX: [phone]

14

TYPICAL APPLICATIO S

V

CC

5V

C3
1µF

TXD

SCTE

TXC

RXC

RXD

U

1µF

LTC1546

3

1

C1

C5
1µF

2
4

5

6

7

8

9

10

11
12
13
14

CHARGE

PUMP

LTC1546

D1

D2

D3

M0
M1
M2
DCE/DTE

R1

R2

R3

28

C2
1µF

27
26

C4

+

3.3µF

25

24

T

23
22

T

21

T

20

19
18

T

17
16

T

15

2

14
24

11

15

12
17

9

3

16

7

1

TXD A (103)

TXD B
SCTE A (113)

SCTE B

TXC A (114)

TXC B
RXC A (115)

RXC B
RXD A (104)

RXD B

SG

SHIELD

M0
M1
M2

C10
1µF

RTS

DTR

DCD

DSR

CTS

4

19
20
23

8

10

6

22

5

13

18

DB-25 MALE
CONNECTOR

RTS A (105)
RTS B
DTR A (108)
DTR B

DCD A (109)
DCD B
DSR A (107)
DSR B
CTS A (106)
CTS B

LL A (141)

1546 F29

V

CC

C9

1

1µF

LL

2

3

4

5

6

7

8

10

9

11
12
13
14

V

CC

V

DD

D1

D2

D3

LTC1544

D4

M0
M1
M2
DCE/DTE

R1

R2

R3

R4

V

GND

INVERT

28

EE

27

26
25

24
23

22
21
20
19

18
17

16

15

NC

C11
1µF

Figure 29. Controller-Selectable Multiprotocol DTE Port with DB-25 Connector

15

LTC1546

TYPICAL APPLICATIO S

V

CC

5V

C3
1µF

1µF

RXD

RXC

TXC

SCTE

TXD

U

C1

C5
1µF

3

1

CHARGE

2

PUMP

4

LTC1546

5

D1

6

D2

7

D3

8

R1

9

R2

10

R3

11

M0

12

M1

13

M2

14

NC

DCE/DTE

28

C2
1µF

27
26

C4

+

3.3µF

25

24

T

23
22

T

21

T

20

19
18

T

17
16

T

15

3

16

17

9

15

12

24

11

2

14

7

SGND (102)

1

SHIELD (101)

RXD A (104)

RXD B
RXC A (115)

RXC B

TXC A (114)

TXC B
SCTE A (113)

SCTE B
TXD A (103)

TXD B

M0
M1
M2

C10
1µF

CTS

DSR

DCD

DTR

RTS

5

13

6

22

8
10
20
23

4
19

18

CTS A (106)
CTS B
DSR A (107)
DSR B

DCD A (109)
DCD B
DTR A (108)
DTR B
RTS A (105)
RTS B

LL A (141)

DB-25 FEMALE

CONNECTOR

1546 F30

V

CC

C9

1

1µF

LL

NC

2

3

4

5

6

7

8

10

9

11
12
13
14

V

CC

V

DD

D1

D2

D3

LTC1544

D4

M0
M1
M2
DCE/DTE

R1

R2

R3

R4

V

GND

INVERT

28

EE

27

26
25

24
23

22
21
20
19

18
17

16

15

NC

C11
1µF

16

Figure 30. Controller-Selectable DCE Port with DB-25 Connector

TYPICAL APPLICATIO S

DTE_TXD/DCE_RXD

DTE_SCTE/DCE_RXC

DTE_TXC/DCE_TXC

DTE_RXC/DCE_SCTE

DTE_RXD/DCE_TXD

U

C3
1µF

LTC1546

V

CC

5V

1µF

3

1

C1

C5
1µF

2
4

5

6

7

8

9

10

11
12
13
14

CHARGE

PUMP

LTC1546

D1

D2

D3

M0
M1
M2
DCE/DTE

R1

R2

R3

28

C2
1µF

27
26

C4

+

3.3µF

25

DTE DCE

24

T

23
22

T

21

T

20

19
18

T

17
16

T

15

2

14
24

11

15

12
17

9
3

16

7

1

TXD A

TXD B
SCTE A

SCTE B

TXC A

TXC B
RXC A

RXC B
RXD A

RXD B

SG

SHIELD

RXD A

RXD B
RXC A

RXC B

TXC A

TXC B
SCTE A

SCTE B
TXD A

TXD B

M0
M1
M2

DCE/DTE

C10
1µF

DTE_RTS/DCE_CTS

DTE_DTR/DCE_DSR

DTE_DCD/DCE_DCD

DTE_DSR/DCE_DTR

DTE_CTS/DCE_RTS

DTE_LL/DCE_LL

C9
1µF

4

23

8

6

5

DB-25

CONNECTOR

RTS A
RTS B

DTR A
DTR B

DCD A
DCD B

DSR A
DSR B
CTS A
CTS B

LL A

CTS A
CTS B

DSR A
DSR B

DCD A
DCD B
DTR A
DTR B
RTS A
RTS B

LL A

1546 F31

V

CC

1
2

3

4

5

6

7

8

10

9

11
12
13
14

V

CC

V

DD

D1

D2

D3

LTC1544

D4

M0
M1
M2
DCE/DTE

R1

R2

R3

R4

V

GND

INVERT

28

EE

27

26

25
24
23

22
21
20
19

18
17

16

15

NC

C11
1µF

19
20

10

22

13

18

Figure 31. Controller-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector

17

LTC1546

TYPICAL APPLICATIO S

DTE_TXD/DCE_RXD

DTE_SCTE/DCE_RXC

DTE_TXC/DCE_TXC

DTE_RXC/DCE_SCTE

DTE_RXD/DCE_TXD

U

C3
1µF

V

CC

5V

1µF

3

1

C1

C5
1µF

10

11
12

13
14

2
4

5

6

7

8

9

CHARGE

PUMP

LTC1546

D1

D2

D3

M0
M1
M2
DCE/DTE

R1

R2

R3

28

C2
1µF

27
26

C4

+

3.3µF

25

DTE DCE

24

T

23
22

T

21

T

20

19
18

T

17
16

T

15

2

TXD A

14

TXD B

24

SCTE A

11

SCTE B

15

TXC A

12

TXC B

17

RXC A

9

RXC B

3

RXD A

16

RXD B

7

SG

1

SHIELD

RXD A

RXD B
RXC A

RXC B

TXC A

TXC B
SCTE A

SCTE B
TXD A

TXD B

M0
M1
M2

DCE/DTE

C10
1µF

DTE_RTS/DCE_CTS

DTE_DTR/DCE_DSR

DTE_DCD/DCE_DCD

DTE_DSR/DCE_DTR

DTE_CTS/DCE_RTS

DTE_LL/DCE_RI

DTE_RI/DCE_LL

DTE_TM/DCE_RL

DTE_RL/DCE_TM

V

CC

5V

C9
1µF

1,19
2,20

10

17

18

11
12
13
14

3

4

5

6

7

8

9

V

CC

V

DD

D1

D2

D3

LTC1545

D4

D5

M0
M1
M2
DCE/DTE

R1

R2

R3

R4

V

GND

R5

D4ENB

R4EN

36

EE

35

34
33

32
31

30
29
28
27

26
25
24

23

22

21

15

16

NC

C11
1µF

*OPTIONAL

4

19
20
23

8

10

6

22

5
13
18

*

25

21

DB-25

CONNECTOR

RTS A
RTS B
DTR A
DTR B

DCD A
DCD B
DSR A
DSR B
CTS A
CTS B
LL

RI

RL

CTS A
CTS B
DSR A
DSR B

DCD A
DCD B
DTR A
DTR B
RTS A
RTS B
RI

LL

RLTM

TM

1546 F32

18

Figure 32. Controller-Selectable Multiprotocol DTE/DCE Port with RL, LL, TM and DB-25 Connector

TYPICAL APPLICATIO S

V

CC

5V

C3
1µF

C1

1µF

C5
1µF

DTE_TXD/DCE_RXD

DTE_SCTE/DCE_RXC

DTE_TXC/DCE_TXC

DTE_RXC/DCE_SCTE

DTE_RXD/DCE_TXD

11
12
13

NC

14

V

C10
1µF

DTE_RTS/DCE_CTS

DTE_DTR/DCE_DSR

DTE_DCD/DCE_DCD

DTE_DSR/DCE_DTR

DTE_CTS/DCE_RTS

C9
1µF

CC

10

11
12
13

NC

14

U

3

1

2
4

5

6

7

8

9

10

1
2

3

4

5

6

7

8

9

CHARGE

PUMP

LTC1546

D1

D2

D3

M0
M1
M2
DCE/DTE

V

CC

V

DD

D1

D2

D3

LTC1544

D4

M0
M1
M2
DCE/DTE

R1

R2

R3

R1

R2

R3

R4

T

T

T

T

T

V

GND

INVERT

LTC1546

28

C2
1µF

27
26

C4

+

3.3µF

25

DTE

TXD A

TXD B
SCTE A

SCTE B

TXC A

TXC B
RXC A

RXC B

RXD A

RXD B

SG

SHIELD

DB-25

CONNECTOR

DCE/DTE
M1
M0

RTS A
RTS B
DTR A
DTR B

DCD A
DCD B
DSR A
DSR B
CTS A
CTS B

DCE

RXD A

RXD B
RXC A

RXC B

TXC A

TXC B
SCTE A

SCTE B

TXD A

TXD B

CTS A
CTS B
DSR A
DSR B

DCD A
DCD B
DTR A
DTR B
RTS A
RTS B

1546 F33

24

23

22

21

20

19
18

17
16

15

28

EE

27

26

25
24
23

22
21
20
19

18
17

16

15

NC

C11
1µF

CABLE WIRING FOR MODE SELECTION

MODE

V.35

RS449, V.36

RS232

CABLE WIRING FOR
DTE/DCE SELECTION

MODE PIN 25

DTE PIN 7
DCE NC

PIN 18

PIN 7

NC

PIN 7

PIN 21

PIN 7
PIN 7

NC

2

14
24

11

15

12
17

9
3

16

7

1

25
21
18

4

19
20
23

8

10

6

22

5

13

Figure 33. Cable-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector

19

LTC1546

PACKAGE DESCRIPTIO

5.20 – 5.38**
(0.205 – 0.212)

U

Dimensions in inches (millimeters) unless otherwise noted.

G Package

28-Lead Plastic SSOP (0.209)

(LTC DWG # 05-08-1640)

10.07 – 10.33*
(0.397 – 0.407)

2526 22 21 20 19 181716 1523242728

12345678 9 10 11 12 1413

7.65 – 7.90

(0.301 – 0.311)

1.73 – 1.99

(0.068 – 0.078)

° – 8°

0

0.13 – 0.22

(0.005 – 0.009)

NOTE: DIMENSIONS ARE IN MILLIMETERS

*

DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.152mm (0.006") PER SIDE

**

DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE

0.55 – 0.95

(0.022 – 0.037)

0.65

(0.0256)

BSC

0.25 – 0.38

(0.010 – 0.015)

0.05 – 0.21

(0.002 – 0.008)

G28 SSOP 1098

RELATED PARTS

PART NUMBER DESCRIPTION COMMENTS

LTC1321 Dual RS232/RS485 Transceiver Two RS232 Driver/Receiver Pairs or Two RS485 Driver/Receiver Pairs
LTC1334 Single 5V RS232/RS485 Multiprotocol Transceiver Two RS232 Driver/Receiver or Four RS232 Driver/Receiver Pairs
LTC1343 Software-Selectable Multiprotocol Transceiver 4-Driver/4-Receiver for Data and Clock Signals
LTC1344A Software-Selectable Cable Terminator Perfect for Terminating the LTC1543 (Not Needed with LTC1546)
LTC1345 Single Supply V.35 Transceiver 3-Driver/3-Receiver for Data and Clock Signals
LTC1346A Dual Supply V.35 Transceiver 3-Driver/3-Receiver for Data and Clock Signals
LTC1543 Software-Selectable Multiprotocol Transceiver Terminated with LTC1344A for Data and Clock Signals, Companion to

LTC1544 or LTC1545 for Control Signals
LTC1544 Software-Selectable Multiprotocol Transceiver Companion to LTC1546 or LTC1543 for Control Signals Including LL
LTC1545 Software-Selectable Multiprotocol Transceiver 5-Driver/5-Receiver Companion to LTC1546 or LTC1543

for Control Signals Including LL, TM and RL

20

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

[phone] ● FAX: [phone]

●

www.linear-tech.com

1546i LT/TP 1299 4K • PRINTED IN USA

 LINEAR TECHNOLOGY CORPORATION 1999