Datasheet LTC1543 Datasheet (Linear Technology)

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FEATURES
Software-Selectable Transceiver Supports: RS232, RS449, EIA530, EIA530-A, V.35, V.36, X.21
TUV/Detecon Inc. Certified NET1 and NET2 Compliant (Test Report No. NET2/102201/97)
TBR2 Compliant (Test Report No. CTR2/022701/98)
Software-Selectable Cable Termination Using the LTC1344A
Complete DTE or DCE Port with LTC1544, LTC1344A
Operates from Single 5V Supply
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APPLICATIO S
Data Networking
CSU and DSU
Data Routers
LTC1543
Software-Selectable
Multiprotocol Transceiver
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DESCRIPTIO
The LTC®1543 is a 3-driver/3-receiver multiprotocol trans­ceiver that operates from a single 5V supply. The LTC1543 and LTC1544 form the core of a complete software-select­able DTE or DCE interface port that supports the RS232, RS449, EIA530, EIA530-A, V.35, V.36 or X.21 protocols. Cable termination may be implemented using the LTC1344A software-selectable cable termination chip or by using exist­ing discrete designs.
The LTC1543 runs from a single 5V supply using an internal charge pump that requires only five space-saving surface mounted capacitors. The part is available in a 28-lead SSOP surface mount package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
DTE or DCE Multiprotocol Serial Interface with DB-25 Connector
LL
LTC1544
D4
CTS B
LL A (141)
R3
CTS A (106)
R2 R1R4
DSR A (109)
DSR B
DCD B
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D3
DCD A (107)
D2 D1
DTR A (108)
DTR B
RTS
RTS B
RTS A (105)
SHIELD (101)
RXD B
SG (102)
RXCRXD
R2
RXC A (115)
RXC B
RXD A (104)
LTC1543
R1R3
D3
TXC A (114)
TXC B
D2
SCTE A (113)
SCTE B
TXDSCTETXC
D1
TXD A (103)
TXD B
LTC1344A
21424111512179314192062322513 81018 7 16
DB-25 CONNECTOR
1543 TA01
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LTC1543
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ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltage ....................................................... 6.5V
Input Voltage
Transmitters ........................... –0.3V to (VCC + 0.3V)
Receivers............................................... –18V to 18V
Logic Pins .............................. –0.3V to (VCC + 0.3V)
Output Voltage
Transmitters ................. (VEE – 0.3V) to (VDD + 0.3V)
Receivers................................ –0.3V to (VCC + 0.3V)
Logic Pins .............................. –0.3V to (VCC + 0.3V)
VEE........................................................ –10V to 0.3V
VDD....................................................... –0.3V to 10V
Short-Circuit Duration
Transmitter Output ..................................... Indefinite
Receiver Output.......................................... Indefinite
VEE.................................................................. 30 sec
Operating Temperature Range
LTC1543C .............................................. 0°C to 70°C
LTC1543I........................................... –40°C to 85°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
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PACKAGE/ORDER INFORMATION
TOP VIEW
1
C1
+
2
C1
V
V
M0
M1
M2
DCE/DTE
3
DD
4
CC
5
D1
6
D2
7
D3
8
R1
9
R2
10
R3
11
12
13
14
CHARGE PUMP
D1
D2
D3
R1
R2
R3
G PACKAGE
28-LEAD PLASTIC SSOP
T
= 150°C, θJA = 65°C/W
JMAX
Consult factory for Military grade parts.
28
27
26
25
24
23
22
21
20
19
18
17
16
15
C2
C2
V
EE
GND
D1 A
D1 B
D2 A
D2 B
D3/R1 A
D3/R1 B
R2 A
R2 B
R3 A
R3 B
+
ORDER PART
NUMBER
LTC1543CG LTC1543IG
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ELECTRICAL CHARACTERISTICS
VCC = 5V (Notes 2, 3)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Supplies
I
CC
VCC Supply Current (DCE Mode, RS530, RS530-A, X.21 Modes, No Load 13 mA All Digital Pins = GND or V
) RS530, RS530-A, X.21 Modes, Full Load 100 130 mA
CC
V.35 Mode, No Load 20 mA V.35 Mode, Full Load
126 170 mA
V.28 Mode, No Load 20 mA V.28 Mode, Full Load No-Cable Mode
P
D
Internal Power Dissipation (DCE Mode) RS530, RS530-A, X.21 Modes, Full Load 230 mW
40 75 mA
120 500 µA
V.35 Mode, Full Load 600 mW V.28 Mode, Full Load 140 mW
+
V
Positive Charge Pump Output Voltage Any Mode, No Load 8.0 9.4 V
V.28 Mode, with Load
8.0 8.7 V
V.28 Mode, with Load, IDD = 10mA 6.5 V
V
Negative Charge Pump Output Voltage V.28, V.35 Modes, No Load –9.6 V
V.28 Mode, Full Load – 8.0 –8.5 V
– 5.5 –6.7 V
– 4.5 –5.7 V
f t
OSC
r
V.35 Mode, Full Load
RS530, RS530-A, X.21 Modes, Full Load Charge Pump Oscillator Frequency 150 kHz Supply Rise Time No-Cable Mode or Power-Up to Turn On 2 ms
Logic Inputs and Outputs
V
IH
V
IL
Logic Input High Voltage 2V Logic Input Low Voltage 0.8 V
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LTC1543
ELECTRICAL CHARACTERISTICS
VCC = 5V (Notes 2, 3)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I
IN
Logic Input Current D1, D2, D3 ±10 µA
M0, M1, M2, DCE = GND (LTC1543C) –100 –50 – 30 µA
–120 –50 – 30 µA
±10 µA
–50 50 mA
±1 µA
V V I
OSR
I
OZR
OH
OL
M0, M1, M2, DCE = GND (LTC1543I) M0, M1, M2, DCE = V
CC
Output High Voltage IO = –4mA 3 4.5 V Output Low Voltage IO = 4mA 0.3 0.8 V Output Short-Circuit Current 0V ≤ VO V Three-State Output Current M0 = M1 = M2 = VCC, 0V ≤ VO V
CC
CC
V.11 Driver
V V
ODO
ODL
Open Circuit Differential Output Voltage RL = 1.95k (Figure 1) ±5V Loaded Differential Output Voltage RL = 50 (Figure 1) 0.5V
ODO
0.67V
ODO
RL = 50 (Figure 1) ±2V
V
OD
Change in Magnitude of Differential RL = 50 (Figure 1) 0.2 V Output Voltage
V V
OC
OC
Common Mode Output Voltage RL = 50 (Figure 1) 3V Change in Magnitude of Common Mode RL = 50 (Figure 1) 0.2 V
Output Voltage
I
SS
I
OZ
Short-Circuit Current V
= GND 150 mA
OUT
Output Leakage Current –0.25V ≤ VO 0.25V, Power Off or ± 1 ±100 µA
No-Cable Mode or Driver Disabled
tr, t
f
Rise or Fall Time (Figures 2, 6) (LTC1543C) 21525 ns
(Figures 2, 6) (LTC1543I) 21535 ns
t
PLH
t
PHL
t Input to Output Difference, t
t
SKEW
Input to Output (Figures 2, 6) (LTC1543C) 20 40 65 ns
(Figures 2, 6) (LTC1543I)
20 40 75 ns
Input to Output (Figures 2, 6) (LTC1543C) 20 40 65 ns
20 40 75 ns
0317 ns
PLH
(Figures 2, 6) (LTC1543I)
– t
(Figures 2, 6) (LTC1543C) 0312 ns
PHL
(Figures 2, 6) (LTC1543I)
Output to Output Skew (Figures 2, 6) 3 ns
V.11 Receiver
V
TH
V
TH
I
IN
R
IN
tr, t
f
t
PLH
t
PHL
t Input to Output Difference, t
Input Threshold Voltage –7V ≤ VCM 7V –0.2 0.2 V Input Hysteresis –7V ≤ VCM 7V 15 40 mV Input Current (A, B) –10V ≤ V Input Impedance –10V ≤ V
10V ±0.66 mA
A,B
10V 15 30 k
A,B
Rise or Fall Time (Figures 2, 7) 15 ns Input to Output (Figures 2, 7) (LTC1543C) 50 80 ns
(Figures 2, 7) (LTC1543I)
50 90 ns
Input to Output (Figures 2, 7) (LTC1543C) 50 80 ns
50 90 ns
0421 ns
PLH
(Figures 2, 7) (LTC1543I)
– t
(Figures 2, 7) (LTC1543C) 0416 ns
PHL
(Figures 2, 7) (LTC1543I)
V.35 Driver
V
OD
Differential Output Voltage Open Circuit ±10.00 V
With Load, –4V ≤ VCM 4V (Figure 3) ±0.44 ±0.55 ±0.66 V
I
OH
I
OL
I
OZ
Transmitter Output High Current V Transmitter Output Low Current V
= 0V – 13 –11 – 9.0 mA
A, B
= 0V 9.0 11 13 mA
A, B
Transmitter Output Leakage Current –0.25V ≤ V
0.25V ±1 ±100 µA
A, B
V
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LTC1543
ELECTRICAL CHARACTERISTICS
VCC = 5V (Notes 2, 3)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
tr, t
f
t
PLH
t
PHL
t Input to Output Difference, t
t
SKEW
Rise or Fall Time (Figures 3, 6) 5 ns Input to Output (Figures 3, 6) (LTC1543C) 20 35 65 ns
(Figures 3, 6) (LTC1543I)
20 35 75 ns
Input to Output (Figures 3, 6) (LTC1543C) 20 35 65 ns
20 35 75 ns
0421 ns
PLH
(Figures 3, 6) (LTC1543I)
– t
(Figures 3, 6) (LTC1543C) 0416 ns
PHL
(Figures 3, 6) (LTC1543I)
Output to Output Skew (Figures 3, 6) 4 ns
V.35 Receiver
V V I
IN
R tr, t t
PLH
t
PHL
TH
TH
IN
f
Differential Receiver Input Threshold Voltage –2V (VA + VB)/2 2V (Figure 3) – 0.2 0.2 V Receiver Input Hysteresis –2V (VA + VB)/2 2V (Figure 3) 15 40 mV Receiver Input Current (A, B) – 10V ≤ V Receiver Input Impedance –10V ≤ V
10V ±0.66 mA
A,B
10V 15 30 k
A,B
Rise or Fall Time (Figures 3, 7) 15 ns Input to Output (Figures 3, 7) (LTC1543C) 50 80 ns
(Figures 3, 7) (LTC1543I)
50 90 ns
Input to Output (Figures 3, 7) (LTC1543C) 50 80 ns
(Figures 3, 7) (LTC1543I) 50 90 ns
t Input to Output Difference, t
PLH
– t
(Figures 3, 7) (LTC1543C) 0416 ns
PHL
(Figures 3, 7) (LTC1543I) 0421 ns
V.28 Driver
V
O
I
SS
I
OZ
Output Voltage Open Circuit ±10 V
= 3k (Figure 4) ±5 ±8.5 V
R
L
Short-Circuit Current V
= GND ±150 mA
OUT
Output Leakage Current –0.25V ≤ VO 0.25V, Power Off or ±1 ±100 µA
No-Cable Mode or Driver Disabled SR Slew Rate RL = 3k, CL = 2500pF (Figures 4, 8) 430V/µs t t
PLH
PHL
Input to Output RL = 3k, CL = 2500pF (Figures 4, 8) 1.5 2.5 µs Input to Output RL = 3k, CL = 2500pF (Figures 4, 8) 1.5 3 µs
V.28 Receiver V
THL
V
TLH
V
TH
R
IN
tr, t
f
t
PLH
t
PHL
The denotes specifications which apply over the full operating temperature range.
Note 1: Absolute Maximum Ratings are those beyond which the safety of a device may be impaired.
Input Low Threshold Voltage 1.2 0.8 V Input High Threshold Voltage 2 1.2 V Receiver Input Hysteresis 0 0.05 0.3 V Receiver Input Impedance –15V ≤ VA 15V 357 k Rise or Fall Time (Figures 5, 9) 15 ns Input to Output (Figures 5, 9) 60 100 ns Input to Output (Figures 5, 9) 160 250 ns
Note 2: All currents into device pins are positive; all currents out of device are negative. All voltages are referenced to device ground unless otherwise specified.
Note 3: All typicals are given for V
= C
C
VDD
= 3.3µF tantalum capacitors and TA = 25°C.
VEE
= 5V, C1 = C2 = C
CC
VCC
= 1µF,
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PIN FUNCTIONS
LTC1543
C1–␣ (Pin 1): Capacitor C1 Negative Terminal. Connect a 1µF capacitor between C1+ and C1–.
C1+ (Pin 2): Capacitor C1 Positive Terminal. Connect a 1µF capacitor between C1+ and C1–.
VDD (Pin 3): Generated Positive Supply Voltage for V.28. Connect a 1µF capacitor to ground.
VCC (Pin 4): Positive Supply Voltage Input. 4.75V ≤ V
CC
5.25V. Bypass with a 1µF capacitor to ground.
D1 (Pin 5): TTL Level Driver 1 Input. D2 (Pin 6): TTL Level Driver 2 Input. D3 (Pin 7): TTL Level Driver 3 Input. R1 (Pin 8): CMOS Level Receiver 1 Output. R2 (Pin 9): CMOS Level Receiver 2 Output. R3 (Pin 10): CMOS Level Receiver 3 Output. M0 (Pin 11): TTL Level Mode Select Input 0 with Pull-Up
to VCC. M1 (Pin 12): TTL Level Mode Select Input 1 with Pull-Up
to VCC. M2 (Pin 13): TTL Level Mode Select Input 2 with Pull-Up
to VCC. DCE/DTE (Pin 14): TTL Level Mode Select Input with Pull-
Up to VCC.
R3 B (Pin 15): Receiver 3 Noninverting Input with Pull-Up to VCC.
R3 A (Pin 16): Receiver 3 Inverting Input. R2 B (Pin 17): Receiver 2 Noninverting Input. R2 A (Pin 18): Receiver 2 Inverting Input. D3/R1 B (Pin 19): Receiver 1 Noninverting Input and
Driver 3 Noninverting Output. D3/R1 A (Pin 20): Receiver 1 Inverting Input and Driver 3
Inverting Output.
D2 B (Pin 21): Driver 2 Noninverting Output. D2 A (Pin 22): Driver 2 Inverting Output. D1 B (Pin 23): Driver 1 Noninverting Output. D1 A (Pin 24): Driver 1 Inverting Output. GND (Pin 25): Ground. VEE (Pin 26): Negative Supply Voltage. Connect a 3.3µF
capacitor to GND. C2– (Pin 27): Capacitor C2 Negative Terminal. Connect a
1µF capacitor between C2+ and C2–. C2+ (Pin 28): Capacitor C2 Positive Terminal. Connect a
1µF capacitor between C2+ and C2–.
TEST CIRCUITS
A
B
Figure 1. V.11 Driver Test Circuit Figure 2. V.11 Driver/Receiver AC Test Circuit
R
L
50
V
OD
R
V
OC
L
50
1543 F01
B
R
L
100
A
C
L
100pF
C
L
100pF
B
R
A
15pF
1543 F02
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LTC1543
TEST CIRCUITS
Figure 4. V.10/V.28 Driver Test Circuit
W
ODE SELECTIO
B
D
V
A
50
125
OD
50
V
CM
125
50
50
B
R
A
15pF
1543 F03
Figure 3. V.35 Driver/Receiver Test Circuit
D
A
R
C
L
L
1543 F04
D
A
A
R
15pF
1543 F04
Figure 5. V.10/V.28 Receiver Test Circuit
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LTC1543 MODE NAME M2 M1 M0 DCE/DTE D1 D2 D3 R1 R2 R3
Not Used (Default V.11) 0000V.11 V.11 Z V.11 V.11 V.11 RS530A 0010V.11 V.11 Z V.11 V.11 V.11 RS530 0100V.11 V.11 Z V.11 V.11 V.11 X.21 0110V.11 V.11 Z V.11 V.11 V.11 V.35 1000V.35 V.35 Z V.35 V.35 V.35 RS449/V.36 1010V.11 V.11 Z V.11 V.11 V.11 V.28/RS232 1100V.28 V.28 Z V.28 V.28 V.28 No Cable 1110ZZZZZZ Not Used (Default V.11) 0001V.11 V.11 V.11 Z V.11 V.11 RS530A 0011V.11 V.11 V.11 Z V.11 V.11 RS530 0101V.11 V.11 V.11 Z V.11 V.11 X.21 0111V.11 V.11 V.11 Z V.11 V.11 V.35 1001V.35 V.35 V.35 Z V.35 V.35 RS449/V.36 1011V.11 V.11 V.11 Z V.11 V.11 V.28/RS232 1101V.28 V.28 V.28 Z V.28 V.28 No Cable 1111ZZZZZZ
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SWITCHI G TI E WAVEFOR S
LTC1543
B – A
B – A
–V
5V
D
0V
V
O
–V
O
A
B
V
1.5V 1.5V
t
PLH
50%
O
90%
10%
t
r
t
SKEW
f = 1MHz : tr 10ns : tf 10ns
= V(A) – V(B)
V
DIFF
1/2 V
O
t
PHL
90%
50%
10%
t
f
t
SKEW
1543 F06
Figure 6. V.11, V.35 Driver Propagation Delays
V
OD2
OD2
V
OH
R
V
OL
0V
t
PLH
1.5V
f = 1MHz : tr 10ns : tf 10ns
INPUT
OUTPUT
0V
t
PHL
1.5V
1543 F07
Figure 7. V.11, V.35 Receiver Propagation Delays
3V
D
0V
V
O
A
–V
O
1.5V
t
PHL
3V
0V
–3V
t
f
1.5V
–3V
t
PLH
0V
3V
t
r
1543 F08
Figure 8. V.10, V.28 Driver Propagation Delays
V
IH
A
V
IL
V
OH
R
V
OL
1.3V
t
PHL
0.8V
1.7V
t
PLH
2.4V
1543 F09
Figure 9. V.10, V.28 Receiver Propagation Delays
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LTC1543
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APPLICATIONS INFORMATION
Overview
The LTC1543/LTC1544 form the core of a complete soft­ware-selectable DTE or DCE interface port that supports the RS232, RS449, EIA530, EIA530-A, V.35, V.36 or X.21 protocols. Cable termination may be implemented using the LTC1344A software-selectable cable termination chip or by using existing discrete designs.
A complete DCE-to-DTE interface operating in EIA530 mode is shown in Figure 10. The LTC1543 of each port is used to generate the clock and data signals. The LTC1544 is used to generate the control signals along with LL (Local Loopback).The LTC1344A cable termination chip is used only for the clock and data signals because they must support V.35 cable termination. The control signals do not need any external resistors.
Mode Selection
The interface protocol is selected using the mode select pins M0, M1 and M2 (see the Mode Selection table).
For example, if the port is configured as a V.35 interface, the mode selection pins should be M2 = 1, M1 = 0, M0 = 0. For the control signals, the drivers and receivers will operate in V.28 (RS232) electrical mode. For the clock and data signals, the drivers and receivers will operate in V.35 electrical mode. The DCE/DTE pin will configure the port for DCE mode when high, and DTE when low.
The interface protocol may be selected simply by plugging the appropriate interface cable into the connector. The mode pins are routed to the connector and are left uncon­nected (1) or wired to ground (0) in the cable as shown in Figure 11.
The internal pull-up current sources will ensure a binary 1 when a pin is left unconnected and that the LTC1543/ LTC1544 and the LTC1344A enter the no-cable mode when the cable is removed. In the no-cable mode the LTC1543/LTC1544 supply current drops to less than 200µA and all LTC1543/LTC1544 driver outputs and
LTC1344A resistive terminations are forced into a high impedance state.
The mode selection may also be accomplished by using jumpers to connect the mode pins to ground or VCC.
Cable Termination
Traditional implementations have included switching resistors with expensive relays, or requiring the user to change termination modules every time the interface standard has changed. Custom cables have been used with the termination in the cable head or separate termina­tions are built on the board and a custom cable routes the signals to the appropriate termination. Switching the terminations with FETs is difficult because the FETs must remain off even though the signal voltage is beyond the supply voltage for the FET drivers or the power is off.
Using the LTC1344A along with the LTC1543/LTC1544 solves the cable termination switching problem. Via soft­ware control, the LTC1344A provides termination for the V.10 (RS423), V.11 (RS422), V.28 (RS232) and V.35 electrical protocols.
V.10 (RS423) Interface
A typical V.10 unbalanced interface is shown in Figure 12. A V.10 single-ended generator output A with ground C is connected to a differential receiver with inputs A' con­nected to A, and input C' connected to the signal return ground C. Usually, no cable termination is required for V.10 interfaces, but the receiver inputs must be compliant with the impedance curve shown in Figure 13.
The V.10 receiver configuration in the LTC1544 is shown in Figure 14. In V.10 mode switch S3 inside the LTC1544 is turned off.The noninverting input is disconnected inside the LTC1544 receiver and connected to ground. The cable termination is then the 30k input impedance to ground of the LTC1544 V.10 receiver.
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LTC1543
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APPLICATIONS INFORMATION
SERIAL
CONTROLLER
TXD
SCTE
TXC
RXC
RXD
LTC1543
D1
D2
D3
R1
R2
R3
LTC1344A
103
103
103
TXD
SCTE
TXC
RXC
RXD
LTC1344A
103
103
DCEDTE
LTC1543
R3
R2
R1
SERIAL
CONTROLLER
TXD
SCTE
D3
D2
D1
TXC
RXC
RXD
RTS
DTR
DCD
DSR
CTS
LTC1544
D1
D2
D3
R1
R2
R3
LL
D4 R4
R4
RTS
DTR
DCD
DSR
CTS
LL
LTC1544
R3
R2
R1
D3
D2
D1
D4
RTS
DTR
DCD
DSR
CTS
LL
1543 F10
Figure 10. Complete Multiprotocol Interface in EIA530 Mode
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LTC1543
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APPLICATIONS INFORMATION
LTC1344A
DCE/
M2 M1
DTE
22
23 24 1
(DATA)
11
M0
LTC1543
DCE/DTE
LTC1544
DCE/DTE
M1
M2
M2
M1
M0
(DATA)
12
13
14
14
13
12
11
LATCH
M0 (DATA)
21
CONNECTOR
NC
NC
CABLE
1543 F11
Figure 11: Single Port DCE V.35 Mode Selection in the Cable
BALANCED
GENERATOR
INTERCONNECTING
CABLE
TERMINATION
AA
CC
'
'
LOAD
CABLE
RECEIVER
1543 F12
Figure 12. Typical V.10 Interface
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LTC1543
AA
'
B
C
B
'
C
'
GENERATOR
BALANCED
INTERCONNECTING
CABLE
LOAD
CABLE
TERMINATION
RECEIVER
100 MIN
1543 F15
R3
124
R5
20k
LTC1344A
LTC1543 LTC1544
RECEIVER
1543 F16
A
B
A
'
B
'
C
'
R1
51.5
R8 6k
S2
S3
R2
51.5
R6 10k
R7 10k
GND
R4
20k
S1
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APPLICATIONS INFORMATION
I
Z
–10V
–3.25mA
Figure 13. V.10 Receiver Input Impedance
–3V
3V 10V
1543 F13
3.25mA
V
Z
A
'
A
R5
R8
20k
6k
S3
R4
B
C
B
'
'
20k
GND
R6 10k
R7 10k
LTC1544
RECEIVER
Figure 14. V.10 Receiver Configuration
1543 F14
V.11 (RS422) Interface
A typical V.11 balanced interface is shown in Figure 15. A V.11 differential generator with outputs A and B with ground C is connected to a differential receiver with ground C', inputs A' connected to A, B' connected to B. The V.11 interface has a differential termination at the receiver end that has a minimum value of 100. The termination resistor is optional in the V.11 specification, but for the high speed clock and data lines, the termination is required to prevent reflections from corrupting the data. The receiver inputs must also be compliant with the imped­ance curve shown in Figure 13.
In V.11 mode, all switches are off except S1 inside the LTC1344A which connects a 103 differential termina­tion impedance to the cable as shown in Figure 16.
Figure 15. Typical V.11 Interface
Figure 16. V.11 Receiver Configuration
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LTC1543
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APPLICATIONS INFORMATION
V.28 (RS232) Interface
A typical V.28 unbalanced interface is shown in Figure 17. A V.28 single-ended generator output A with ground C is connected to a single-ended receiver with input A' con­nected to A, ground C' connected via the signal return ground C.
In V.28 mode all switches are off except S3 inside the LTC1543/LTC1544 which connects a 6k (R8) impedance to ground in parallel with 20k (R5) plus 10k (R6) for a combined impedance of 5k as shown in Figure 18. The noninverting input is disconnected inside the LTC1543/ LTC1544 receiver and connected to a TTL level reference voltage for a 1.4V receiver trip point.
BALANCED
GENERATOR
INTERCONNECTING
CABLE
TERMINATION
AA
'
LOAD
CABLE
RECEIVER
V.35 Interface
A typical V.35 balanced interface is shown in Figure 19. A V.35 differential generator with outputs A and B with ground C is connected to a differential receiver with ground C', inputs A' connected to A, B' connected to B. The V.35 interface requires a T or delta network termination at the receiver end and the generator end. The receiver differential impedance measured at the connector must be 100Ω␣ ±10Ω, and the impedance between shorted termi­nals (A' and B') and ground C' must be 150Ω ±15Ω.
In V.35 mode, both switches S1 and S2 inside the LTC1344A are on, connecting the T network impedance as shown in Figure 20. The switch in the LTC1543 is off. The 30k input
BALANCED
INTERCONNECTING
GENERATOR
50
125
CABLE
TERMINATION
'
A
A
CABLE
125
LOAD
RECEIVER
50
CC
'
Figure 17. Typical V.28 Interface
1543 F17
50
B
B
C
'
C
'
50
1543 F19
Figure 19. Typical V.35 Interface
A
'
A
LTC1344A
R1
51.5
S1
R3
S2
124
R2
51.5
B
'
C
'
B
R8 6k
S3
GND
R5
20k
R4
20k
R6 10k
R7 10k
LTC1543 LTC1544
RECEIVER
1543 F18
'
A
A
LTC1344A
R1
51.5
S1
R3
S2
124
R2
51.5
B
'
C
'
B
R8 6k
S3
GND
R5
20k
R4
20k
R6 10k
R7 10k
LTC1543
RECEIVER
1543 F20
Figure 18. V.28 Receiver Configuration
Figure 20. V.35 Receiver Configuration
12
Page 13
LTC1543
U
WUU
APPLICATIONS INFORMATION
impedance of the receiver is placed in parallel with the T network termination, but does not affect the overall input impedance significantly.
The generator differential impedance must be 50 to 150 and the impedance between shorted terminals (A and B) and ground C must be 150Ω ±15. For the generator termination, switches S1 and S2 are both on and the top side of the center resistor is brought out to a pin so it can be bypassed with an external capacitor to reduce common mode noise as shown in Figure 21.
Any mismatch in the driver rise and fall times or skew in the driver propagation delays will force current through the center termination resistor to ground, causing a high frequency common mode spike on the A and B terminals. The common mode spike can cause EMI problems that are reduced by capacitor C1 which shunts much of the com­mon mode energy to ground rather than down the cable.
No-Cable Mode
The no-cable mode (M0 = M1 = M2 = 1) is intended for the case when the cable is disconnected from the connector. The charge pump, bias circuitry, drivers and receivers are turned off, the driver outputs are forced into a high impedance state, and the supply current drops to less than 200µA.
Charge Pump
The LTC1543 uses an internal capacitive charge pump to generate VDD and VEE as shown in Figure 22. A voltage doubler generates about 8V on VDD and a voltage inverter generates about – 7.5V for VEE. Four 1µF surface mounted tantalum or ceramic capacitors are required for C1, C2, C3 and C4. The VEE capacitor C5 should be a minimum of
3.3µF. All capacitors are 16V and should be placed as close as possible to the LTC1543 to reduce EMI.
LTC1344A
V.35 DRIVER
124
C1 100pF
ON
51.5
S1
S2
ON
51.5
Figure 21. V.35 Driver Using the LTC1344A
A
B
C
1543 F21
Receiver Fail-Safe
All LTC1543/LTC1544 receivers feature fail-safe opera­tion in all modes. If the receiver inputs are left floating or shorted together by a termination resistor, the receiver output will always be forced to a logic high.
3
V
C1 1µF
C4 1µF
DD
2
+
C1
LTC1543
1
C1
4
V
CC
C3 1µF
5V
Figure 22. Charge Pump
C2
C2
V
GND
28
+
C2
27
26
EE
25
1µF
C5
+
3.3µF
1543 F22
13
Page 14
LTC1543
U
WUU
APPLICATIONS INFORMATION
DTE vs DCE Operation
The DCE/DTE pin acts as an enable for Driver 3/Receiver 1 in the LTC1543, and Driver 3/Receiver 1 and Driver 4/ Receiver 4 in the LTC1544. The INVERT pin in the LTC1544 allows the Driver 4/Receiver 4 enable to be high or low true polarity.
The LTC1543/LTC1544 can be configured for either DTE or DCE operation in one of two ways: a dedicated DTE or DCE port with a connector of appropriate gender or a port with one connector that can be configured for DTE or DCE operation by rerouting the signals to the LTC1543/LTC1544 using a dedicated DTE cable or dedicated DCE cable.
A dedicated DTE port using a DB-25 male connector is shown in Figure 23. The interface mode is selected by logic outputs from the controller or from jumpers to either V or GND on the mode select pins. A dedicated DCE port using a DB-25 female connector is shown in Figure 24.
A port with one DB-25 connector, but can be configured for either DTE or DCE operation is shown in Figure 25. The configuration requires separate cables for proper signal routing in DTE or DCE operation. For example, in DTE mode, the TXD signal is routed to Pins 2 and 14 via Driver 1 in the LTC1543. In DCE mode, Driver 1 now routes the RXD signal to Pins 2 and 14.
CC
LTC1343. The LTC1343 has an additional single-ended driver/receiver pair that can handle two more optional control signals such as TM and LL.
Cable-Selectable Multiprotocol Interface
A cable-selectable multiprotocol DTE/DCE interface is shown in Figure 27. The select lines M0, M1 and DCE/DTE are brought out to the connector. The mode is selected by the cable by wiring M0 (connector Pin 18) and M1 (con­nector Pin 21) and DCE/DTE (connector Pin 25) to ground (connector Pin 7) or letting them float. If M0, M1 or DCE/ DTE is floating, internal pull-up current sources will pull the signals to VCC. The select bit M2 is hard wired to VCC. When the cable is pulled out, the interface will go into the no-cable mode.
Compliance Testing
A European standard EN 45001 test report is available for the LTC1543/LTC1544/LTC1344A chipset. A copy of the test report is available from LTC or TUV Telecom Services Inc. (formerly Detecon Inc.)
The title of the report is: Test Report No. NET2/102201/97. The address of TUV Telecom Services Inc. is:
Multiprotocol Interface with RL, LL, TM and a DB-25 Connector
If the RL, LL and TM signals are implemented, there are not enough drivers and receivers available in the LTC1543/ LTC1544. In Figure 26, the required control signals are handled by the LTC1544 but the clock/data signals use the
14
TUV Telecom Services Inc. Type Approval Division 1775 Old Highway 8, Ste 107 St. Paul, MN 55112 USA Tel. +1 (612) 639-0775 Fax. +1 (612) 639-0873
Page 15
U
TYPICAL APPLICATIONS
V
CC
5V
3
TXD
SCTE
C3 1µF
1µF
1
C1
C5 1µF
CHARGE
2
PUMP
4
LTC1543
5
D1
6
D2
7
D3
LTC1543
C6
100pFC7100pF
3 8 11 12 13
V
CC
28
C2 1µF
27 26
C4
+
3.3µF
25
24 23
22 21
C13 1µF
C12 1µF
2
V
EE
5
C8
100pF
16109764
15 18 17 19 20 22
LTC1344A
LATCH
DCE/DTEM2M1
23 24141
21
M0
2
TXD A (103)
14
TXD B
24
SCTE A (113)
11
SCTE B
C10
1µF
TXC
RXC
RXD
RTS
DTR
DCD
DSR
CTS
GND
INVERT
20 19 18 17 16 15
28
V
EE
27
26 25
24 23
22 21 20 19
18 17
16
15
NC
C11 1µF
8
R1
9
R2
10
R3
11
M0
12
M1
13
M2
14
DCE/DTE
V
CC
C9
1
1µF
LL
10
11 12 13 14
2
3
4
5
6
7
8
9
V
CC
V
DD
D1
D2
D3
LTC1544
D4
M0 M1 M2 DCE/DTE
R1
R2
R3
R4
15 12 17
9 3
16
7
1
4
19 20
23
8
10
6
22
5
13
18
TXC A (114) TXC B RXC A (115) RXC B RXD A (104) RXD B
SG
SHIELD
DB-25 MALE CONNECTOR
RTS A (105) RTS B DTR A (108) DTR B
DCD A (109) DCD B DSR A (107) DSR B CTS A (106) CTS B
LL A (141)
M2 M1 M0
1543 F23
Figure 23. Controller-Selectable Multiprotocol DTE Port with DB-25 Connector
15
Page 16
LTC1543
TYPICAL APPLICATIONS
V
CC
5V
3
RXD
RXC
C3 1µF
1µF
1
C1
C5 1µF
CHARGE
2
PUMP
4
LTC1543
5
D1
6
D2
7
D3
U
C6
100pFC7100pF
3 8 11 12 13
V
CC
28
C2 1µF
27 26
C4
+
3.3µF
25
24 23
22 21
C13 1µF
C12 1µF
2
V
EE
5
C8
100pF
16109764
15 18 17 19 20 22
LTC1344A
DCE/DTEM2M1
V
CC
LATCH
23 24141
21
M0
3
RXD A (104)
16
RXD B
17
RXC A (115)
9
RXC B
C10
1µF
TXC
SCTE
TXD
CTS
DSR
DCD
DTR
RTS
R1
R2
R1
R2
R3
R4
V
GND
INVERT
20 19 18 17 16 15
28
EE
27
26 25
24 23
22 21 20 19
18 17
16
15
NC
C11 1µF
8
9
10
R3
11
M0
12
M1
13
M2
14
DCE/DTE
NC
V
CC
C9
1
1µF
LL
V
CC
2
V
DD
3
D1
4
D2
5
D3
LTC1544
6
7
8
10
9
D4
11
M0
12
M1
13
M2
14
NC
DCE/DTE
15 12 24
SCTE A (113)
11
SCTE B
2
TXD A (103)
14
TXD B
7
SGND (102)
1
SHIELD (101)
5
CTS A (106)
13
CTS B
6
DSR A (107)
22
DSR B
8
DCD A (109)
10
DCD B
20
DTR A (108)
23
DTR B
4
RTS A (105)
19
RTS B
18
LL A (141)
TXC A (114) TXC B
DB-25 FEMALE
CONNECTOR
16
M2 M1 M0
1543 F24
Figure 24. Controller-Selectable DCE Port with DB-25 Connector
Page 17
U
TYPICAL APPLICATIONS
V
CC
5V
3
DTE_TXD/DCE_RXD
DTE_SCTE/DCE_RXC
C3 1µF
1µF
1
C1
C5 1µF
CHARGE
2
PUMP
4
LTC1543
5
D1
6
D2
7
D3
LTC1543
C6
100pFC7100pF
3 8 11 12 13
V
CC
28
C2 1µF
27 26
C4
+
3.3µF
25
24 23
22 21
C13 1µF
C12 1µF
2
V
EE
5
C8
100pF
16109764
15 18 17 19 20 22
LTC1344A
LATCH
DCE/DTEM2M1
23 24141
M0
21
14 24 11
DTE DCE
2
TXD A TXD B SCTE A SCTE B
RXD A RXD B RXC A RXC B
DTE_TXC/DCE_TXC
DTE_RXC/DCE_SCTE
DTE_RXD/DCE_TXD
C10
1µF
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
DTE_DCD/DCE_DCD
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
DTE_LL/DCE_LL
C9 1µF
20
8
9
10 11
M0
12
M1
13
M2
14
DCE/DTE
V
CC
1
V
CC
2
V
DD
3
4
5
LTC1544
6
7
8
10
9
11
M0
12
M1
13
M2
14
DCE/DTE
S
R1
R2
R3
D1
D2
D3
R1
R2
R3
R4
D4
GND
INVERT
19
S
18 17 16 15
28
V
EE
27
26
25 24 23
22 21 20 19
18 17
16
15
NC
C11 1µF
15 12 17
9 3
16
7
1
4
19 20
23
8
10
6
22
5
13
18
TXC A
TXC B RXC A RXC B RXD A RXD B
SG
SHIELD
DB-25
CONNECTOR
RTS A RTS B DTR A DTR B
DCD A DCD B DSR A DSR B CTS A CTS B
LL A
TXC A TXC B SCTE A SCTE B TXD A TXD B
CTS A CTS B DSR A DSR B
DCD A DCD B DTR A DTR B RTS A RTS B
LL A
DCE/DTE
M2 M1 M0
1543 F25
Figure 25. Controller-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector
17
Page 18
LTC1543
U
TYPICAL APPLICATIONS
V
CC
5V
1
DTE_LL/DCE_TM
DTE_TXD/DCE_RXD
DTE_SCTE/DCE_RXC
DTE_TXC/DCE_TXC
DTE_RXC/DCE_SCTE
DTE_RXD/DCE_TXD
DTE_TM/DCE_LL
C10 1µF
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
DTE_DCD/DCE_DCD
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
DTE_RL/DCE_RL
DCE/DTE
C3 1µF
LB
C9 1µF
M2 M1 M0
1µF
2
C1
C5 1µF
R1
100k
CHARGE
4 3
8
LTC1343
5
D1
6
D2
7
D3
9
D4 10 12 13
14
15
16
20
CTRL
22
LATCH
11
INVERT
25
423SET
40
GND
V
CC
1
V
CC
2
V
DD
3
4
D2
5
LTC1544
6
7
8
10
9
11
M0
12
M1
13
M2
14
DCE/DTE
PUMP
D1
D3
D4
R1
R2
R3
R4
LB
R1
R2
R3
R4
DCE
23
GND
INVERT
C6
100pFC7100pF
V
CC
C11 1µF
C13 1µF
C12 1µF
2
V
EE
44
C2 1µF
43 42
C4
+
3.3µF
41
39
38 37 36 35 34 33
32 31 30 29 28 27
26
21 19
M2
18
M1
17
M0
V
CC
24
EC
28
V
EE
27
26 25 24 23
22 21 20 19
18 17
16
15
NC
C8
100pF
3 8 11 12 13
5
16109764
15 18 17 19 20 22
LTC1344A
LATCH
DCE/DTEM2M1
23 24141
M0
21
18
2
14 24 11
15 12 17
9 3
16
25
7
1
4
19 20 23
8
10
6
22
5
13
21
DTE DCE
LL A
TXD A TXD B SCTE A SCTE B
TXC A TXC B RXC A RXC B RXD A RXD B
TM A LL A
SG
SHIELD
DB-25
CONNECTOR
RTS A RTS B DTR A DTR B
DCD A DCD B DSR A DSR B CTS A CTS B
RL A
1543 F26
TM A
RXD A RXD B RXC A RXC B
TXC A TXC B SCTE A SCTE B TXD A TXD B
CTS A CTS B DSR A DSR B
DCD A DCD B DTR A DTR B RTS A RTS B
RL A
18
Figure 26. Controller-Selectable Multiprotocol DTE/DCE Port with RL, LL, TM and DB-25 Connector
Page 19
U
TYPICAL APPLICATIONS
LTC1543
DTE_TXD/DCE_RXD
DTE_SCTE/DCE_RXC
DTE_TXC/DCE_TXC
DTE_RXC/DCE_SCTE
DTE_RXD/DCE_TXD
C10 1µF
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
DTE_DCD/DCE_DCD
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
C3 1µF
C6
100pFC7100pF
3 8 11 12 13
V
CC
5V
V
CC
C13 1µF
2
V
EE
C12 1µF
C11 1µF
V.35 PIN 7 PIN 7
RS232 PIN 7 NC
5
1µF
C1
C9 1µF
C5 1µF
3
1
CHARGE
2
PUMP
4
LTC1543
5
D1
6
D2
7
D3
8
R1
9
R2
10
R3
11
M0
12
M1
13
M2
NC
14
DCE/DTE
V
CC
1
V
CC
2
V
DD
3
D1
4
D2
5
D3
LTC1544
6
R1
7
R2
8
R3
10
R4
9
D4
11
M0
12
M1
13
NC
M2
14
DCE/DTE
GND
INVERT
28
C2 1µF
27 26
C4
+
3.3µF
25
24 23
22 21
20 19 18 17 16 15
28
V
EE
27
26 25
24 23
22 21 20 19
18 17
16
CABLE WIRING FOR MODE SELECTION
MODE PIN 18 PIN 21
RS449, V.36 NC PIN 7
15
NC
C8
100pF
16109764
CABLE WIRING FOR DTE/DCE SELECTION
MODE PIN 25
DTE PIN 7 DCE NC
15 18 17 19 20 22
LTC1344A
LATCH
DCE/DTEM2M1
23 24141
V
CC
21
M0
DTE
TXD A TXD B SCTE A SCTE B
TXC A TXC B RXC A RXC B RXD A RXD B SG
SHIELD
DB-25
CONNECTOR
DCE/DTE M1 M0
RTS A RTS B DTR A DTR B
DCD A DCD B DSR A DSR B CTS A CTS B
DCE
RXD A RXD B RXC A RXC B
TXC A TXC B SCTE A SCTE B TXD A TXD B
CTS A CTS B DSR A DSR B
DCD A DCD B DTR A DTR B RTS A RTS B
2
14 24
11
15
12
17
9
3
16
7
1
25 21 18
4
19
20
23
8
10
6
22
5
13
Figure 27. Cable-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
1543/44 F27
19
Page 20
LTC1543
PACKAGE DESCRIPTION
0.205 – 0.212** (5.20 – 5.38)
U
Dimensions in inches (millimeters) unless otherwise noted.
G Package
28-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
0.397 – 0.407* (10.07 – 10.33)
2526 22 21 20 19 181716 1523242728
12345678 9 10 11 12 1413
0.301 – 0.311 (7.65 – 7.90)
0.068 – 0.078 (1.73 – 1.99)
° – 8°
0
0.005 – 0.009 (0.13 – 0.22)
*
DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.022 – 0.037 (0.55 – 0.95)
0.0256 (0.65)
BSC
0.010 – 0.015 (0.25 – 0.38)
0.002 – 0.008 (0.05 – 0.21)
G28 SSOP 0694
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LTC1321 Dual RS232/RS485 Transceiver Two RS232 Driver/Receiver Pairs or Two RS485 Driver/Receiver Pairs LTC1334 Single 5V RS232/RS485 Multiprotocol Transceiver Two RS232 Driver/Receiver or Four RS232 Driver/Receiver Pairs LTC1343 Software-Selectable Multiprotocol Transceiver 4-Driver/4-Receiver for Data and Clock Signals LTC1344A Software-Selectable Cable Terminator Perfect for Terminating the LTC1543 LTC1345 Single Supply V.35 Transceiver 3-Driver/3-Receiver for Data and Clock Signals LTC1346A Dual Supply V.35 Transceiver 3-Driver/3-Receiver for Data and Clock Signals LTC1544 Software-Selectable Multiprotocol Transceiver Companion to LTC1543 for Control Signals
20
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
www.linear-tech.com
1543fs, sn1543x LT/TP 0898 4K • PRINTED IN
USA
LINEAR TECHNOLOGY CORPORATION 1998
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