Datasheet LTC1520 Datasheet (Linear Technology)

Final Electrical Specifications

LTC1520

50Mbps Precision Quad

Line Receiver

FEATURES

■

Precision Propagation Delay: 18ns ±3ns Over
Temperature

■

Data Rate: 50Mbps

■

Low t

■

■

■

■

■

■

■

■

■

PLH/tPHL

Low Channel-to-Channel Skew: 400ps Typ

Rail-to-Rail Input Common Mode Range
High Input Resistance: ≥18k, Even When Unpowered
Hot Swap Capable
Can Withstand Input DC Levels of ±10V
Short-Circuit Protected
Single 5V Supply
LVDS Compatible
Will Not Oscillate with Slow Input Signals

Skew: 500ps Typ

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APPLICATIONS

■

High Speed Backplane Interface

■

Line Collision Detector

■

PECL and LVDS Line Receivers

■

Level Translator

■

Ring Oscillator

■

Tapped Delay Line

, LTC and LT are registered trademarks of Linear Technology Corporation.

U

May 1996

DESCRIPTION

The LTC®1520 is a high speed, precision differential line
receiver that can operate at data rates as high as 50Mbps.
A unique architecture provides very stable propagation
delays and low skew over a wide input common mode,
input overdrive and ambient temperature range. Propaga­tion delay is 18ns ± 3ns, while typically t

PLH/tPHL

500ps and channel-to-channel skew is 400ps.
Each receiver translates differential input levels (VID ≥

100mV) into valid CMOS and TTL output levels. Its high
input resistance (≥18k) allows many receivers to be con­nected to the same driver. The receiver outputs go into a
high impedance state when disabled.

Protection features include thermal shutdown and a con­trolled maximum short-circuit current (50mA max) that
does not oscillate in and out of short-circuit mode. Input
resistance remains ≥18k when the device is unpowered or
disabled, thus allowing the LTC1520 to be hot swapped into
a backplane without loading the data lines.

The LTC1520 operates from a single 5V supply and draws
12mA of supply current. The part is available in a 16-lead
narrow SO package.

skew is

TYPICAL APPLICATION

High Speed Backplane Receiver

LTC1520

+

–

+

–

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

U

+

–

+

–

Propagation Delay Guaranteed to Fall

Within Shaded Area (±3ns)

RECEIVER

VIN =

1V/DIV

RECEIVER

OUTPUT

=

V

OUT

5V/DIV

5V

3.3k

3.3k

0.01µF

LTC1520 TA01

= 5V

V

DD

–5 5 15

TIME (ns)

INPUT

V

= 500mV

ID

25 350 1020304045

LTC1520 TA02

1

LTC1520

A

W

O

LUTEXI T

S

A

WUW

ARB

U
G

I

S

(Note 1)

Supply Voltage ....................................................... 10V

Digital Input Currents ..................... –100mA to 100mA

Digital Input Voltages ............................... –0.5V to 10V

Receiver Input Voltages ........................................ ±10V

Receiver Output Voltages ............. – 0.5V to VDD + 0.5V

Short-Circuit Duration .................................... Indefinite

Operating Temperature Range .................... 0°C to 70°C

Storage Temperature Range ................ –65°C to 150°C

Lead Temperature (Soldering, 10 sec)................. 300°C

DC ELECTRICAL CHARACTERISTICS

VDD = 5V (Notes 2, 3) per receiver, unless otherwise noted.

/

TOP VIEW

S PACKAGE

= 150°C, θ

O

RDER I FOR ATIO

ORDER PART

16

V



DD

15

B4

LTC1520CS

= 90°C/W

JA

14

A4

13

OUT 4

12

NC

11

OUT 3

10

A3

9

B3

PACKAGE

1

B1

2

A1

3

OUT 1

4

ENABLE

5

OUT 2

6

A2

7

B2

8

GND

16-LEAD PLASTIC SO

T

JMAX

Consult factory for Industrial and Military grade parts.

WU

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NUMBER

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

CM

V

IH

V

IL

I

IN1

I

IN2

R

IN

C

IN

V

OC

V

ID(MIN)

dV

ID

V

OH

V

OL

I

OZR

I

DD

I

OSR

CMRR Common Mode Rejection Ratio VCM = 2.5V, f = 25MHz 45 dB

Input Common Mode Voltage A, B Inputs ● –0.2 VDD + 0.2 V
Input High Voltage Enable Input ● 2V
Input Low Voltage Enable Input ● 0.8 V
Input Current Enable Input ● –1 1 µA
Input Current (A, B) VA, VB = 5V ● 250 µA

, VB = 0 ● –250 µA

V

A

Input Resistance (Figure 5) –0.2V ≤ VCM ≤ VDD + 0.2V ● 18 kΩ
A, B Input Capacitance 3pF
Open-Circuit Input Voltage (Figure 5) VDD = 5V (Note 4) ● 3.2 3.3 3.4 V
Differential Input Threshold Voltage –0.2V < VCM < VDD + 0.2V ● –0.1 0.1 V
Input Hysteresis VCM = 2.5V ● 20 mV
Output High Voltage I
Output Low Voltage I
Three-State Output Current 0V ≤ V
Total Supply Current All 4 Receivers VID ≥ 0.1V, No Load, Enable = 5V ● 12 20 mA
Short-Circuit Current V

= –4mA, VID = 0.1V, VDD = 5V ● 4.6 V

OUT

= 4mA, VID = 0.1V, VDD = 5V ● 0.4 V

OUT

≤ 5V ● –10 10 µA

OUT

OUT

= 0V, V

= 5V ● –50 50 mA

OUT

2

LTC1520

UW

SWITCHI G TI E CHARACTERISTICS

VDD = 5V (Notes 2, 3) VID = 500mV, VCM = 2.5V, unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

t

, t

PLH

tr, t

f

t

SKD

t

ZL

t

ZH

t

LZ

t

HZ

t

CH-CH

t

PKG-PKG

f

IN

Input-to-Output Propagation Delay CL = 15pF (Figure 1) ● 15 18 21 ns

PHL

Rise/Fall Times CL = 15pF 2.5 ns

t

– t

PLH

 Skew C

PHL

= 15pF, Same Receiver (Note 5) ● 500 ps

L

Enable to Output Low CL = 15pF (Figure 2) ● 10 25 ns
Enable to Output High CL = 15pF (Figure 2) ● 10 25 ns
Disable from Output Low CL = 15pF (Figure 2) ● 20 35 ns
Disable from Output High CL = 15pF (Figure 2) ● 20 35 ns
Channel-to-Channel Skew CL = 15pF (Figure 3) (Note 6) ● 400 ps
Package-to-Package Skew CL = 15pF, Same Temperature 1.5 ns

(Figure 4, Note 4)
Minimum Input Pulse Width (Note 4) 12 ns
Maximum Input Frequency (Note 4) 40 MHz

The ● denotes specifications which apply over the full operating
temperature range.

Note 1: Absolute Maximum Ratings are those values beyond which the
safety of the device cannot be guaranteed. Recommended: V

= 5V ±5%.

DD

Note 2: All currents into the device pins are positive; all currents out of the
device pins are negative.

W

U

Note 3: All typicals are given for V
Note 4: Guaranteed by design, but not tested.
Note 5: Worst-case t

over the full operating temperature range.
Note 6: Maximum difference between any two t

single package over the full operating temperature range.

TYPICAL PERFORMANCE CHARACTERISTICS

Propagation Delay (t
vs Temperature

25

VCM = 2.5V

= 500mV

V

ID

20

15

10

PROPAGATION DELAY (ns)

5

PLH/tPHL

)

– t

PLH

 skew for a single receiver in a package

PHL

Propagation Delay (t
vs Input Overdrive

25

20

15

10

PROPAGATION DELAY (ns)

5

= 5V, TA = 25°C.

DD

PLH/tPHL

TA = 25°C
V

PLH

CM

or t

)

= 2.5V

transitions in a

PHL

0

–50 –25

0

TEMPERATURE (°C)

50

25

100

LTC1520 G01

125

75

0

0.05

0.1 1 5 10
INPUT OVERDRIVE (V)

1520 G02

3

LTC1520

FREQUENCY (Hz)

10

42.0

COMMON MODE REJECTION RATIO (dB)

42.5

43.5

44.0

44.5

46.5

LTC1520 G04

43.0

1k 100k 10M

45.0

45.5

46.0

TA = 25°C

–

+

INPUT

2.5V

OUTPUT

15pF

1520 F01b

1/4 LTC1520

W

U

TYPICAL PERFORMANCE CHARACTERISTICS

Propagation Delay (t

PLH/tPHL

)

vs Input Common Mode

25

TA = 25°C

= 500mV

V

ID

20

15

10

PROPAGATION DELAY (ns)

5

0

0

13

2

INPUT COMMON MODE (V)

4

LTC1520 G03

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PIN FUNCTIONS

B1 (Pin 1): Receiver 1 Inverting Input.
A1 (Pin 2): Receiver 1 Noninverting Input.
RO1 (Pin 3): Receiver 1 Output.

CMRR vs Frequency

5

B3 (Pin 9): Receiver 3 Inverting Input.
A3 (Pin 10): Receiver 3 Noninverting Input.
RO3 (Pin 11): Receiver 3 Output.

Enable (Pin 4): Receiver Output Enable Pin. A logic high

input enables the receiver outputs. A logic low input
forces the receiver outputs into a high impedance state.
Do not float.

RO2 (Pin 5): Receiver 2 Output.
A2 (Pin 6): Receiver 2 Noninverting Input.
B2 (Pin 7): Receiver 2 Inverting Input.
GND (Pin 8): Ground Pin. A ground plane is recommended

for all LTC1520 applications.

SWITCHI G TI E WAVEFOR S

4

INPUT

OUTPUT

UW W

3V





t

PLH

2.5V 2.5V

V

/2 VDD/2

DD

t

PHL

Figure 1. Propagation Delay Test Circuit and Waveforms

NC (Pin 12): No Connection.
RO4 (Pin 13): Receiver 4 Output.
A4 (Pin 14): Receiver 4 Noninverting Input.
B4 (Pin 15): Receiver 4 Inverting Input.
VDD (Pin 16): 5V Supply Pin. This pin should be decoupled

with a 0.1µ F ceramic capacitor as close as possible to the
pin. Recommended: VDD = 5V ±5%.

2V

1520 F01

UW W

SAME INPUT FOR BOTH PACKAGES

INPUT
A1, B1

V

ID

= 500mV

PACKAGE 1

OUT 1

1520 F04

t

PKG-PKG

t

PKG-PKG

PACKAGE 2

OUT 1

SWITCHI G TI E WAVEFOR S

ENABLE

OUT 1

OUT 1

RECEIVER

OUTPUT

3V

0V

5V

V

OL

V

OH

0V

Figure 2. Receiver Enable and Disable Timing
Test Circuit and Waveforms

1.5V

t

t

C

1.5V

t

ZL

1.5V



1.5V

ZH

1k

L

OUTPUT 

NORMALLY LOW

OUTPUT

NORMALLY HIGH

S1

S2

1k

LZ

t

HZ

V

DD

0.2V

0.2V

1520 F02

LTC1520

3V

INPUT
A1, A2



CH1 OUT



CH2 OUT



B1, B2 = 2.5V

t

CH-CH

V

/2 VDD/2

DD

VDD/2 VDD/2

Figure 3. Any Channel to Any Channel Skew, Same Package

t

CH-CH

2V

1520 F03

U

U

EQUIVALE T I PUT NETWORKS

A

B

U

≥18k

3.3V

≥18k

3.3V

RECEIVER ENABLED, VDD = 5V RECEIVER DISABLED OR VDD = 0V

Figure 5. Input Thevenin Equivalent

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APPLICATIONS INFORMATION

Theory of Operation

Unlike typical line receivers whose propagation delay can
vary by as much as 500% from package to package and
show significant temperature drift, the LTC1520 employs
a novel architecture that produces a tightly controlled and
temperature compensated propagation delay. The differ­ential timing skew is also minimized between rising and

Figure 4. Package-to-Package Propagation Delay Skew

A

B

≥18k

≥18k

1520 F05

falling output edges, and the propagation delays of any
two receivers within a package are very tightly matched.

The precision timing features of the LTC1520 reduce
overall system timing constraints by providing a narrow
6ns window during which valid data appears at the re­ceiver output. This output timing window applies to all
receivers in all packages over all operating temperatures

5

LTC1520

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APPLICATIONS INFORMATION

thereby making the LTC1520 well suited for high speed
parallel data transmission applications such as backplanes.

In clocked data systems, the low skew minimizes duty
cycle distortion of the clock signal. The LTC1520 can
propagate signals at frequencies up to 25MHz (50Mbps)
with less than 5% duty cycle distortion. When a clock
signal is used to retime parallel data, the maximum recom­mended data transmission rate is 25Mbps to avoid timing
errors due to clock distortion.

Rail-to-rail input common mode range enables the LTC1520
to be used in both single-ended and differential applica­tions with transmission distances up to 100 feet. Thermal
shutdown and short-circuit protection prevent latchup
damage to the LTC1520 during fault conditions.

Single-Ended Applications

Over short distances, the LTC1520 can be configured to
receive single-ended data by tying one input to a fixed bias
voltage and connecting the other input to the driver output.
In such applications, standard high speed CMOS logic
may be used as a driver for the LTC1520. The receiver trip
points may be easily adjusted to accommodate different
driver output swings by changing the resistor divider at the
fixed input. Figure 6a shows a single-ended receiver
configuration with the driver and receiver connected via

MC74ACT04
(TTL INPUT)

(CMOS INPUT)

MC74AC04

MC74AC04

10Ω

PC TRACE

5V

2.2k

0.01µF

2.2k

Figure 6a. Single-Ended Receiver

PC TRACE OR

10pF

–

1/4 LTC1520

+

10Ω

1520 F06a

0.01µF

PC TRACE

1520 F06b

PC traces. Note that at very high speeds, transmission line
and driver ringing effects have to be considered. Motorola’s

MECL System Design Handbook

serves as an excellent
reference for transmission line and termination effects. To
mitigate transmission errors and duty cycle distortion due
to driver ringing, a small output filter or a dampening
resistor on VDD may be needed as shown in Figure 6b. To
transmit single-ended data over distances up to 10 feet,
twisted pair is recommended with the unused wire
grounded at both ends (Figure 7).

MC74ACT04

MC74AC04

10-FT TWISTED PAIR

–

120Ω

1/4 LTC1520

+

1520 F07

0.01µF

5V

3.3k

2.2k

Figure 7. Medium Distance Single-Ended Transmission
Using a CMOS Driver

Differential Transmission

The LTC1520 is well suited for medium distance differen­tial transmission due to its rail-to-rail input common mode
range. Clock rates up to 25MHz can be transmitted over
100 feet of high quality twisted pair. Figure 8 shows the
LTC1520 receiving differential data from a PECL driver. As
in the single-ended configurations, care must be taken to
properly terminate the differential data lines to avoid
unwanted reflections, etc.

5V

100Ω

100Ω

100Ω

100-FT TWISTED PAIR

100Ω

*MC10116



R

T

120Ω

+

1/4 LTC1520

–

1520 F08

5V

5V

*

Figure 6b. Techniques to Minimize Driver Ringing Figure 8. Differential Transmission Over Long Distances

6

LTC1520

U

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APPLICATIONS INFORMATION

Alternate Uses

The tightly controlled propagation delay of the LTC1520
allows the part to serve as a fixed delay element. Figure 9
shows the LTC1520 used as a tapped delay line with 18ns
±3ns steps. Several LTC1520s may be connected in series
to form longer delay lines. Each tap in the delay line is
accurate to within ±17% over temperature.

As shown in Figure 10, the LTC1520 can be used to create
a temperature stable ring oscillator with period increments

0ns DELAY

INPUT

5V

+

1/4 LTC1520

–

3.3k

18ns DELAY

+

1/4 LTC1520

–

of 36ns. Low skew and good channel-to-channel match­ing enable this oscillator to achieve better than a 45/55
duty cycle (the duty cycle approaches 50/50 as more
LTC1520s are used for lower frequencies). Note that the
fixed voltage bias may either be created externally with a
resistor divider or generated internally using a bypass
capacitor and the internal open circuit bias point (approxi­mately 3.3V). The use of the internal bias point will result
in a 1% to 2% distortion of the duty cycle.

36ns DELAY

54ns DELAY

+

1/4 LTC1520

–

+

1/4 LTC1520

–

72ns DELAY

0.01µF

3.3k

0.01µF

5V

0.01µF

+

1/4 LTC1520

–

Figure 9. Tapped Delay Line with 18ns Steps

3.3k

3.3k

+

1/4 LTC1520

–

+

1/4 LTC1520

–

9.3MHz OSCILLATOR
WITH BETTER THAN 
45/55 DUTY CYCLE

+

1/4 LTC1520

+

1/4 LTC1520

–

–

+

1/4 LTC1520

–

TYPICAL STABILITY
±5% OVER TEMPERATURE

+

1/4 LTC1520

–

1520 F10

6.9MHz
OSCILLATOR OUTPUT

1520 F09

Figure 10. Temperature Stable Ring Oscillators

7

LTC1520

PACKAGE DESCRIPTION

U

S Package

16-Lead Plastic Small Outline (Narrow 0.150)

(LTC DWG # 05-08-1610)

0.386 – 0.394*

(9.804 – 10.008)

13

16

14

15

12

11 10

9

0.228 – 0.244

(5.791 – 6.197)

0.010 – 0.020

(0.254 – 0.508)

0.008 – 0.010

(0.203 – 0.254)

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH 
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE


× 45°

0° – 8° TYP

0.016 – 0.050

0.406 – 1.270

4

5

0.050

(1.270)

TYP

0.053 – 0.069

(1.346 – 1.752)

0.014 – 0.019

(0.355 – 0.483)

**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD 
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE



1

3

2

7

6

8

RELATED PARTS

PART NUMBER DESCRIPTION COMMENTS

LTC486/487 Low Power Quad RS485 Driver 10Mbps, –7V to 12V Common Mode Range
LTC488/489 Low Power Quad RS485 Receiver 10Mbps, –7V to 12V Common Mode Range
LT®1016 Ultrafast Precision Comparator Single 5V Supply, 10ns Propagation Delay
LTC1518 High Speed Quad RS485 Receiver 50Mbps, –7V to 12V Common Mode Range
LTC1519 High Speed Quad RS485 Receiver 50Mbps, –7V to 12V Common Mode Range

0.150 – 0.157**
(3.810 – 3.988)

0.004 – 0.010

(0.101 – 0.254)

S16 0695

8

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

[phone]

●

FAX

: [phone]

●

TELEX

: 499-3977

LT/GP 0596 6K • PRINTED IN THE USA

 LINEAR TECHNOLOGY CORPORATION 1996