Page 1
FEATURES
■
Precision Propagation Delay: 18.5ns ±3.5ns Over
Temperature
■
High Data Rate:
■
Low t
■
■
■
■
PLH/tPHL
Low Channel-to-Channel Skew: 500ps Typ
–7V to 12V RS485 Input Common Mode Range
Input Resistance ≥22k, Even When Unpowered
Guaranteed Fail-Safe Operation over the Entire
52Mbps
Skew: 500ps Typ
Common Mode Range
■
Hot SwapTM Capable
■
High Common Mode Rejection to 26MHz
■
Short-Circuit Protection: 10mA Typ Output Current
for an Indefinite Short
■
Three-State Output Capability
■
Will Not Oscillate with Slow Moving Input Signals
■
Single 5V Supply
■
Pin Compatible with LTC488, LTC489
U
APPLICATIONS
■
High Speed RS485/RS422 Receivers
■
STS-1/OC-1 Data Receivers
■
PECL Line Receivers
■
Level Translators
■
Fast-20/Fast-40 SCSI Receiver
, LTC and LT are registered trademarks of Linear Technology Corporation.
Hot Swap is a trademark of Linear Technology Corporation.
LTC1518/LTC1519
52Mbps Precision Delay
RS485 Quad Line Receivers
U
DESCRIPTION
The LTC®1518/LTC1519 are high speed, precision delay
differential quad bus/line receivers that can operate at data
rates as high as 52Mbps. They are pin compatible with the
LTC488/LTC489 RS485 line receivers and operate over the
entire – 7V to 12V common mode range. A unique architecture provides very stable propagation delays and low skew
over wide input common mode, input overdrive and ambient temperature ranges. Propagation delay is 18.5ns
±3.5ns. Typical t
PLH/tPHL
500ps.
Each receiver translates differential input levels (VID ≥
300mV) into valid CMOS and TTL output levels. Its high
input resistance (≥22k) allows many receivers to be connected to the same driver. The receiver outputs go into a
high impedance state when disabled.
The receivers have a fail-safe feature that guarantees a high
output state when the inputs are shorted or left floating.
Other protection features include thermal shutdown and a
controlled maximum short-circuit current (50mA Max).
Input resistance remains ≥22k when the device is
unpowered or disabled, thus allowing hot swapping without loading the data lines.
The LTC1518/LTC1519 operate from a single 5V supply
and draw 12mA of supply current.
and channel-to-channel skew is
TYPICAL APPLICATION
52Mbps Data Communication over Twisted Pair
RE RE
2
1
RO
7
4
DI
3
DE
100Ω
6
A 1
4
EN
EN
12
2 B
3
RO
U
Propagation Delay Guaranteed to Fall
Within Shaded Area (±3.5ns)
RECEIVER
VIN =
2
1
RO
7
100Ω
1/4 LTC1518 LTC1685LTC1685
6
3
DE
1518/19 F08
4
DI
3V/DIV
=
V
OUT
5V/DIV
–5 5 15
RECEIVER
OUTPUT
= 5V
V
DD
TIME (ns)
INPUT
= 1.5V
V
ID
25 350 1020304045
1518/19 TA02
1
Page 2
LTC1518/LTC1519
TOP VIEW
S PACKAGE
16-LEAD PLASTIC SO
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
B1
A1
OUT 1
EN12
OUT 2
A2
B2
GND
V
DD
B4
A4
OUT 4
EN34
OUT 3
A3
B3
A
W
O
LUTEXI TIS
S
A
WUW
U
ARB
G
(Note 1)
Supply Voltage ....................................................... 10V
Digital Input Currents ..................... –100mA to 100mA
Digital Input Voltages ............................... –0.5V to 10V
Receiver Input Voltages ........................................ ±14V
Receiver Output Voltages ............. –0.5V to VDD + 0.5V
PACKAGE
1
B1
2
A1
3
OUT 1
4
EN
5
OUT 2
6
A2
7
B2
8
GND
16-LEAD PLASTIC SO
T
= 150°C, θ
JMAX
/
O
RDER I FOR ATIO
TOP VIEW
16
V
DD
15
B4
14
A4
13
OUT 4
12
EN
11
OUT 3
10
A3
9
B3
S PACKAGE
= 90°C/W
JA
WU
ORDER PART
NUMBER
LTC1518CS
U
Receiver Input Differential ....................................... 10V
Short-Circuit Duration .................................... Indefinite
Operating Temperature Range .................... 0°C to 70°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
LTC1519CS
T
JMAX
= 150°C, θ
= 90°C/W
JA
Consult factory for Industrial and Military grade parts.
DC ELECTRICAL CHARACTERISTICS
VDD = 5V ±5% (Notes 2, 3) per receiver, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
CM
V
IH
V
IL
I
IN1
I
IN2
R
IN
C
IN
V
OC
V
ID(MIN)
dV
ID
V
OH
V
OL
I
OZR
I
DD
I
OSR
2
Input Common Mode Voltage A, B Inputs ● –7 12 V
Input High Voltage EN, EN, EN12, EN34 ● 2V
Input Low Voltage EN, EN, EN12, EN34 ● 0.8 V
Input Current EN, EN, EN12, EN34 ● –1 1 µA
Input Current (A, B) VA, VB = 12V ● 500 µA
, VB = –7V ● –500 µA
V
A
Input Resistance –7V ≤ VCM ≤ 12V (Figure 5) ● 22 kΩ
Input Capacitance (Note 4) 3 pF
Open-Circuit Input Voltage VDD = 5V (Note 4) (Figure 5) ● 3.2 3.3 3.4 V
Differential Input Threshold Voltage –7V ≤ VCM ≤ 12V ● –0.3 0.3 V
Input Hysteresis VCM = 2.5V 25 mV
Output High Voltage I
Output Low Voltage I
Three-State Output Current 0V < V
Total Supply Current All 4 Receivers VID > 0.3V, No Load, Device Enabled ● 12 20 mA
Short-Circuit Current V
= –4mA, VID = 0.3V, VDD = 5V ● 4.6 V
OUT
= 4mA, VID = –0.3V, VDD = 5V ● 0.4 V
OUT
< 5V ● –10 10 µA
OUT
OUT
= 0V, V
= 5V (Note 7) ● –50 50 mA
OUT
Page 3
LTC1518/LTC1519
DC ELECTRICAL CHARACTERISTICS
VDD = 5V ±5% (Notes 2, 3) per receiver, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Max VID for Fail-Safe Detection –7V ≤ VCM ≤ 12V 25 mV
Min Time to Detect Fault Condition 2 µs
CMRR Common Mode Rejection Ratio VCM = 2.5V, f = 26MHz (Note 4) 45 dB
UW
SWITCHI G TI E CHARACTERISTICS
VDD = 5V ±5% (Notes 2, 3) VID = 1.5V, VCM = 2.5V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t
, t
PLH
tr, t
f
t
SKD
t
ZL
t
ZH
t
LZ
t
HZ
t
CH-CH
t
PKG-PKG
tr, tf Input Maximum Input Rise or Fall Time (Note 4) ● 2000 ns
f
IN(MAX)
C
L
The ● denotes specifications which apply over the full operating
temperature range.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All currents into the device pins are positive; all currents out of the
device pins are negative.
Note 3: All typicals are given for V
Note 4: Guaranteed by design, but not tested.
Input-to-Output Propagation Delay CL = 15pF (Figure 1) ● 15 18.5 22 ns
PHL
Rise/Fall Times CL = 15pF 2.5 ns
t
– t
PLH
Enable to Output Low CL = 15pF (Figure 2) ● 10 35 ns
Enable to Output High CL = 15pF (Figure 2) ● 10 35 ns
Disable from Output Low CL = 15pF (Figure 2) ● 20 35 ns
Disable from Output High CL = 15pF (Figure 2) ● 20 35 ns
Channel-to-Channel Skew CL = 15pF (Figure 3, Note 6) 500 ps
Package-to-Package Skew CL = 15pF, Same Temperature 1.5 ns
Minimum Input Pulse Width (Note 4) ● 12 19.2 ns
Maximum Input Frequency Square Wave (Note 4) ● 26 40 MHz
Maximum Data Rate (Note 4) ● 52 80 Mbps
Load Capacitance (Note 4) 500 pF
Skew C
PHL
= 5V, TA = 25°C.
DD
= 15pF, Same Receiver (Note 5) 500 ps
L
(Figure 4, Note 4)
t
– t
Note 5: Worst-case
over the full operating temperature range.
Note 6: Maximum difference between any two t
single package over the full operating temperature range.
Note 7: Short-circuit current does not represent output drive capability.
When the output detects a short-circuit condition, output drive current is
significantly reduced until the short is removed.
PLH
skew for a single receiver in a package
PHL
or t
PLH
transitions in a
PHL
3
Page 4
LTC1518/LTC1519
DATA RATE (Mbps)
0
SUPPLY CURRENT (mA)
50
45
40
35
30
25
20
15
10
5
0
40
LTC1518/19 • TPC05
10
20
30
50
TA = 25°C
V
CM
= 2.5V
V
ID
= 1.5V
4 RECEIVERS
SWITCHING
1 RECEIVER
SWITCHING
COMMON MODE (V)
–6
PROPAGATION DELAY (ns)
25
20
15
10
5
0
–2
2
412
LTC1464 • TPC08
–4 0
6
8
10
TA = 25°C
V
ID
= 1.5V
INPUT DIFFERENTIAL (V)
0.3
DATA RATE (Mbps)
70
60
50
40
30
20
10
0
0.5 1.0 1.5 2.0
LTC1518/19 • TPC10
2.5
TA = 25°C
V
CM
= 2.5V
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Propagation Delay (t
CMRR vs Frequency Supply Current vs Data Rate
46.5
46.0
45.5
45.0
44.5
44.0
43.5
43.0
TA = 25°C
42.5
COMMON MODE REJECTION RATIO (dB)
42.0
= 2.5V
V
CM
10
1k 100k 10M
FREQUENCY (Hz)
1518/19 G01
Supply Current
vs Temperature and Data Rate
25
1 RECEIVER
SWITCHING
20
15
10
SUPPLY CURRENT (mA)
5
0
100°C
25°C
–25°C
0°C
= 2.5V
V
CM
= 1.5V
V
ID
10
0
DATA RATE (Mbps)
30
40
20
50
LTC1518/19 • TPC06
vs Temperature
25
VCM = 2.5V
= 1.5V
V
ID
20
15
10
PROPAGATION DELAY (ns)
5
0
–50 –25
0
TEMPERATURE (°C)
Propagation Delay
vs Load Capacitance
30
TA = 25°C
= 2.5V
V
CM
25
= 1.5V
V
ID
20
15
10
PROPAGATION DELAY (ns)
5
0
5 15 25 35 55 105 205
LOAD CAPACITANCE (pF)
PLH/tPHL
50
25
75
100
LTC1518/19 • TPC07
)
125
1518/19 G02
Propagation Delay
vs Common Mode
4
Propagation Delay
vs Input Differential Voltage
25
TA = 25°C
= 2.5V
V
CM
20
15
10
PROPAGATION DELAY (ns)
5
0
0.5 1.0 1.5 2.0
0.3
INPUT DIFFERENTIAL (V)
Maximum Data Rate
vs Input Differential Voltage
2.5
LTC1518/19 • TPC09
Page 5
UUU
PIN FUNCTIONS
LTC1518/LTC1519
LTC1518
B1 (Pin 1): Receiver 1 Inverting Input.
A1 (Pin 2): Receiver 1 Noninverting Input.
OUT 1 (Pin 3): Receiver 1 Output.
EN (Pin 4): A high enables all outputs; a low on Pin 4 and
a high on Pin 12 will put all outputs into a high impedance
state. Do not float.
OUT 2 (Pin 5): Receiver 2 Output.
A2 (Pin 6): Receiver 2 Noninverting Input.
B2 (Pin 7): Receiver 2 Inverting Input.
GND (Pin 8): Ground Pin. A ground plane is recommended
for all LTC1518 applications.
B3 (Pin 9): Receiver 3 Inverting Input.
A3 (Pin 10): Receiver 3 Noninverting Input.
OUT 3 (Pin 11): Receiver 3 Output.
EN (Pin 12):
a high on Pin 12 will put all outputs into a high impedance
state. Do not float.
A low enables all outputs; a low on Pin 4 and
LTC1519
B1 (Pin 1): Receiver 1 Inverting Input.
A1 (Pin 2): Receiver 1 Noninverting Input.
OUT 1 (Pin 3): Receiver 1 Output.
EN12 (Pin 4): A high enables receivers 1 and 2; a low will
put the outputs of receivers 1 and 2 into a high impedance
state. Do not float.
OUT 2 (Pin 5): Receiver 2 Output.
A2 (Pin 6): Receiver 2 Noninverting Input.
B2 (Pin 7): Receiver 2 Inverting Input.
GND (Pin 8): Ground Pin. A ground plane is recommended
for all LTC1519 applications.
B3 (Pin 9): Receiver 3 Inverting Input.
A3 (Pin 10): Receiver 3 Noninverting Input.
OUT 3 (Pin 11): Receiver 3 Output.
EN34 (Pin 12):
put the outputs of receivers 3 and 4 into a high impedance
state. Do not float.
A high enables receivers 3 and 4; a low will
OUT 4 (Pin 13): Receiver 4 Output.
A4 (Pin 14): Receiver 4 Noninverting Input.
B4 (Pin 15): Receiver 4 Inverting Input.
VDD (Pin 16): Power Supply Input. This pin should be
decoupled with a 0.1µF ceramic capacitor as close as
possible to the pin. Recommended: VDD = 5V ±5%.
OUT 4 (Pin 13): Receiver 4 Output.
A4 (Pin 14): Receiver 4 Noninverting Input.
B4 (Pin 15): Receiver 4 Inverting Input.
VDD (Pin 16): Power Supply Input. This pin should be
decoupled with a 0.1µF ceramic capacitor as close as
possible to the pin. Recommended: VDD = 5V ±5%.
5
Page 6
LTC1518/LTC1519
UW W
SWITCHI G TI E WAVEFOR S
tr = tf ≤ 3ns for all input and enable signals.
+
1/4
LTC1518
LTC1519
–
4V
t
PHL
/2 VDD/2
V
DD
OUTPUT
15pF
1518/19 F01b
1V
INPUT
OUTPUT
INPUT
2.5V
2.5V 2.5V
t
PLH
Figure 1. Propagation Delay Test Circuit and Waveforms
INPUT
A1, A2
1518/19 F01
4V
B1, B2 = 2.5V
ENABLE
OUT 1
OUT 1
RECEIVER
OUTPUT
3V
0V
5V
V
OL
V
OH
0V
1.5V
t
t
C
1.5V
t
ZL
2.5V
2.5V
ZH
1k
L
OUTPUT
NORMALLY LOW
OUTPUT
NORMALLY HIGH
S1
S2
1k
LZ
t
HZ
V
DD
Figure 2. Receiver Enable and Disable Timing Test Circuit
and Waveforms
1V
0.2V
0.2V
1518/19 F02
CH1 OUT
CH2 OUT
t
CH-CH
V
/2 VDD/2
DD
VDD/2 VDD/2
t
CH-CH
1518/19 F03
Figure 3. Any Channel to Any Channel Skew, Same Package
INPUT
A1, B1
V
= 1.5V
ID
SAME INPUT FOR BOTH PACKAGES
PACKAGE 1
OUT 1
t
PKG-PKG
PACKAGE 2
OUT 1
t
PKG-PKG
Figure 4. Package-to-Package Propagation Delay Skew
1518/19 F04
6
Page 7
U
U
EQUIVALE T I PUT NETWORKS
LTC1518/LTC1519
A
B
U
≥22k
3.3V
≥22k
3.3V
RECEIVER ENABLED, VDD = 5V RECEIVER DISABLED OR VDD = 0V
Figure 5. Input Thevenin Equivalent
WUU
APPLICATIONS INFORMATION
Theory of Operation
Unlike typical line receivers whose propagation delay can
vary by as much as 500% from package to package and
show significant temperature drift, the LTC1518/LTC1519
employ a novel architecture that produces a tightly controlled and temperature compensated propagation delay.
The differential timing skew is also minimized between
rising and falling output edges, and the propagation delays
of any two receivers within a package are very tightly
matched.
The precision timing features of the LTC1518/LTC1519
reduce overall system timing constraints by providing a
narrow ±3.5ns window during which valid data appears at
the receiver output. This output timing window applies to
all receivers in all packages over all operating temperatures, thereby making the LTC1518/LTC1519 well suited
for high speed data transmission.
In clocked data systems, the low skew minimizes duty
cycle distortion of the clock signal. The LTC1518/LTC1519
can propagate signals at frequencies of 26MHz (52Mbps)
with less than 5% duty cycle distortion. When a clock
signal is used to retime parallel data, the maximum recommended data transmission rate is 25Mbps to avoid timing
errors due to clock distortion.
Thermal shutdown and short-circuit protection prevent
latchup damage to the LTC1518/LTC1519 during fault
conditions.
A
B
≥22k
≥22k
1518/19 F05
Fail-Safe Features
The LTC1518/LTC1519 have a fail-safe feature that guarantees the output to be in a logic HIGH state when the
inputs are either shorted or left open (note that when
inputs are left open, any external large leakage current
might override the fail-safe). The fail-safe feature detects
shorted inputs over the entire common mode range. When
a fault is detected, the output will typically go high in 2µs.
When some of the receivers within a package are not
used, the open fail-safe feature will allow the user to let
the receiver inputs float and maintain a high logic state at
the output. Without the open fail-safe feature, any noise
at the input would cause unwanted glitches at the output.
When the inputs are left “open,” one must make sure that
there are no sources of leakage current connected to one
or both of the inputs. This can happen if the device is
being driven single-endedly and both the signal and the
DC bias are disconnected. If the capacitor used to bypass
the DC bias is left connected to the input of the device and
is leaky (>1µA), the output of the device might not be the
desired high logic state. Also keep in mind that the inputs
are high impedance (≥22kΩ). When left open, noisy
traces should be kept away from the receiver inputs to
minimize capacitive coupling of undesired signals. Even
with the open fail-safe feature, for maximum noise
immunity, grounding the negative input of unused receivers is recommended.
7
Page 8
LTC1518/LTC1519
U
WUU
APPLICATIONS INFORMATION
When the inputs are accidentally shorted (by cutting
through a cable, for example), the short-circuit fail-safe
feature will guarantee a high output logic level. Note also
that if the line driver is removed and the termination
resistors are left in place, the receiver will see this as a
“short” and output a logic high.
Both of these fail-safe features will keep the receiver from
outputting false data pulses under fault conditions.
Single-Ended Applications
Over short distances, the LTC1518/LTC1519 can be configured to receive single-ended data by tying one input to
a fixed bias voltage and connecting the other input to the
driver output. In such applications, standard high speed
CMOS logic may be used as a driver for the LTC1518/
LTC1519. With a 22k minimum input resistance, the
receiver trip points may be easily adjusted to accommo-
date different driver output swings by changing the resistor divider at the fixed input. Figure 6a shows a singleended receiver configuration with the driver and receiver
connected via PC traces. Note that at very high speeds,
transmission line and driver ringing effects must be considered. Motorola’s
MECL System Design Handbook
serves
as an excellent reference for transmission line and termination effects. To mitigate transmission errors and duty
cycle distortion due to driver ringing, a small output filter
or a dampening resistor on the driver’s VDD may be needed
as shown in Figure 6b. With an open circuit voltage of 3.3V
at both inputs, the receivers can be used without an
external bias applied to the fixed inputs. The fixed input
should be bypassed with a 0.01µF ceramic capacitor. The
positive input should be driven with a 5V CMOS pat in
order to minimize the skew caused by the 3.3V threshold.
Figure 6c shows this configuration. Note that due to the
MC74ACT04
(TTL INPUT)
PC TRACE
0.01µF
5V
2.2k
2.2k
MC74AC04
(CMOS INPUT)
Figure 6a. Single-Ended Receiver
–
1/4
LTC1518
LTC1519
+
1518/19 F06a
MC74ACT04
(TTL INPUT)
PC TRACE
MC74AC04
(CMOS INPUT)
0.01µF
Figure 6c. Self Biased Single Ended Receiver
MC74AC04
10Ω
Figure 6b. Techniques to Minimize Driver Ringing
–
1/4
LTC1518
LTC1519
+
1518/19 F06c
PC TRACE OR
10pF
10Ω
0.01µF
PC TRACE
1518/19 F06b
8
Page 9
LTC1518/LTC1519
U
WUU
APPLICATIONS INFORMATION
increased skew, this configuration might not operate at the
highest data rates. To transmit single-ended data over
short to medium distances, twisted pair is recommended
with the unused wire grounded at both ends (Figure 7).
5V
MC74ACT04
MC74AC04
10-FT TWISTED PAIR
100Ω
0.01µF
5V
3.3k
1k
Differential Transmission
Data rates up to 52Mbps can be transmitted over 100 feet
of high quality category 5 twisted pair. Figure 8 shows the
LTC1518 receiving differential data from an LTC1685
transceiver. As in the single-ended configurations, care
must be taken to properly terminate the differential data
lines to avoid unwanted reflections, etc.
–
1/4
LTC1518
100Ω
LTC1519
+
1518/19 F07
Figure 7. Medium Distance Single-Ended Transmission
Using a CMOS Driver
RE RE
2
1
RO
7
4
DI
3
DE
100Ω
6
A 1
4
EN
EN
12
2 B
1/4 LTC1518 LTC1685LTC1685
3
RO
100Ω
7
6
2
3
DE
1518/19 F08
Figure 8. LTC1518 Connected to LTC1685
High Speed RS485 Transceiver
1
RO
4
DI
9
Page 10
LTC1518/LTC1519
U
WUU
APPLICATIONS INFORMATION
Figure 9 shows a trace with 100ft category 5 UTP between
an LTC1685 driver and an LTC1518 receiver. Notice that at
the far end of the cable, the signal to the LTC1518 input has
been reduced. Figure 10 shows a 52Mbps square wave.
Output Short-Circuit Protection
The LTC1518/LTC1519 employ voltage sensing shortcircuit protection at the output terminals. For a given input
differential, this circuitry determines what the correct
CABLE
2V/DIV
2V/DIV
DELAY
output level should be. For example, if the input differential
is ≥ 300mV, it expects the output to be a logic high. If the
output is subsequently shorted to a voltage below VDD/2,
this circuitry shuts off the output devices and turns on a
smaller device in its place. A timeout period of about 50ns
is used in order to maintain normal high frequency operation, even under heavy capacitive loads (>100mA transient current into the load).
DRIVER
INPUT
RECEIVER
INPUT
NOTES:
TOP TRACE: LTC1685 DRIVER INPUT
MID TRACE: LTC1518 INPUT AT FAR END
OF 100ft CATAGORY 5 UTP
BOTTOM TRACE: LTC1518 OUTPUT
5V/DIV
50ns/DIV
LTC1518/19 • F09
RECEIVER
OUTPUT
Figure 9. 20ns Pulse Propagating Down 100ft of Category 5 UTP
1V/DIV
5V/DIV
RECEIVER
INPUT
RECEIVER
OUTPUT
20ns/DIV
LTC1518/19 • F10
NOTES:
TOP TRACE: LTC1518 INPUT AT FAR END
OF 100ft CAT 5 UTP
BOTTOM TRACE: LTC1518 OUTPUT
Figure 10. 52Mbps Pulse Train Over 100ft of Category 5 UTP
10
Page 11
PACKAGE DESCRIPTION
LTC1518/LTC1519
U
Dimensions in inches (millimeters) unless otherwise noted.
S Package
16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.386 – 0.394*
(9.804 – 10.008)
13
16
14
15
12
11
10
9
0.010 – 0.020
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
×
°
45
0.016 – 0.050
0.406 – 1.270
0° – 8° TYP
0.228 – 0.244
(5.791 – 6.197)
4
5
0.050
(1.270)
TYP
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
1
3
2
0.150 – 0.157**
(3.810 – 3.988)
7
6
8
0.004 – 0.010
(0.101 – 0.254)
S16 0695
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
Page 12
LTC1518/LTC1519
F
TYPICAL APPLICATION
BACK
PLUG-IN
V
ON/RESET
GND
PLANE
CC
CARD
CONNECTOR 2
U
High Speed Receiver with Hot Swap Control
2
ON
CONNECTOR 1
R1
0.005Ω
876
V
CC
LTC1422
34
SENSE
C2
0.33µF
Q1
MTB56N06V
R2
10Ω
5%
GATE
FB
RESET
GNDTIMER
C1
0.1µF
5
1
R3
6.81k
1%
R4
2.43k
1%
RESET
V
CC
5V
+
C4
2200µF
µP
5A
3.3k
8
DATA
BUS
RELATED PARTS
LTC1518
2
+
1
–
6
+
7
–
10
+
–
9
14
+
–
15
8
LTC1518
2
+
1
–
6
+
7
–
10
+
–
9
14
+
15
–
8
16
4
3
5
11
13
16
4
3
5
11
13
1518 TA03
3.3k
D7
D6
D5
D4
D3
D2
D1
D0
0.1µ
PART NUMBER DESCRIPTION COMMENTS
LTC486/LTC487 Low Power Quad RS485 Drivers 10Mbps, – 7V to 12V Common Mode Range
LTC488/LTC489 Low Power Quad RS485 Receivers 10Mbps, –7V to 12V Common Mode Range
LT®1016 UltraFastTM Precision Comparator Single 5V Supply, 10ns Propagation Delay
LTC1520 High Speed, Precision Quad Differential Line Receiver 52Mbps, ±100mV Threshold, Rail-to-Rail Common Mode
LTC1685/LTC1686/ High Speed, Precision RS485 Transceivers 52Mbps, Pin Compatible with LTC485/490/491
LTC1687
UltraFast is a trademark of Linear Technology Corporation.
15189fs, sn15189 LT/TP 0298 4K • PRINTED IN THE USA
LINEAR TECHNOLOGY CORPORATION 1997
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417 ● (408) 432-1900
FAX: (408) 434-0507
●
TELEX: 499-3977 ● www.linear-tech.com
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