Datasheet LTC1473 Datasheet (Linear Technology)

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LTC1473
FEATURES
Power Path Management for Systems with Multiple DC Sources
Switches and Isolates Sources Up to 30V
Adaptive High Voltage Step-Up Regulator for N-Channel Gate Drive
Capacitor Inrush and Short-Circuit Current Limited
User-Programmable Timer to Limit Switch Dissipation
Small Footprint: 16-Pin Narrow SSOP
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APPLICATIO S
Notebook Computers
Portable Instruments
Handi-Terminals
Portable Medical Equipment
Portable Industrial Control Equipment
Dual PowerPath
TM
Switch Driver
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DESCRIPTIO
The LTC®1473 provides a power management solution for single and dual battery notebook computers and other portable equipment. The LTC1473 drives two sets of back­to-back N-channel MOSFET switches to route power to the input of the main system switching regulator. An internal boost regulator provides the voltage to fully enhance the logic level N-channel MOSFET switches.
The LTC1473 senses current to limit surge currents both into and out of the batteries and the system supply capacitor during switch-over transitions or during fault conditions. A user-programmable timer monitors the time the MOSFET switches are in current limit and latches them off when the programmed time is exceeded.
A unique “2-diode mode” logic ensures system start-up regardless of which input receives power first.
, LTC and LT are registered trademarks of Linear Technology Corporation.
PowerPath is a trademark of Linear Technology Corporation.
TYPICAL APPLICATION
BAT1
MMBD2838LTI
DCIN
C
TIMER
4700pF
1µF
BAT2
*COILCRAFT 1812LS-105XKBC
1µF
FROM POWER
MANAGEMENT
1mH*
MMBD914LTI
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MBRD340
Si9926DY
LTC1473
1
IN1
2
3
4
5
6
7
8
IN2
DIODE
TIMER
+
V
V
GG
SW
GND
µP
GA1
SAB1
GB1
SENSE
SENSE
GA2
SAB2
GB2
16
15
14
13
+
12
11
10
9
Si9926DY
R
SENSE
0.04
INPUT OF SYSTEM HIGH EFFICIENCY DC/DC SWITCHING REGULATOR (LTC1735, ETC)
C
OUT
1473 TA01
1
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LTC1473
TOP VIEW
GN PACKAGE
16-LEAD NARROW PLASTIC SSOP
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10
9
IN1 IN2
DIODE
TIMER
V
+
V
GG
SW
GND
GA1 SAB1 GB1 SENSE
+
SENSE
GA2 SAB2 GB2
ABSOLUTE MAXIMUM RATINGS
(Note 1)
DCIN, BAT1, BAT2 Supply Voltage .............. –0.3 to 32V
SENSE+, SENSE–, V+..................................–0.3 to 32V
GA1, GB1, GA2, GB2 ................................... –0.3 to 42V
SAB1, SAB2.................................................– 0.3 to 32V
SW, VGG......................................................– 0.3 to 42V
IN1, IN2, DIODE........................................–0.3V to 7.5V
Junction Temperature (Note 2)............................. 125°C
Operating Temperature Range
Commercial .............................................0°C to 70°C
Industrial ........................................... –40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ELECTRICAL CHARACTERISTICS
The denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. Test circuit, V+ = 20V, unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
+
V I
S
V
GS +
V
UVLO
+
V
UVLOHYS
V
HIDIGIN
V
LODIGIN
I
IN
V
GS(ON)
V
GS(OFF)
+
I
BSENSE
I
BSENSE
V
SENSE
I
PDSAB
I
TIMER
V
TIMER
t
ON
t
OFF
t
D1
t
D2
f
OVGG
2
WW
W
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PACKAGE/ORDER INFORMATION
ORDER PART
NUMBER
LTC1473CGN LTC1473IGN
GN PART MARKING
1473 1473I
T
= 125°C, θJA = 150°C/W
JMAX
Consult factory for Military grade parts.
Supply Operating Range 4.75 30 V Supply Current V
IN1
= V
VGS Gate Supply Voltage VGS = V
DIODE
– V
GG
= 5V, V
+
IN2
= 0V, V
SENSE
+
= V
V+ Undervoltage Lockout Threshold V+ Ramping Down 2.7 3.1 3.5 V V+ Undervoltage Lockout Hysteresis 0.75 1 1.25 V Digital Input Logic High 2 1.6 V Digital Input Logic Low 1.5 0.8 V Input Current V Gate-to-Source ON Voltage I Gate-to-Source OFF Voltage I SENSE+ Input Bias Current V
SENSE– Input Bias Current V
Inrush Current Limit Sense Voltage V
SAB1, SAB2 Pull-Down Current V
Timer Source Current V
Timer Latch Threshold Voltage V Gate Drive Rise Time C Gate Drive Fall Time C Gate Drive Turn-On Delay C Gate Drive Turn-Off Delay C VGG Regulator Operating Frequency 30 kHz
= V
IN1
= I
GA1
= I
GA1
SENSE
V
SENSE
SENSE
V
SENSE
SENSE–
V
SENSE–
= V
IN1
= V
V
IN1
= 0.8V, V
IN1
V
SENSE
= 0.8V, V
IN1
= 1000pF, V
GS
= 1000pF, V
GS
= 1000pF, V
GS
= 1000pF, V
GS
= V
IN2
= I
GA2
= I
GA2 +
= V
SENSE
+
= V
SENSE
+
= V
SENSE–
+
= V
SENSE
= 20V (V = 0V (V
= V
IN2
= 0.8V, V
IN2
+
– V
SENSE
= 5V ±1 µA
DIODE
= I
GB1
GB1
DIODE
IN2
IN2
= –1µA, V
GB2
= I
= 100µA, V
GB2
= 20V 24.56.5µA
= 0V (Note 3) –300 –160 –100 µA = 20V 24.56.5µA
= 0V (Note 3) –300 –160 –100 µA
– V
SENSE+
SENSE+
– V
SENSE
SENSE
= 0.8V 5 20 30 µA
= 2V 30 200 300 µA
DIODE
= V
= V
SAB1
SAB1
SAB1
SAB1
= 2V, V
DIODE
= 300mV
= 2V 1.1 1.2 1.3 V
DIODE
= V
= 0V (Note 4) 33 µs
SAB2
= V
= 20V (Note 4) 2 µs
SAB2
= V
= 0V (Note 4) 22 µs
SAB2
= V
= 20V (Note 4) 1 µs
SAB2
= V
SAB1
SAB1
) 0.15 0.20 0.25 V
) 0.10 0.20 0.30 V
= 0V, 35.58 µA
TIMER
= 20V 100 200 µA
SENSE
7.5 8.5 9.5 V
= 20V 5.0 5.7 7.0 V
SAB2
= V
= 20V 00.4 V
SAB2
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ELECTRICAL CHARACTERISTICS
TEMPERATURE (°C)
–50
8.1
V
GS
GATE SUPPLY VOLTAGE (V)
8.2
8.4
8.5
8.6
0
9.0
1473 G03
8.3
–25 25 50 75 100 125
8.7
8.8
8.9
V+ = 20V V
GS = VGG
– V
+
LTC1473
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
Note 2: T dissipation P
Note 3: IS increases by the same amount as I
is calculated from the ambient temperature TA and power
J
according to the following formula:
D
= TA + (PD)(150°C/W)
T
J
BSENSE
+
+ I
BSENSE
when
Note 4: Gate turn-on and turn-off times are measured with no inrush current limiting, i.e., V
4.5V and fall times are measured from 4.5V to 1V. Delay times are measured from the input transition to when the gate voltage has risen or fallen to 3V.
their common mode falls below 5V.
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TYPICAL PERFORMANCE CHARACTERISTICS
DC Supply Current vs Supply Voltage
160
140
120
100
80
60
SUPPLY CURRENT (µA)
40
20
0
V
0
5
= V
DIODE
10
= 5V
IN1
V
= 0V
IN2
V
DIODE
= V
V
IN1
V
SENSE
20
15
SUPPLY VOLTAGE (V)
= 5V
+
25
IN2
= V
= 0V
SENSE
30
= V
35
1473 G01
+
40
DC Supply Current vs Temperature
140
V+ = 20V
130
V
DIODE
120
110
100
90
80
SUPPLY CURRENT (µA)
70
60
50
–25 25 50 75 100 125
–50
= V
= 5V
IN1
= 0V
V
IN2
V
= 5V
DIODE
= V
IN1
IN2
= 0V
V
0 TEMPERATURE (°C)
1473 G02
= 0V. Gate rise times are measured from 1V to
SENSE
DC Supply Current vs V
500
450
400
350
300
250
SUPPLY CURRENT (µA)
200
150
100
2.5
0
|V
5
SENSE
V
7.5 | COMMON MODE(V)
SENSE
10
V
DIODE
+
– V
12.5
SENSE
= V
SENSE
15
V+ = 20V
= 5V
IN1
= 0V
V
IN2
= 0V
17.5
1473 • TPC02.5
20
VGS Gate-to-Source ON Voltage vs Temperature
6.0 V+ = V
5.9
5.8
5.7
5.6
5.5
5.4
5.3
GATE-TO-SOURCE ON VOLTAGE (V)
GS
5.2
V
5.1
–50
=20V
SAB
–25 25 50 75 100 125
0 TEMPERATURE (°C)
1473 G04
Undervoltage Lockout Threshold (V+) vs Temperature
5.5
5.0
4.5
4.0
3.5
3.0
2.5
SUPPLY VOLTAGE (V)
2.0
1.5
1.0 –50
START-UP
THRESHOLD
SHUTDOWN
THRESHOLD
–25 25 50 75 100 125
0 TEMPERATURE (°C)
VGS Gate Supply Voltage vs Temperature
1473 G05
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LTC1473
TEMPERATURE (°C)
–50
1.10
TIMER LATCH THRESHOLD VOLTAGE (V)
1.12
1.16
1.18
1.20
0
1.28
1473 G12
1.14
–25 25 50 75 100 125
1.22
1.24
1.26
V+ = 20V
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TYPICAL PERFORMANCE CHARACTERISTICS
Turn-Off Delay and Gate Fall Time vs Temperature
2.2
+
= 20V
V
= 1000pF
C
2.0
LOAD
V
= 20V
SAB
1.8
1.6
1.4
1.2
1.0
0.8
0.6
TURN-OFF DELAY AND GATE FALL TIME (µs)
0.4 –25 25 50 75 100 125
–50
GATE FALL
TIME
TURN-OFF
DELAY
0 TEMPERATURE (°C)
Logic Input Threshold Voltage vs Temperature
1.9
V+ = 5V
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
LOGIC INPUT THRESHOLD VOLTAGE (V)
1.0 –25 25 50 75 100 125
–50
0 TEMPERATURE (°C)
V
V
HIGH
LOW
1473 G07
1473 G10
Turn-On Delay and Gate Rise Time vs Temperature
45
+
= 20V
V
40
35
30
25
20
15
10
5
TURN-ON DELAY AND GATE RISE TIME (µs)
0
= 1000pF
C
LOAD
V
= 0V
SAB
–25 25 50 75 100 125
–50
0 TEMPERATURE (°C)
GATE RISE
TIME
TURN-ON
DELAY
Logic Input Threshold Voltage vs Temperature
1.9 V+ = 20V
1.8
V
V
HIGH
LOW
1.7
1.6
1.5
1.4
1.3
1.2
1.1
LOGCI INPUT THRESHOLD VOLTAGE (V)
1.0
–25 25 50 75 100 125
–50
0 TEMPERATURE (°C)
1473 G06
1473 G11
Rise and Fall Time vs Gate Capacitive Loading
40
35
30
25
20
15
10
RISE AND FALL TIME (µs)
5
0
10
RISE TIME
= 0V
V
SAB
FALL TIME
= 20V
V
SAB
100 1000 10000
GATE CAPACITIVE LOADING (pF)
Timer Latch Threshold Voltage vs Temperature
1473 G08
4
TIMER SOURCE CURRENT (µA)
Timer Source Current vs Temperature
8.5 V+ = 20V
TIMER = 0V
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
–25 25 50 75 100 125
–50
0 TEMPERATURE (°C)
1473 G13
Sense Pin Source Current I
vs V
BSENSE
175
150
125
100
75
50
25
SENSE PIN CURRENT (µA)
0
–25
2.5
0
SENSE
5
7.5 V
V+ = 20V V
DIODE
V
IN2
V
SENSE
10
SENSE
= 0V
(V)
= V
+
12.5
– V
IN1
SENSE
= 5V
15
= 0V
17.5
1473 • TPC14
20
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PIN FUNCTIONS
LTC1473
IN1 (Pin 1): Logic Input of Gate Drivers GA1 and GB1. IN1 is disabled when IN2 is high or DIODE is low.
IN2 (Pin 2): Logic Input of Gate Drivers GA2 and GB2. IN2 is disabled when IN1 is high or DIODE is low.
DIODE (Pin 3): “2-Diode Mode” Logic Input. DIODE over­rides IN1 and IN2 by forcing the two back-to-back external N-channel MOSFET switches to mimic two diodes.
TIMER (Pin 4): Fault Timer. A capacitor connected from this pin to GND programs the time the MOSFET switches are allowed to be in current limit. To disable this function, Pin 4 can be grounded.
V+ (Pin 5): Input Supply. Bypass this pin with at least a 1µF capacitor.
VGG (Pin 6): Gate Driver Supply. This high voltage supply is intended only for driving the internal micropower gate drive circuitry.
circuitry
SW (Pin 7): Open Drain of an internal N-Channel MOSFET Switch. This pin drives the bottom of the VGG switching regulator inductor which is connected between this pin and the V+ pin.
GND (Pin 8): Ground. GA2, GB2 (Pins 11, 9): Switch Gate Drivers. GA2 and GB2
drive the gates of the second back-to-back external N-channel switches.
. Bypass this pin with at least 1µF.
Do not load this pin with any external
SAB2 (Pin 10): Source Return. The SAB2 pin is connected to the sources of SW A2 and SW B2. A small pull-down current source returns this node to 0V when the switches are turned off.
SENSE– (Pin 12): Inrush Current Input. This pin should be connected directly to the bottom (output side) of the low value current sense resistor in series with the two input power selector switch pairs, SW A1/B1 and SW A2/B2, for detecting and controlling the inrush current into and out of the power supply sources and the output capacitor.
SENSE+ (Pin 13): Inrush Current Input. This pin should be connected directly to the top (switch side) of the low value current sense resistor in series with the two input power selector switch pairs, SW A1/B1 and SW A2/B2, for detecting and controlling the inrush current into and out of the power supply sources and the output capacitor. Cur­rent limit is invoked when (V ±0.2V.
GA1, GB1 (Pins 16, 14): Switch Gate Drivers. GA1 and GB1 drive the gates of the first back-to-back external N-channel switches.
SAB1 (Pin 15): Source Return. The SAB1 pin is connected to the sources of SW A1 and SW B1. A small pull-down current source returns this node to 0V when the switches are turned off.
SENSE
+
– V
SENSE
) exceeds
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LTC1473
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FUNCTIONAL DIAGRA
1
IN1
IN2
2
DIODE
3
+
V
5.5µA
TIMER
4
INRUSH
CURRENT
SENSE
SW A1/B1
GATE
DRIVERS
SW A2/B2
GATE
DRIVERS
GA1
16
SAB1
15
GB1
14
+
SENSE
13
SENSE
12
GA2
11
SAB2
10
GB2
9
V
SW
GND
TO
GATE
DRIVERS
+
V
5
6
GG
7
V
GG
SWITCHING
REGULATOR
8
900k
+
1.20V
R
LATCH
S
1473 FD
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OPERATION
LTC1473
The LTC1473 is responsible for low-loss switching and isolation at the “front end” of the power management system, where up to two battery packs can be connected and disconnected seamlessly. Smooth switching between input power sources is accomplished with the help of lowloss N-channel switches. They are driven by special gate drive circuitry which limits the inrush current in and out of the battery packs and the system power supply capacitors.
All N-Channel Switching
The LTC1473 drives external back-to-back N-channel MOSFET switches to direct power from two sources: the primary battery and the secondary battery or a battery and a wall unit. (N-channel MOSFET switches are more cost effective and provide lower voltage drops than their P­channel counterparts.)
Gate Drive (VGG) Power Supply
The gate drive for the low-loss N-channel switches is supplied by an internal micropower boost regulator which is regulated at approximately 8.5V above V+, up to 37V maximum. In two battery systems, the LTC1473 V+ pin is diode ORed through three external diodes connected to the three main power sources, DCIN, BAT1 and BAT2. Thus, VGG is regulated at 8.5V above the highest power source and will provide the overdrive required to fully enhance the MOSFET switches.
For maximum efficiency the top of the boost regulator inductor is connected to V+ as shown in Figure 1. C1 provides filtering at the top of the 1mH switched inductor, L1, which is housed in a small surface mount package. An internal diode directs the current from the 1mH inductor to the VGG output capacitor C2.
Inrush and Short-Circuit Current Limiting
The LTC1473 uses an adaptive inrush current limiting scheme to reduce current flowing in and out of the two main power sources and the following system’s input capacitor during switch-over transitions. The voltage across a single small valued resistor, R
, is measured to
SENSE
ascertain the instantaneous current flowing through the
two switch pairs, SW A1/B1 and SW A2/B2, during the transitions.
Figure 2 shows a block diagram of a switch driver pair, SW A1/B1. A bidirectional current sensing and limiting circuit determines when the voltage drop across R
SENSE
reaches
±200mV. The gate-to-source voltage, VGS, of the appro- priate switch is limited during the transition period until the inrush current subsides, generally within a few milli­seconds, depending upon the value of the following system’s input capacitor.
This scheme allows capacitors and MOSFET switches of differing sizes and current ratings to be used in the same system without circuit modifications.
BAT1 BAT2DCIN
BAT1
V
LTC1473
GG
LTC1473
TO GATE
DRIVERS
SW A1
GA1
6V
+
(8.5V + V
)
V
GG
SWITCHING
REGULATOR
Figure 1. VGG Switching Regulator
SW B1
GB1
V
SENSE
THRESHOLD
BIDIRECTIONAL
INRUSH CURRENT
SENSING AND
SAB1
6V
SW A/B
GATE
DRIVERS
R
SENSE
+
± 200mV
LIMITING
+
V
V
GG
SW
GND
L1 1mH
V
SENSE
C2 1µF 50V
+
1473 F02
1473 F01
C
C1 1µF 50V
OUTPUT LOAD
OUT
Figure 2. SW A1/B1 Inrush Current Limiting
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LTC1473
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APPLICATIONS INFORMATION
After the transition period, the VGS of both MOSFETs in the selected switch pair rises to approximately 5.6V. The gate drive is set at 5.6V to provide ample overdrive for standard logic-level MOSFET switches without exceeding their maximum VGS rating.
In the event of a fault condition the current limit loop will limit the inrush current into the short. At the instant the MOSFET switch is in current limit, i.e., when the voltage drop across R timing. It will continue to time as long as the MOSFET switch is in current limit. Eventually the preset time will lapse and the MOSFET switch will latch off. The latch is reset by deselecting the gate drive input. Fault time-out is programmed by an external capacitor connected between the TIMER pin and ground.
POWER PATH SWITCHING CONCEPTS
Power Source Selection
is ±200mV, a fault timer will start
SENSE
Switches SW A1/B1 and SW A2/B2 direct power from either batteries to the input of the DC/DC switching regu­lator. Each of the switches is controlled by a TTL/CMOS compatible input that can interface directly with a power management system µP.
Using Tantalum Capacitors
The inrush (and “outrush”) current of the system DC/DC regulator input capacitor is limited by the LTC1473, i.e., the current flowing both in and out of the capacitor during transitions from one input power source to another is limited. In many applications, this inrush current limiting makes it feasible to use smaller tantalum surface mount capacitors in place of larger aluminum electrolytics.
Note: The capacitor manufacturer should be consulted for specific inrush current specifications and limitations and some experimentation may be required to ensure compli­ance with these limitations under all possible operating conditions.
The LTC1473 drives low-loss switches to direct power in the main power path of a single or dual rechargeable battery system, the type found in many notebook comput­ers and other portable equipment.
Figure 3 is a conceptual block diagram that illustrates the main features of an LTC1473 dual battery power manage­ment system starting with the three main power sources and ending at the output load (i.e.: system DC/DC regulator).
DCIN
SW A1/B1
BAT1
SW A2/B2
BAT2
LTC1473
INRUSH CURRENT LIMITING
Back-to-Back Switch Topology
The simple SPST switches shown in Figure 3 actually consist of two back-to-back N-channel switches. These low-loss N-channel switch pairs are housed in 8-pin SO and SSOP packaging and are available from a number of manufacturers. The back-to-back topology eliminates the problems associated with the inherent body diodes in power MOSFET switches and allows each switch pair to
OUTPUT LOAD
+
POWER
MANAGEMENT
µP
HIGH
IN
EFFICIENCY
DC/DC SWITCHING REGULATOR
C
12V
5V
3.3V
8
1473 F03
Figure 3. LTC1473 PowerPath Conceptual Diagram
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LTC1473
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APPLICATIONS INFORMATION
block current flow in either direction when both switches are turned off.
The back-to-back topology also allows for independent control of each half of the switch pair which facilitates bidirectional inrush current limiting and the so-called “2-diode mode” described in the following section.
The 2-Diode Mode
Under normal operating conditions, both halves of each switch pair are turned on and off simultaneously. For example, when the input power source is switched from BAT1 to BAT2 in Figure 4, both gates of switch pair SW A1/B1 are normally turned off and both gates of switch pair SW A2/B2 are turned on. The back-to-back body diodes in switch pair, SW A1/B1, block current flow in or out of the BAT1 input connector.
In the “2-diode mode,” only the first half of each power path switch pair, i.e., SW A1 and SW A2, are turned on; and the second half, i.e., SW B1 and SW B2 are turned off. These two switch pairs now act simply as two diodes connected to the two main input power sources as illus­trated in Figure 4. The power path diode with the highest input voltage passes current through to the output load (i.e. input of the DC/DC converter) to ensure that the power
management µP is powered even under start-up or abnor- mal operating conditions. (An undervoltage lockout circuit defeats this mode when the V+ pin drops below approxi­mately 3.2V. The supply to V+ comes from the main power sources, DCIN, BAT1 and BAT2 through three external diodes as shown in Figure 1.)
The 2-diode mode is asserted by applying an active low to the DIODE input.
COMPONENT SELECTION
N-Channel Switches
The LTC1473 adaptive inrush current limiting circuitry permits the use of a wide range of logic-level N-Channel MOSFET switches. A number of dual, low R
DS(ON)
N-channel switches in 8-lead surface mount packages are available that are well suited for LTC1473 applications.
The maximum allowable drain-source voltage, V
DS(MAX)
, of the two switch pairs, SW A1/B1 and SW A2/B2 must be high enough to withstand the maximum DC supply volt­age. If the DC supply is in the 20V to 28V range, use 30V MOSFET switches. If the DC supply is in the 10V to 18V range, and is well regulated, then 20V MOSFET switches will suffice.
DCIN
BAT1
BAT2
SW A1
ON
SW B1
R
SENSE
OFF
SW A2
ON
Figure 4. LTC1473 PowerPath Switches in 2-Diode Mode
SW B2
OFF
LTC1473
+
C
IN
EFFICIENCY
DC/DC SWITCHING REGULATOR
POWER
MANAGEMENT
OUTPUT LOAD
HIGH
µP
12V
5V
3.3V
1473 F04
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APPLICATIONS INFORMATION
As a general rule, select the switch with the lowest R and able to withstand the maximum allowable VDS. This will minimize the heat dissipated in the switches while increasing the overall system efficiency. Higher switch resistances can be tolerated in some systems with lower current requirements, but care should be taken to ensure that the power dissipated in the switches is never allowed to rise above the manufacturers’ recommended level.
Inrush Current Sense Resistor, R
A small valued sense resistor (current shunt) is used by the two switch pair drivers to measure and limit the inrush or short-circuit current flowing through the conducting switch pair.
The inrush current limit should be set at approximately 2× or 3× the maximum required output current. For example, if the maximum current required by the DC/DC converter is 2A, an inrush current limit of 6A is set by selecting a
0.033 sense resistor, R mula:
SENSE
SENSE
, using the following for-
DS(ON)
The fault time delay is programmed with an external capacitor between the TIMER pin and GND. At the instant the MOSFET switch enters current limit, a 5.5µA current source starts charging C When the voltage across C latch is set and the MOSFET switch is turned off. To reset the latch, the logic input of the MOSFET gate driver is deselected.
The fault time delay should be programmed as large as possible, at least 3× to 5× the maximum switching transi­tion period, to avoid prematurely tripping the protection circuit. Conversely, for the protection circuit to be effec­tive, the fault time delay must be within the safe operating area of the MOSFET switches, as stated in the manufacturer’s data sheet.
The maximum switching transition period happens during a cold start, when a fully charged battery is connected to an unpowered system. The inrush current charging the system supply capacitor to the battery voltage determines the switching transition period.
through the TIMER pin.
TIMER
reaches 1.2V an internal
TIMER
R
Note that the voltage drop across the resistor in this example is only 66mV under normal operating conditions. Therefore, the power dissipated in the resistor is ex­tremely small (132mW), and a small 1/4W surface mount resistor can be used in this application (the resistor will tolerate the higher power dissipation during current limit for the duration of the fault time-out). A number of small valued surface mount resistors are available that have been specifically designed for high efficiency current sensing applications.
Programmable Fault Timer Capacitor, C
A fault timer capacitor, C duration the MOSFET switches are allowed to be in con­tinuous current limit.
In the event of a fault condition, the MOSFET switch is driven into current limit by the inrush current limit loop. The MOSFET switch operating in current limit is in a high dissipation mode and can fail catastrophically if not promptly terminated.
= (200mV)/I
SENSE
INRUSH
TIMER
, is used to program the time
TIMER
The following example illustrates the calculation of C Assume the maximum battery voltage is 20V, the system supply capacitor is 68µF, the inrush current limit is 6A and the maximum current required by the DC/DC converter is 2A. Then, the maximum switching transition period is calculated using the following formula:
(V
t
SW(MAX)
t
SW(MAX)
Multiplying 3 by 340µs gives 1.02ms, the minimum fault delay time. Make sure this delay time does not fall outside of the safe operating area of the MOSFET switch dissipat­ing 60W (6A • 20V/2). Using this delay time the C be calculated using the following formula:
C
Therefore, C
= 1.02ms = 4700pF
TIMER
BAT(MAX)
=
= = 340µs
TIMER
I
(20)(68µF)
6A – 2A
should be 4700pF.
INRUSH
5.5µA
)
1.20V
)(C
IN(DC/DC)
– I
LOAD
)
)
TIMER.
TIMER
can
10
Page 11
LTC1473
U
WUU
APPLICATIONS INFORMATION
VGG Regulator Inductor and Capacitors
The VGG regulator provides a power supply voltage 8.5V higher than any of the three main power source voltages to allow the control of N-channel MOSFET switches. This micropower, step-up voltage regulator is powered by the highest potential available from the three main power sources for maximum regulator efficiency.
LTC1473
+
)
TO GATE
DRIVERS
(8.5V + V
Three external components are required by the VGG regu­lator: L1, C1 and C2, as shown in Figure 5.
L1 is a small, low current, 1mH surface mount inductor. C1 provides filtering at the top of the 1mH switched inductor and should be at least 1µF to filter switching transients. The VGG output capacitor, C2, provides storage and filter­ing for the VGG output and should be at least 1µF and rated for 50V operation. C1 and C2 can be ceramic capacitors.
BAT1 BAT2DCIN
+
V
L1* 1mH
V
GG
SW
C1 1µF 50V
V
GG
SWITCHING
REGULATOR
GND
*COILCRAFT 1812LS-105 XKBC. (708) 639-6400
Figure 5. VGG Step-Up Switching Regulator
C2 1µF 50V
1473 F05
11
Page 12
LTC1473
U
TYPICAL APPLICATIONS
Input Power Routing Circuit for Microprocessor Controlled Dual Battery Dual Chemistry System
R
SENSE
0.033
Si9926DY
DCIN
Si9926DY
LTC1473
16
GA1
15
SAB1
14
GB1
13
+
SENSE
12
SENSE
11
GA2
10
SAB2
9
GB2
BAT2
8.4V
Li-Ion
IN1 IN2
DIODE
TIMER
V
SW
GND
V
GG
+
BAT1
12V
NiCd
1 2 3
C
TIMER
4700pF
4
5
6
7
8
SMBus
750k
500k
POWER MANAGEMENT µP
MMBD2838LT1
C7
1µF
1µF
LTC1473
1
IN1
2
IN2
3
C
TIMER
4700pF
C8
L1* 1mH
MMBD914LT1
DIODE
4
TIMER
5
+
V
6
V
GG
7
SW
8
GND
HIGH EFFICIENCY
DC/DC SWITCHING
REGULATOR
MBRD340
SAB1
SENSE
SENSE
SAB2
GA1
GB1
GA2
GB2
16
15
14
13
+
12
11
10
9
Si9926DYSi9926DY
R
SENSE
0.033
1473 TA02
* COILCRAFT 1812LS-105XKBC
12
BATTERY CHARGER
Page 13
LTC1473
U
TYPICAL APPLICATIONS
Complete Front End Including Battery Charger and DC/DC Converter with Automatic Switchover Between Battery and DCIN
74C00
7
3
12
R8
R6
900k
130k
427k 1%
1%
R9
R7
113k 1%
1%
*SUMIDA CDRH125-10 **COILCRAFT 1812LS-105XKBC ***COILTRONICS CTX20-4
+
4700pF
C
TIMER
EXTV
DCIN
C2, 0.1µF
TG
BOOST
SW
V
IN
INTV
CC
BG
PGND
CC
1µF
D4 MBRD340
R12 3k 1%
R13
5.1k 1%
+
16 15 14 13 12 11 10 9
V
OUT
MMBD2838LT1
C7
R
SENSE
0.033
R14 510
C10 1µF
C16 220pF
C17 10µF
1µF
Q1
Si4412DY
C4
D1
C3
4.7µF 16V
SENSE
L2**
1mH
D5 MBRD340
0.1µF
Q2
Si4412DY
1
IN1
2
IN2
3
DIODE
4
TIMER
5
V
6
V
7
SW
8
GND
C11
0.47µF
D6 MBR0540T
R18, 200Ω, 1%
R20 395k
0.1% R21
164k
0.1%
CMDSH-3
+
C8
2,3 L3***
20µH
1,4
R
0.033
C
OSC
57pF
1
C
CSS, 0.1µF
R
, 10k
C
, 51pF
C
C2
C1
100pF
6
5
4
1
OUT A
2
V
LTC1442
3
IN+ A
4
B
IN
OUT B
REF
HYST
1000pF
13
12
10
9
V
C
330pF
C5
14
D3
6.8V
8
7
+
6
5
OSC
2
RUN/SS
3
I
TH
4
SFB
C
11
R10 50k 1%
R11 1132k 1%
8
500k
5 6 7
8
R5
BATTERY
SGND V
OSENSE
SENSE SENSE
8.4V
Li-Ion
LTC1735
C9
0.1µF
+
GG
+
D2 MBRS140T3
LTC1473
1
GND
2
SW
3
BOOST
4
GND
5
GND
6
UV
7
GND
8
OVP
9
CLP
10
CLN
11
COMP1
12
SENSE
L1*
10µH
C
IN
22µF 35V × 2
SAB1
SENSE
SENSE
SAB2
LT
GA1
GB1
GA2
GB2
R
SENSE
0.015
C
OUT
+
R15 1k
R19 200 1%
R1 105k 1%
C15
0.33µF
100µF
10V
× 3
SGND
Si9926DY
16
15
14
13
+
12
11
10
9
Si9926DY
24
GND
23
GND
22
V
CC1
21
V
CC2
20
V
CC3
19
PROG
®
1511
18
V
C
17
UVOUT
16
GND
15
COMP2
14
BAT
13
SPIN
1473 TA03
C12 10µF
C13 10µF
R
SENSE
0.033
R16 300
C14 1µF
20k 1%
R2
C6 100pF
V
OUT
5V/3.5A
R17
4.93k
13
Page 14
LTC1473
TYPICAL APPLICATION
5V
SUPPLY V1
10k
1M
1
5
+
6
1M
SUPPLY V2
1M
8
3
+
2
4
1M
10k
*1812LS-105XKBC, COILCRAFT
U
Protected Automatic Switchover Between Two Supplies
18
LT1121-5
3
1µF
LT1490
7
C6 4700pF
D1
MMBD2838LT1
+
C7 1µF
+
C5 1µF
L1*, 1mH
1
2
3
4
5
6
7 8
IN1
IN2
DIODE
TIMER
+
V
V
GG
SW
GND
LTC1473
SENSE
SENSE
GA1
SAB1
GB1
GA2
SAB2
GB2
Q1
Si9926DY
16
15
14
13
+
12
11
10
9
Q2
Si9926DY
R3
0.033
1473 TA04
OUT
14
Page 15
PACKAGE DESCRIPTION
U
Dimensions in inches (millimeters) unless otherwise noted.
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.189 – 0.196* (4.801 – 4.978)
16
15
14
12 11 10
13
LTC1473
0.009
(0.229)
9
REF
0.015
± 0.004
(0.38 ± 0.10)
0.007 – 0.0098 (0.178 – 0.249)
0.016 – 0.050
(0.406 – 1.270)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0° – 8° TYP
× 45°
0.229 – 0.244
(5.817 – 6.198)
0.053 – 0.068
(1.351 – 1.727)
0.008 – 0.012
(0.203 – 0.305)
12
0.150 – 0.157** (3.810 – 3.988)
5
4
3
678
0.0250
(0.635)
BSC
0.004 – 0.0098 (0.102 – 0.249)
GN16 (SSOP) 1098
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
Page 16
LTC1473
TYPICAL APPLICATIONS
U
OTHER 5V
LOGIC
SUPPLY
SUPPLY V1
SUPPLY V2
12V
5V
*1812LS-105XKBC, COILCRAFT
100k
100k
Protected Hot SwapTM Switchover Between Two Supplies
D1
MMBD2838LT1
C6 4700pF
C7 1µF
C5 1µF
L1*, 1mH
1
2
3
4
5
6
7 8
IN1
IN2
DIODE
TIMER
+
V
V
GG
SW
GND
LTC1473
GA1
SAB1
GB1
SENSE
SENSE
GA2
SAB2
GB2
16
15
14
13
+
12
11
10
9
Q1
Si4936DY
Q2
Si4936DY
LONG PIN
R3
0.1
LONG PIN
SHORT PIN
DOCKING
CONNECTOR
5V
OUT
ON
1473 • TA05
Hot Swap is a trademark of Linear Technology Corporation.
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LTC1155 Dual High Side Micropower MOSFET Driver Internal Charge Pump Requires No External Components LTC1161 Quad Protected High Side MOSFET Driver Rugged, Designed for Harsh Environment LTC1473L Dual PowerPath Switch Driver Low Voltage Version of the LTC1473; Operates with 3.3V Input LTC1479 PowerPath Controller for Dual Battery Systems Designed to Interface with a Power Management µP LT1505 Synchronous Constant-Voltage/Constant-Current Up to 6A Charge Current; High Efficiency; Adaptive Current Limiting
Battery Charger LT1510 Constant-Voltage/Constant-Current Battery Charger Up to 1.5A Charge Current for Lithium-Ion, NiCd and NiMH Batteries LT1511 3A Constant-Voltage/Constant-Current Battery Charger High Efficiency, Minimal External Components to Fast Charge
Lithium, NiMH and NiCd Batteries
LTC1628 2-Phase Dual Synchronous Step-Down Controller Minimum Input Capacitors; 4.5V VIN 36V LTC1735 High Efficiency Synchronous Switching Regulator Constant Frequency, VIN 36V, Fault Protection
1473fa LT/TP 0400 REV A 2K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1997
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
www.linear-tech.com
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