Drivers and Receivers Will Withstand Repeated
±10kV ESD Pulses
■
10Mbaud Transmission Rate
■
Meets CCITT V.35 Specification
■
Operates from ±5V Supplies
■
Shutdown Mode Reduces ICC to Below 1µA
■
Selectable Transmitter and Receiver Configurations
■
Independent Driver/Receiver Enables
■
Transmitter Maintains High Impedance When
Disabled, Shut Down or with Power Off
■
Transmitters Are Short-Circuit Protected
U
O
PPLICATI
A
■
Modems
■
Telecommunications
■
Data Routers
S
DUESCRIPTIO
The LTC®1346A is a single chip transceiver that provides
the differential clock and data signals for a V.35 interface
from ±5V supplies. Combined with an external resistor
termination network and an LT®1134A RS232 transceiver
for the control signals, the LTC1346A forms a complete low
power DTE or DCE V.35 interface port.
The LTC1346A features three current output differential
transmitters and three differential receivers. The transceiver can be configured for DTE or DCE operation or
shutdown using three Select pins. In the shutdown mode,
the supply current is reduced to below 1µA.
The LTC1346A transceiver operates up to 10Mbaud. All
transmitters feature short-circuit protection. Both the transmitter outputs and the receiver outputs can be forced into
a high impedance state. The transmitter outputs and receiver inputs feature ±10kV ESD protection.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Note 2: All currents into device pins are positive; all currents out of device
pins are termed negative. All voltages are referenced to device ground
unless otherwise specified.
Note 3: Receiver enable to output valid high or low from shutdown is
typically 2µs.
000—1, 2, 3All RX ON, All DX OFF
100——All OFF, Shutdown
0101, 2, 31, 2DCE Mode
1101, 2, 3—DCE Mode, All RX OFF
0011, 21, 2, 3DTE Mode
1011, 2—DTE Mode, All RX OFF
0111, 2, 31, 2, 3All ON
1111, 2, 3—All DX ON, All RX OFF
Receiver
CONFIGURATION S0 S1 S2A – BR1 AND R2R3
All Rx ON000≤ – 0.2V00
All Rx ON 000≥0.2V11
Shutdown100XZZ
DCE010≤ –0.2V0Z
DCE010≥0.2V1Z
Disabled110XZZ
DTE or All ON0X1≤ – 0.2V00
DTE or All ON0X1≥0.2V11
Disabled1X1XZZ
Transmitter
INPUTS OUTPUTS
CONFIGURATION S0 S1 S2 T Y1 AND Y2 Z1 AND Z2 Y3 Z3
All OFF000XZZZZ
Shutdown100XZZZZ
DCE or All ONX1X00101
DCE or All ONX1X11010
DTEX01001ZZ
DTEX01110ZZ
INPUTS OUTPUTS
TEST CIRCUITS
Y
Y
T
Z
50Ω
125Ω
V
OD
50Ω
Z
V
OS
VOC = (VY + VZ)/2
125Ω
50Ω
50Ω
A
R
B
15pFS0
LTC1346A • F01
Figure 1. V.35 Transmitter/Receiver Test Circuit
V
CC
SW1
RECEIVER
OUTPUT
1k
C
L
SW2
LTC1346A • F02
Figure 2. Receiver Output Enable and Disable Timing Test Load
5
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LTC1346A
UW
W
SWITCHI G TI E WAVEFOR S
A – B
Y – Z
VOD/2
–VOD/2
V
R
V
3V
T
0V
V
O
–V
O
Z
V
Y
O
Figure 3. V.35 Transmitter Propagation Delays
0V
OH
OL
1.5V
t
PLH
50%
10%
f = 1MHz: t
t
PLH
f = 1MHz: t
90%
t
r
t
SKEW
≤ 10ns: tf ≤ 10ns
r
1.5V
≤ 10ns: tf ≤ 10ns
r
V
= V(Y) – V(Z)
DIFF
1/2 V
O
INPUT
OUTPUT
1.5V
0V
t
PHL
90%
t
PHL
50%
10%
t
f
t
LTC1346A • F03
SKEW
1.5V
LTC1346A • F04
Figure 4. V.35 Receiver Propagation Delays
3V
S0
0V
5V
R
V
OL
V
OH
R
0V
1.5V
f = 1MHz: t
t
ZL
1.5V
t
ZH
1.5V
≤ 10ns: tf ≤ 10ns
r
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
1.5V
t
t
LZ
0.5V
HZ
0.5V
LTC1346A • F05
Figure 5. Receiver Enable and Disable Times
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LTC1346A
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APPLICATIONS INFORMATION
Review of CCITT Recommendation V.35
Electrical Specifications
V.35 is a CCITT recommendation for synchronous data
transmission via modems. Appendix 2 of the recommendation describes the electrical specifications which are
summarized below:
1. The interface cable is a balanced twisted pair with 80Ω
to 120Ω impedance.
2. The transmitter’s source impedance is between 50Ω
and 150Ω.
3. The transmitter’s resistance between shorted terminals and ground is 150Ω±15Ω.
4. When terminated by a 100Ω resistive load, the terminal-to-terminal voltage should be 0.55V ±20%.
5. The transmitter’s rise time should be less than 1% of
the signal pulse or 40ns, whichever is greater.
6. The common mode voltage at the transmitter output
should not exceed 0.6V.
10. No data errors should occur with ±2V common
mode change at either the transmitter/receiver or
± 4V ground potential difference between transmitter and receiver.
Cable Termination
Each end of the cable connected to an LTC1346A must be
terminated by an external Y- or ∆-resistor network for
proper operation. The Y-termination has two series connected 50Ω resistors and a 125Ω resistor connected
between ground and the center tap of the two 50Ω resistors
as shown in Figure 6.
The alternative ∆-termination has a 120Ω resistor across
the twisted wires and two 300Ω resistors between each
wire and ground. Standard 1/8W, 5% surface mount
resistors can be used for the termination network. To
maintain the proper differential output swing, the resistor
tolerance must be 5% or better. A termination network
that combines all the resistors into an SO-14 package is
available from:
7. The receiver impedance is 100Ω±10Ω.
8. The receiver impedance to ground is 150Ω±15Ω.
9. The transmitter or receiver should not be damaged
by connection to earth ground, short-circuiting or
cross connection to other lines.
50Ω
50Ω
120Ω
Y
∆
BI Technologies (Formerly Beckman Industrial)
Resistor Networks
4200 Bonita Place
Fullerton, CA 92635
Phone: (714) 447-2357
FAX: (714) 447-2500
Part #: BI Technologies 627T500/1250 (SOIC)
899TR50/125 (DIP)
125Ω
300Ω
300Ω
LTC1346A • F06
Figure 6. Y- and ∆-Termination Networks
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LTC1346A
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APPLICATIONS INFORMATION
T
Figure 7. Simplified Transmitter Schematic
V
CC
V
EE
BOUNDARY
11mA
11mA
CHIP
Y
50Ω
125Ω
50Ω
Z
LTC1346A • F07
Theory of Operation
The transmitter outputs consist of complementary
switched-current sources as shown in Figure 7.
With a logic zero at the transmitter input, the inverting
output Z sources 11mA and the noninverting output Y
sinks 11mA. The differential transmitter output voltage is
then set by the termination resistors. With two differential
50Ω resistors at each end of the cable, the voltage is set to
(50Ω)(11mA) = 0.55V. With a logic 1 at the transmitter
input, output Z sinks 11mA and Y sources 11mA. The
common mode voltage of Y and Z is 0V when both current
sources are matched and there is no ground potential
difference between the cable terminations. The transmitter
current sources have a common mode range of ±2V, which
allows for a ground difference between cable terminations
of ±4V.
Each receiver input has a 30k resistance to ground and
requires external termination to meet the V.35 input impedance specification. The receivers have an input hysteresis
of 50mV to improve noise immunity.
Three Select pins, S0, S1 and S2, configure the chip as
described in Function Tables. When the transmitters and
receivers are OFF, all outputs are forced into high impedance. The S0 pin can be used as receiver output enable.
In shutdown mode, ICC drops to 1µA with all transmitters
and receivers OFF. When the LTC1346A is enabled from
shutdown the transmitters and receivers require 2µs to
stabilize.
Complete V.35 Port
Figure 8 shows the schematic of a complete surface
mounted, ±5V DTE and DCE V.35 port using only three ICs
and six capacitors per port. The LTC1346A is used to
transmit the clock and data signals and the LT1134A to
transmit the control signals. If test signals 140, 141 and
142 are not used, the transmitter inputs should be tied
to VCC.
RS422/RS485 Applications
The receivers on the LTC1346A can be used for RS422
and RS485 applications. Using the test circuit in Figure 9,
the LTC1346A receivers are able to successfully extract
the data stream from the common mode voltage, meeting
RS422 and RS485 requirements as shown in Figures 10
and 11.
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LTC1346A
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APPLICATIONS INFORMATION
DTEDCE
V
5V
CC1
0.1µF
LTC1346ALTC1346A
4
DX
5
DX
9
10
11
RX
RX
RX
8
12
V
CC1
1µF
1µF1µF1µF
+
+
V
EE1
–5V
12
0.1µF
24
23
22
21
18
17
16
15
14
13
3
7
14
13
12
11
10
1
2
3
4
9
7
BI
627T500/
1250
(SOIC)
T
T
T
T
T
8
50Ω
50Ω
TXD (103)
TXC (114)
RXC (115)
GND (102)
125Ω
V
EE2
–5V
BI
627T500/
1250
(SOIC)
P
S
U
W
AA
Y
X
V
T
R
12P
T
11
10
T
9
1
T
2
3
T
4
5
T
6
7
8
=
T
S
SCTE (113)
U
W
AA
Y
X
V
RXD (104)
T
R
BB
CABLE SHIELD
AA
0.1µF
V
CC2
5V
21
0.1µF
16
10
11
4
5
6
+
V
CC2
RX
RX
DX
DX
DX
8127
15
14
13
24
23
22
21
20
19
3
+
+
1µF
2
21
19
20
18
16
14
17
15
OPTIONAL SIGNALS
4
3 22
23
241
LT1134ALT1134A
DX
DX
RX
RX
RX
RX
DX
DX
13
1µF
+
DTR (108)
5
7
6
8
10
12
9
11
INTERFACE CONNECTOR
HH
RTS (105)
CC
DSR (107)
EE
CTS (106)
DD
DCD (109)
FF
NNNN
NN
LL
ISO 2593
34-PIN DTE/DCE
TM (142)
RDL (140)
LLB (141)
ISO 2593
34-PIN DTE/DCE
INTERFACE CONNECTOR
+
1µF
4322
6
8
5
7
9
11
10
12
RX
RX
RX
RX
DX
DX
DX
DX
23
241
1µF
+
20
18
21
19
17
15
16
14
13
LTC1346A • TA08
Figure 8. Complete Single ±5V V.35 Interface
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LTC1346A
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APPLICATIONS INFORMATION
V
CC1
5V
AA
LTC485
B
GND
TTL
IN
Figure 9. RS422/RS485 Receiver Interface
RECEIVER
OUTPUT
5V/DIV
RECEIVER
INPUT
5V/DIV
B
A
100Ω100Ω
+
–
7V TO –7V
GND POTENTIAL DIFFERENCE
5V
0V
0V
–5V
–10V
RECEIVER
INPUT
5V/DIV
RECEIVER
OUTPUT
5V/DIV
A
B
V
CC2
5V
TTL
GND
V
EE
–5V
LTC1346A • F09
OUT
LTC1346A
B
15V
10V
5V
0V
5V
0V
LTC1346 • F10
Figure 10. –7V Common Mode
Multiprotocol Application
The LTC1346A can be used in multiprotocol applications
where V.35, RS232 and RS422 (used in RS530, RS449
among others) signals may appear at the same port. The
LTC1346A switched current source driver is not compatible with RS232 or RS422. However, the outputs when
disabled can share lines with RS232 drivers with a shutdown feature such as the LT1030 and RS422 drivers with
a disable feature such as the LTC486/LTC487 (Figure 12a).
LTC1346 • F11
Figure 11. 12V Common Mode
The LTC1346A driver will not be damaged or load the
shared lines when disabled. The LTC1346A receiver can
receive V.35, RS232 and RS422 signals as shown in Figure
12b. The LTC1346A receiver is directly compatible with
V.35 and RS422. For RS232 signal, the noninverting input
of the receiver should be grounded. Because the line
termination for each of the protocols is different, some
form of termination switching should be included, either
the connector (as shown in Figures 12a and 12b) or on the
PCB.
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LTC1346A
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APPLICATIONS INFORMATION
LT1030
LTC487
LT1346A
LOGIC
INPUT
V.35 DIFFERENTIAL
CONNECTION WITH
TERMINATION
50Ω
125Ω
CONNECTOR
50Ω
RS422
DIFFERENTIAL
CONNECTION
RS232
CONNECTION
NO CONNECTION
1346A F12a
LOGIC
OUTPUT
LT1346A
Figure 12a. Multiprotocol Transmitter
V.35 DIFFERENTIAL
CONNECTION WITH
TERMINATION
50Ω
125Ω
CONNECTOR
50Ω
Figure 12b. Multiprotocol Receiver
RS422 DIFFERENTIAL
CONNECTION WITH
TERMINATION
100Ω5k
RS232
CONNECTION WITH
TERMINATION
1346A F12b
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
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LTC1346A
PACKAGE DESCRIPTION
U
Dimensions in inches (millimeters) unless otherwise noted.
SW Package
24-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)
0.598 – 0.614*
(15.190 – 15.600)
22 21 20 19 18
2324
NOTE 1
0.291 – 0.299**
(7.391 – 7.595)
0.010 – 0.029
(0.254 – 0.737)
0.009 – 0.013
(0.229 – 0.330)
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS.
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
*
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE