Datasheet LTC1346A Datasheet (Linear Technology)

Page 1
LTC1346A
10Mbps DCE/DTE
V.35 Transceiver
EATU
F
Single Chip Provides Complete Differential Signal
RE
S
Interface for V.35 Port
Drivers and Receivers Will Withstand Repeated ±10kV ESD Pulses
10Mbaud Transmission Rate
Meets CCITT V.35 Specification
Operates from ±5V Supplies
Shutdown Mode Reduces ICC to Below 1µA
Selectable Transmitter and Receiver Configurations
Independent Driver/Receiver Enables
Transmitter Maintains High Impedance When Disabled, Shut Down or with Power Off
Transmitters Are Short-Circuit Protected
U
O
PPLICATI
A
Modems
Telecommunications
Data Routers
S
DUESCRIPTIO
The LTC®1346A is a single chip transceiver that provides the differential clock and data signals for a V.35 interface from ±5V supplies. Combined with an external resistor termination network and an LT®1134A RS232 transceiver for the control signals, the LTC1346A forms a complete low power DTE or DCE V.35 interface port.
The LTC1346A features three current output differential transmitters and three differential receivers. The trans­ceiver can be configured for DTE or DCE operation or shutdown using three Select pins. In the shutdown mode, the supply current is reduced to below 1µA.
The LTC1346A transceiver operates up to 10Mbaud. All transmitters feature short-circuit protection. Both the trans­mitter outputs and the receiver outputs can be forced into a high impedance state. The transmitter outputs and re­ceiver inputs feature ±10kV ESD protection.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATION
V
EE1
–5V
0.1µF
+
V
CC1
5V
1
2
0.1µF
+
V
CC1
LTC1346A LTC1346ABI
4
DX
5
DX
9
10
11
7
8
RX
RX
RX
12
DTE DCE
24
23 22
21 18
17 16
15 14
13
3
U
Clock and Data Signals for V.35 Interface
627T500/1250
1
T
2 3
T T
4
14
T T
13 12
T T
11 10
T T
9
78
TXD (103)
SCTE (113)
TXC (114)
RXC (115)
RXD (104)
GND (102)
627T500/1250
1
BI
12
T
111615 10
91413 1
22423 3
42221 5
62019
78
RX
RX
DX
DX
DX
3
12
2
10
11
4
5
6
7
8
V 5V
+
0.1µF
T
V
CC2
BI TECHNOLOGIES
627T500/1250 (SOIC)
CC2
50
=
50
0.1µF
+
125
LTC1346 • TA01
V –5V
EE2
1
Page 2
LTC1346A
1 2 3 4 5 6 7 8
9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
V
EE
V
CC
GND
T1 T2
T3 S1 S2 R3 R2 R1 S0
Y1 Z1 Y2 Z2 Y3 Z3 A3 B3 A2 B2 A1 B1
SW PACKAGE
24-LEAD PLASTIC SO WIDE
TOP VIEW
A
W
O
LUTEXI T
S
A
WUW
ARB
U G
I
S
(Note 1)
Supply Voltage
VCC.................................................................... 6.5V
VEE................................................................... –6.5V
Input Voltage
Transmitters ........................... –0.3V to (VCC + 0.3V)
Receivers............................................... –18V to 18V
S0, S1, S2 ............................... –0.3V to (VCC + 0.3V)
Output Voltage
Transmitters .......................................... –18V to 18V
Receivers................................ –0.3V to (VCC + 0.3V)
Short-Circuit Duration
Transmitter Output ..................................... Indefinite
Receiver Output .......................................... Indefinite
Operating Temperature Range
LTC1346AC ............................................ 0°C to 70°C
LTC1346AI ........................................ – 40°C to 85°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
/
= 150°C, θ
O
RDER I FOR ATIO
= 85°C/W
JA
PACKAGE
T
JMAX
Consult factory for Military grade parts.
WU
ORDER PART
NUMBER
LTC1346ACSW LTC1346AISW
U
DC ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OD
V
OC
I
OH
I
OL
I
OZ
R
O
V
TH
V I
IN
R
IN
V
OH
V
OL
I
OSR
I
OZR
V
IH
V
IL
I
IN
2
VCC = 5V ±5%, VEE = –5V ±5% (Note 2)
Transmitter Differential Output Voltage –4V VOS 4V (Figure 1) 0.44 0.55 0.66 V Transmitter Common Mode Output Voltage VOS = 0V (Figure 1) –0.6 0 0.6 V Transmitter Output High Current V Transmitter Output Low Current V Transmitter Output Leakage Current –5V V
Transmitter Output Impedance –2V V Differential Receiver Input Threshold Voltage –7V (VA + VB)/2 12V 25 200 mV Receiver Input Hysterisis –7V (VA + VB)/2 12V 50 mV
TH
Receiver Input Current (A, B) – 7V V Receiver Input Impedance –7V V Receiver Output High Voltage IO = 4mA, V Receiver Output Low Voltage IO = 4mA, V Receiver Output Short-Circuit Current 0V VO V Receiver Three-State Output Current S0 = VCC, 0V VO V Logic Input High Voltage T, S0, S1, S2 2V Logic Input Low Voltage T, S0, S1, S2 0.8 V Logic Input Current T, S0, S1, S2 ±10 µA
= 0V – 12.6 –11 – 9.4 mA
Y, Z
= 0V 9.4 11 12.6 mA
Y, Z
5V, S1 = S2 = 0V ±1 ±20 µA
Y, Z
2V 100 k
Y, Z
12V 0.7 mA
A, B
12V 17.5 30 k
A, B
= 0.2V 3 4.5 V
A, B
= –0.2V 0.2 0.4 V
A, B
CC
CC
±100 µA
74085 mA
±10 µA
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LTC1346A
TEMPERATURE (˚C)
–50
TIME (ns)
25
1346A G03
10
5
–25 0 50
0
20
15
75 100 125
VCC = 5V V
EE
= –5V
AC ELECTRICAL CHARACTERISTICS
VCC = 5V ±5%, VEE = –5V ±5% (Note 2)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I
CC
VCC Supply Current VOS = 0V, S0 = Low, S1 = S2 = High (Figure 1) 40 50 mA
No Load, S0 = Low, S1 = S2 = High 6 9 mA Shutdown, S0 = VCC, S1 = S2 = 0V 0.1 100 µA
I
EE
VEE Supply Current VOS = 0V, S0 = Low, S1 = S2 = High (Figure 1) –40 –50 mA
No Load, S0 = Low, S1 = S2 = High –6 –9 mA
Shutdown, S0 = VCC, S1 = S2 = 0V –0.1 –100 µA tr, t t
PLH
t
PHL
t
SKEW
t
PLH
t
PHL
t
SKEW
t
ZL
Transmitter Rise or Fall Time VOS = 0V (Figures 1, 3) 740 ns
f
Transmitter Input to Output VOS = 0V (Figures 1, 3) 25 70 ns Transmitter Input to Output VOS = 0V (Figures 1, 3) 30 70 ns Transmitter Output to Output VOS = 0V (Figures 1, 3) 5 ns Receiver Input to Output VOS = 0V (Figures 1, 4) 50 100 ns Receiver Input to Output VOS = 0V (Figures 1, 4) 55 100 ns Differential Receiver Skew, t
PLH
– t
V
PHL
= 0V (Figures 1, 4) 5 ns
OS
Receiver Enable to Output Low (Active Mode) CL = 15pF, SW1 Closed (Figures 2, 5) 40 70 ns Receiver Enable to Output Low CL = 15pF, SW1 Closed (Figures 2, 5) 2 µs
(from Shutdown, Note 3)
t
ZH
Receiver Enable to Output High (Active Mode) CL = 15pF, SW2 Closed (Figures 2, 5) 35 70 ns Receiver Enable to Output High CL = 15pF, SW2 Closed (Figures 2, 5) 2 µs
(from Shutdown, Note 3)
t
LZ
t
HZ
The denotes specifications which apply over the full operating temperature range.
Note 1: The Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
Receiver Disable from Low CL = 15pF, SW1 Closed (Figures 2, 5) 30 70 ns Receiver Disable from High CL = 15pF, SW2 Closed (Figures 2, 5) 35 70 ns
Note 2: All currents into device pins are positive; all currents out of device pins are termed negative. All voltages are referenced to device ground unless otherwise specified.
Note 3: Receiver enable to output valid high or low from shutdown is typically 2µs.
UW
TYPICAL PERFORMANCE CHARACTERISTICS
Transmitter Output Current vs Temperature
13
VCC = 5V
= –5V
V
EE
12
11
10
OUTPUT CURRENT (mA)
9
–25 0 50
–50
25
TEMPERATURE (˚C)
75 100 125
1346A G01
Transmitter Output Current vs Output Voltage
13
TA = 25°C
= 5V
V
CC
= –5V
V
EE
12
11
10
OUTPUT CURRENT (mA)
9
–2.0
–1.5
–1.0
–0.5
OUTPUT VOLTAGE (V)
0
0.5
1.0
1.5
1346A G02
Transmitter Output Skew vs Temperature
2.0
3
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LTC1346A
UW
TYPICAL PERFORMANCE CHARACTERISTICS
Receiver t
PLH
– t
PHL
vs Temperature ICC Supply Current vs Temperature
20
15
10
TIME (ns)
5
0
–50
VCC = 5V
= –5V
V
EE
–25 0 50
25
TEMPERATURE (˚C)
75 100 125
1346A G04
45
40
35
CURRENT (mA)
30
25
–25 0 50
–50
LOADED
NO LOAD
25
TEMPERATURE (˚C)
Receiver Output WaveformsTransmitter Output Waveforms
INPUT
5V/DIV
OUTPUT
0.2V/DIV
INPUT
0.2V/DIV
OUTPUT
5V/DIV
VCC = 5V
= –5V
V
EE
75 100 125
1346A G05
7.5
7.0
CURRENT (mA)
6.5
6.0
5.5
IEE Supply Current vs Temperature
–25
VCC = 5V
= –5V
V
EE
–30
NO LOAD
–35
CURRENT (mA)
–40
–45
LOADED
–25 0 50
–50
25
TEMPERATURE (˚C)
75 100 125
Receiver Enable from Shutdown
INPUT A–B
1V/DIV
INPUT S0
5V/DIV
OUTPUT
5V/DIV
–5.0
–5.5
CURRENT (mA)
–6.0
–6.5
–7.0
1346A G06
1346A G07 1346A G08 1346A G09
UUU
PIN FUNCTIONS
VEE (Pin 1): V
(Pin 2): Positive Supply, 4.75V VCC 5.25V
CC
GND (Pin 3): Ground T1 (Pin 4): Transmitter 1 Input, TTL Compatible T2 (Pin 5): Transmitter 2 Input, TTL Compatible T3 (Pin 6): Transmitter 3 Input, TTL Compatible S1 (Pin 7): Select Input 1, TTL Compatible S2 (Pin 8): Select Input 2, TTL Compatible R3 (Pin 9): Receiver 3 Output, TTL Compatible R2 (Pin 10): Receiver 2 Output, TTL Compatible R1 (Pin 11): Receiver 1 Output, TTL Compatible S0 (Pin 12): Select Input 0, TTL Compatible
Negative Supply, –4.75V VEE –5.25V
B1 (Pin 13): Receiver 1 Inverting Input A1 (Pin 14): Receiver 1 Noninverting Input B2 (Pin 15): Receiver 2 Inverting Input A2 (Pin 16): Receiver 2 Noninverting Input B3 (Pin 17): Receiver 3 Inverting Input A3 (Pin 18): Receiver 3 Noninverting Input Z3 (Pin 19): Transmitter 3 Inverting Output Y3 (Pin 20): Transmitter 3 Noninverting Output Z2 (Pin 21): Transmitter 2 Inverting Output Y2 (Pin 22): Transmitter 2 Noninverting Output Z1 (Pin 23): Transmitter 1 Inverting Output Y1 (Pin 24): Transmitter 1 Noninverting Output
4
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LTC1346A
U
U
FU CTIO TABLES
Transmitter and Receiver Configuration
S0 S1 S2 DX ON RX ON Description
0 0 0 1, 2, 3 All RX ON, All DX OFF 1 0 0 All OFF, Shutdown 0 1 0 1, 2, 3 1, 2 DCE Mode 1 1 0 1, 2, 3 DCE Mode, All RX OFF 0 0 1 1, 2 1, 2, 3 DTE Mode 1 0 1 1, 2 DTE Mode, All RX OFF 0 1 1 1, 2, 3 1, 2, 3 All ON 1 1 1 1, 2, 3 All DX ON, All RX OFF
Receiver
CONFIGURATION S0 S1 S2 A – B R1 AND R2 R3
All Rx ON 0 0 0 – 0.2V 0 0 All Rx ON 0 0 0 0.2V 1 1 Shutdown 1 0 0 X Z Z DCE 0 1 0 –0.2V 0 Z DCE 0 1 0 0.2V 1 Z Disabled 1 1 0 X Z Z DTE or All ON 0 X 1 – 0.2V 0 0 DTE or All ON 0 X 1 0.2V 1 1 Disabled 1 X 1 X Z Z
Transmitter
INPUTS OUTPUTS
CONFIGURATION S0 S1 S2 T Y1 AND Y2 Z1 AND Z2 Y3 Z3
All OFF 0 0 0 X Z Z Z Z Shutdown 1 0 0 X Z Z Z Z DCE or All ON X 1 X 0 0 1 0 1 DCE or All ON X 1 X 1 1 0 1 0 DTE X 0 1 0 0 1 Z Z DTE X 0 1 1 1 0 Z Z
INPUTS OUTPUTS
TEST CIRCUITS
Y
Y
T
Z
50
125
V
OD
50
Z
V
OS
VOC = (VY + VZ)/2
125
50
50
A
R
B
15pFS0
LTC1346A • F01
Figure 1. V.35 Transmitter/Receiver Test Circuit
V
CC
SW1
RECEIVER
OUTPUT
1k
C
L
SW2
LTC1346A • F02
Figure 2. Receiver Output Enable and Disable Timing Test Load
5
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LTC1346A
UW
W
SWITCHI G TI E WAVEFOR S
A – B
Y – Z
VOD/2
–VOD/2
V
R
V
3V
T
0V
V
O
–V
O
Z
V
Y
O
Figure 3. V.35 Transmitter Propagation Delays
0V
OH
OL
1.5V
t
PLH
50%
10%
f = 1MHz: t
t
PLH
f = 1MHz: t
90%
t
r
t
SKEW
10ns: tf 10ns
r
1.5V
10ns: tf 10ns
r
V
= V(Y) – V(Z)
DIFF
1/2 V
O
INPUT
OUTPUT
1.5V
0V
t
PHL
90%
t
PHL
50%
10%
t
f
t
LTC1346A • F03
SKEW
1.5V
LTC1346A • F04
Figure 4. V.35 Receiver Propagation Delays
3V
S0
0V
5V
R
V
OL
V
OH
R
0V
1.5V f = 1MHz: t
t
ZL
1.5V
t
ZH
1.5V
10ns: tf 10ns
r
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
1.5V
t
t
LZ
0.5V
HZ
0.5V
LTC1346A • F05
Figure 5. Receiver Enable and Disable Times
6
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LTC1346A
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APPLICATIONS INFORMATION
Review of CCITT Recommendation V.35 Electrical Specifications
V.35 is a CCITT recommendation for synchronous data transmission via modems. Appendix 2 of the recommen­dation describes the electrical specifications which are summarized below:
1. The interface cable is a balanced twisted pair with 80 to 120 impedance.
2. The transmitter’s source impedance is between 50 and 150.
3. The transmitter’s resistance between shorted termi­nals and ground is 150 ±15.
4. When terminated by a 100 resistive load, the termi­nal-to-terminal voltage should be 0.55V ±20%.
5. The transmitter’s rise time should be less than 1% of the signal pulse or 40ns, whichever is greater.
6. The common mode voltage at the transmitter output should not exceed 0.6V.
10. No data errors should occur with ±2V common
mode change at either the transmitter/receiver or ± 4V ground potential difference between transmit­ter and receiver.
Cable Termination
Each end of the cable connected to an LTC1346A must be terminated by an external Y- or -resistor network for proper operation. The Y-termination has two series con­nected 50 resistors and a 125 resistor connected between ground and the center tap of the two 50 resistors as shown in Figure 6.
The alternative -termination has a 120 resistor across the twisted wires and two 300 resistors between each wire and ground. Standard 1/8W, 5% surface mount resistors can be used for the termination network. To maintain the proper differential output swing, the resistor tolerance must be 5% or better. A termination network that combines all the resistors into an SO-14 package is available from:
7. The receiver impedance is 100 ±10.
8. The receiver impedance to ground is 150 ±15.
9. The transmitter or receiver should not be damaged by connection to earth ground, short-circuiting or cross connection to other lines.
50
50
120
Y
BI Technologies (Formerly Beckman Industrial) Resistor Networks 4200 Bonita Place Fullerton, CA 92635 Phone: (714) 447-2357 FAX: (714) 447-2500 Part #: BI Technologies 627T500/1250 (SOIC) 899TR50/125 (DIP)
125
300
300
LTC1346A • F06
Figure 6. Y- and -Termination Networks
7
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LTC1346A
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APPLICATIONS INFORMATION
T
Figure 7. Simplified Transmitter Schematic
V
CC
V
EE
BOUNDARY
11mA
11mA
CHIP
Y
50
125
50
Z
LTC1346A • F07
Theory of Operation
The transmitter outputs consist of complementary switched-current sources as shown in Figure 7.
With a logic zero at the transmitter input, the inverting output Z sources 11mA and the noninverting output Y sinks 11mA. The differential transmitter output voltage is then set by the termination resistors. With two differential 50 resistors at each end of the cable, the voltage is set to (50)(11mA) = 0.55V. With a logic 1 at the transmitter input, output Z sinks 11mA and Y sources 11mA. The common mode voltage of Y and Z is 0V when both current sources are matched and there is no ground potential difference between the cable terminations. The transmitter current sources have a common mode range of ±2V, which allows for a ground difference between cable terminations of ±4V.
Each receiver input has a 30k resistance to ground and requires external termination to meet the V.35 input imped­ance specification. The receivers have an input hysteresis of 50mV to improve noise immunity.
Three Select pins, S0, S1 and S2, configure the chip as described in Function Tables. When the transmitters and
receivers are OFF, all outputs are forced into high imped­ance. The S0 pin can be used as receiver output enable. In shutdown mode, ICC drops to 1µA with all transmitters and receivers OFF. When the LTC1346A is enabled from shutdown the transmitters and receivers require 2µs to stabilize.
Complete V.35 Port
Figure 8 shows the schematic of a complete surface mounted, ±5V DTE and DCE V.35 port using only three ICs and six capacitors per port. The LTC1346A is used to transmit the clock and data signals and the LT1134A to transmit the control signals. If test signals 140, 141 and 142 are not used, the transmitter inputs should be tied to VCC.
RS422/RS485 Applications
The receivers on the LTC1346A can be used for RS422 and RS485 applications. Using the test circuit in Figure 9, the LTC1346A receivers are able to successfully extract the data stream from the common mode voltage, meeting RS422 and RS485 requirements as shown in Figures 10 and 11.
8
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LTC1346A
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APPLICATIONS INFORMATION
DTE DCE
V
5V
CC1
0.1µF
LTC1346A LTC1346A
4
DX
5
DX
9
10
11
RX
RX
RX
8
12
V
CC1
1µF
1µF 1µF1µF
+
+
V
EE1
–5V
12
0.1µF
24
23 22
21 18
17 16
15 14
13 3
7
14
13 12
11 10
1
2 3
4
9 7
BI
627T500/
1250
(SOIC)
T
T
T
T
T
8
50
50
TXD (103)
TXC (114)
RXC (115)
GND (102)
125
V
EE2
–5V
BI
627T500/
1250
(SOIC)
P
S U
W
AA
Y X
V T
R
12P
T
11 10
T
9 1
T
2 3
T
4 5
T
6 7
8
=
T
S
SCTE (113)
U
W
AA
Y X
V
RXD (104)
T
R
BB
CABLE SHIELD
AA
0.1µF
V
CC2
5V
21
0.1µF
16
10
11
4
5
6
+
V
CC2
RX
RX
DX
DX
DX
8127
15 14
13 24
23 22
21 20
19
3
+
+
1µF
2
21
19
20
18
16
14
17
15
OPTIONAL SIGNALS
4
3 22
23
241
LT1134A LT1134A
DX
DX
RX
RX
RX
RX
DX
DX
13
1µF
+
DTR (108)
5
7
6
8
10
12
9
11
INTERFACE CONNECTOR
H H
RTS (105)
C C
DSR (107)
E E
CTS (106)
D D
DCD (109)
F F
NN NN
N N
L L
ISO 2593
34-PIN DTE/DCE
TM (142)
RDL (140)
LLB (141)
ISO 2593
34-PIN DTE/DCE
INTERFACE CONNECTOR
+
1µF
4322
6
8
5
7
9
11
10
12
RX
RX
RX
RX
DX
DX
DX
DX
23
241
1µF
+
20
18
21
19
17
15
16
14
13
LTC1346A • TA08
Figure 8. Complete Single ±5V V.35 Interface
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LTC1346A
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APPLICATIONS INFORMATION
V
CC1
5V
AA
LTC485
B
GND
TTL IN
Figure 9. RS422/RS485 Receiver Interface
RECEIVER
OUTPUT
5V/DIV
RECEIVER
INPUT
5V/DIV
B A
100 100
+
7V TO –7V
GND POTENTIAL DIFFERENCE
5V
0V
0V
–5V
–10V
RECEIVER
INPUT
5V/DIV
RECEIVER
OUTPUT
5V/DIV
A B
V
CC2
5V
TTL
GND
V
EE
–5V
LTC1346A • F09
OUT
LTC1346A
B
15V
10V
5V
0V
5V
0V
LTC1346 • F10
Figure 10. –7V Common Mode
Multiprotocol Application
The LTC1346A can be used in multiprotocol applications where V.35, RS232 and RS422 (used in RS530, RS449 among others) signals may appear at the same port. The LTC1346A switched current source driver is not compat­ible with RS232 or RS422. However, the outputs when disabled can share lines with RS232 drivers with a shut­down feature such as the LT1030 and RS422 drivers with a disable feature such as the LTC486/LTC487 (Figure 12a).
LTC1346 • F11
Figure 11. 12V Common Mode
The LTC1346A driver will not be damaged or load the shared lines when disabled. The LTC1346A receiver can receive V.35, RS232 and RS422 signals as shown in Figure 12b. The LTC1346A receiver is directly compatible with V.35 and RS422. For RS232 signal, the noninverting input of the receiver should be grounded. Because the line termination for each of the protocols is different, some form of termination switching should be included, either the connector (as shown in Figures 12a and 12b) or on the PCB.
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LTC1346A
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APPLICATIONS INFORMATION
LT1030
LTC487
LT1346A
LOGIC INPUT
V.35 DIFFERENTIAL CONNECTION WITH
TERMINATION
50
125
CONNECTOR
50
RS422
DIFFERENTIAL
CONNECTION
RS232
CONNECTION
NO CONNECTION
1346A F12a
LOGIC
OUTPUT
LT1346A
Figure 12a. Multiprotocol Transmitter
V.35 DIFFERENTIAL CONNECTION WITH
TERMINATION
50 125
CONNECTOR
50
Figure 12b. Multiprotocol Receiver
RS422 DIFFERENTIAL
CONNECTION WITH
TERMINATION
100 5k
RS232
CONNECTION WITH
TERMINATION
1346A F12b
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LTC1346A
PACKAGE DESCRIPTION
U
Dimensions in inches (millimeters) unless otherwise noted.
SW Package
24-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)
0.598 – 0.614*
(15.190 – 15.600)
22 21 20 19 18
2324
NOTE 1
0.291 – 0.299** (7.391 – 7.595)
0.010 – 0.029
(0.254 – 0.737)
0.009 – 0.013
(0.229 – 0.330)
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS.
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
*
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
**
 
NOTE 1
× 45°
0.016 – 0.050
(0.406 – 1.270)
0° – 8° TYP
0.093 – 0.104
(2.362 – 2.642)
0.050
(1.270)
2345678
1
TYP
0.014 – 0.019
(0.356 – 0.482)
17
16 15
910
11 12
1314
(10.007 – 10.643)
0.037 – 0.045
(0.940 – 1.143)
0.004 – 0.012
(0.102 – 0.305)
0.394 – 0.419
S24 (WIDE) 0695
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT1134A 5V Only, 4-Driver/4-Receiver RS232 Transceiver Forms Complete V.35 Interface with LTC1346A LTC1334 5V Only, Configurable RS232/RS485 Transceiver Includes On-Chip Charge Pump LTC1345 Single Supply V.35 Transceiver Single 5V Only, Includes On-Chip Charge Pump
LT/GP 0296 10K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1995
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX
: (408) 434-0507
TELEX
: 499-3977
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