, LTC and LT are registered trademarks of Linear Technology Corporation.
The LTC®1051/LTC1053 are high performance, low cost
dual/quad zero-drift operational amplifiers. The unique
achievement of the LTC1051/LTC1053 is that they integrate
on chip the sample-and-hold capacitors usually required
externally by other chopper amplifiers. Further, the
LTC1051/LTC1053 offer better combined overall DC and
AC performance than is available from other chopper
stabilized amplifiers with or without internal sample/hold
capacitors.
The LTC1051/LTC1053 have an offset voltage of 0.5µV,
drift of 0.01µV/°C, DC to 10Hz, input noise voltage typically
1.5µV
and typical voltage gain of 140dB. The slew rate
P-P
of 4V/µs and gain bandwidth product of 2.5MHz are
achieved with only 1mA of supply current per op amp.
Overload recover times from positive and negative
saturation conditions are 1.5ms and 3ms respectively,
about a 100 or more times improvement over chopper
amplifiers using external capacitors.
The LTC1051 is available in an 8-lead standard plastic
dual-in-line package as well as a 16-pin SW package. The
LTC1053 is available in a standard 14-pin plastic package
and an 18-pin SO. The LTC1051/LTC1053 are plug in
replacements for most standard dual/quad op amps with
improved performance.
U
TYPICAL APPLICATIO
High Performance Low Cost Instrumentation AmplifierLTC1051 Noise Spectrum
120
6
5
–
LTC1051
+
1/2
R2
–5V
100
80
7
4
1051/53 TA01a
VOLTAGE NOISE DENSITY (nV√Hz)
60
40
20
10
1001k10k
FREQUENCY (Hz)
R1
5V
R2
2
8
–
1/2
LTC1051
3
V
+
IN
R1 = 499Ω, 0.1%
R2 = 100k, 0.1%
GAIN = 201
MEASURED CMRR ~ 120dB AT DC
MEASURED INPUT V
MEASURED INPUT NOISE 2µV
3µV
OS
P-P
1
(DC – 10Hz)
R1
V
IN
1051/53 TA01b
10513fa
1
Page 2
LTC1051/LTC1053
WWWU
ABSOLUTE AXI U RATI GS
(Note 1)
Total Supply Voltage (V+ to V–) ............................ 16.5V
Input Voltage ........................ (V+ + 0.3V) to (V– – 0.3V)
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±5V unless otherwise noted.
LTC1051/LTC1053LTC1051A
PARAMETERCONDITIONSMINTYPMAXMINTYPMAXUNITS
Input Offset Voltage±0.5±5±0.5±5µV
Average Input Offset Drift●±0.0±0.05±0.0±0.05µV/°C
Long Term Offset Drift5050nV/√Mo
Input Bias Current±15±65±15±50pA
LTC1051C/LTC1053C
●±135±100pA
Input Offset Current(All Grades)±30±125±30±100pA
●±175±150pA
Input Noise Voltage (Note 2)RS = 100Ω, DC to 10Hz1.51.52µV
RS = 100Ω, DC to 1Hz0.40.4µV
P-P
P-P
10513fa
2
Page 3
LTC1051/LTC1053
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±5V unless otherwise noted.
LTC1051/LTC1053LTC1051A
PARAMETERCONDITIONSMINTYPMAXMINTYPMAXUNITS
Input Noise Currentf = 10Hz2.22.2fA/√Hz
Common Mode Rejection Ratio, CMRRVCM = V
Differential CMRRVCM = V
LTC1051, LTC1053 (Note 3)
Power Supply Rejection RatioVS = ±2.375V to ±8V●116140120140dB
Large Signal Voltage GainRL = 10k, V
Maximum Output Voltage SwingRL = 10k●±4.5±4.85±4.7±4.85V
Slew RateRL = 10k, CL = 50pF44V/µs
Gain Bandwidth Product2.52.5MHz
Supply Current/Op AmpNo Load1212mA
Internal Sampling Frequency3.33.3kHz
–
to 2.7V106130114130dB
●100110dB
–
to 2.7V112112dB
= ±4V●116160120160dB
OUT
R
= 100k±4.5±4.95±4.95V
L
●2.52.5mA
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = ±5V unless otherwise noted.VS = 5V, GND unless otherwise noted.
LTC1051A/LTC1051/LTC1053
PARAMETERCONDITIONSMINTYPMAXUNITS
Input Offset Voltage±0.5±5µV
Input Offset Drift±0.01±0.05µV/°C
Input Bias Current±10±50pA
Input Offset Current±20±80pA
Input Noise VoltageDC to 10Hz1.8µV
Supply Current/Op AmpNo Load●1.5mA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: For guaranteed noise specification contact LTC Marketing.
Note 3: Differential CMRR for the LTC1053 is measured between
amplifiers A and D, and amplifiers B and C.
P-P
10513fa
3
Page 4
LTC1051/LTC1053
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Common Mode Input Range vs
Supply Voltage
8
6
4
2
0
–2
–4
COMMON MODE RANGE (V)
–6
–8
0
12345678
SUPPLY VOLTAGE (±V)
VCM = V
–
Supply Current vs Supply Voltage
Per Op Amp
1.50
TA = 25°C
1.25
(mA)
S
1.00
0.75
0.50
SUPPLY CURRENT, I
0.25
0
4
TOTAL SUPPLY VOLTAGE V+ TO V– (V)
81012
6
1051/53 G01
1416
1051/53 G04
Sampling Frequency vs Supply
Voltage
4.0
TA = 25°C
(kHz)
3.5
S
3.0
2.5
SAMPLING FREQUENCY, f
2.0
4
681012
TOTAL SUPPLY VOLTAGE, V+ TO V– (V)
1416
1051/53 G02
Sampling Frequency vs
Temperature
VS = ±5V
5
(kHz)
S
4
3
2
SAMPLING FREQUENCY, f
1
–50
0
–25
AMBIENT TEMPERATURE, TA (°C)
25
Supply Current vs Temperature
Per Op AmpGain/Phase vs Frequency
2.0
VS = ±5V
1.8
1.6
1.4
(mA)
S
1.2
1.0
0.8
0.6
SUPPLY CURRENT, I
0.4
0.2
0
–50
–25
AMBIENT TEMPERATURE, TA (°C)
0
75
100
1051/53 G05
50
25
VOLTAGE GAIN (dB)
–20
–40
125
120
100
80
60
40
20
0
10010k100k10M
1k1M
FREQUENCY (Hz)
50
75
100
1051/53 G03
VS = ±5V
= 100pF
C
L
≥ 1k
R
L
= 25°C
T
A
1051/53 G06
125
60
80
PHASE SHIFT (DEGREES)
100
120
140
160
180
200
220
Output Short-Circuit Current vs
Supply Voltage
6
(mA)
4
OUT
I
2
0
–10
–20
SHORT-CIRCUIT OUTPUT CURRENT, I
–30
4
TOTAL SUPPLY VOLTAGE, V+ TO V– (V)
SOURCE
I
SINK
81012
6
4
CMRR vs FrequencyGain/Phase vs Frequency
≥ 1k
1051/53 G09
–60
–80
PHASE SHIFT (DEGREES)
–100
–120
–140
–160
–180
–200
–220
10513fa
–
V
= V
OUT
+
V
= V
OUT
1416
1051/53 G07
160
140
120
100
80
CMRR (dB)
60
40
VS = ±5V
20
= 25°C
T
A
AC COMMON MODE IN = 0.5V
0
11001k
1010k100k
P-P
FREQUENCY (Hz)
1051/53 G08
120
100
80
60
40
20
VOLTAGE GAIN (dB)
0
–20
–40
10010k100k10M
1k1M
FREQUENCY (Hz)
VS = ±2.5V
C
R
T
A
= 100pF
L
L
= 25°C
Page 5
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LTC1051/LTC1053
INPUT
OUTPUT
Overload Recovery
400mV
0
0
–5V
AV = –100
= ±5V
V
S
LTC1051/LTC1053 DC to 10Hz Noise
VS = ±5V
= 25°C
T
A
1µV
0.5ms
1051/53 G10
1.4µV
OUTPUT
50mV
INPUT
100mV
P-P
Small Signal Transient ResponseLarge Signal Transient Response
OUTPUT
/DIV
A
= 1, RL = 10k, CL = 100pF
V
= ±5V, TA = 25°C
V
S
2µs/DIV
1051/53 G11
2V/DIV
INPUT
6V
A
= 1, RL = 10k, CL = 100pF
V
= ±5V, TA = 25°C
V
S
2µs/DIV
1051/53 G12
1 SEC
TEST CIRCUITS
Electrical Characteristics Test CircuitDC 10Hz Noise Test Circuit
1M
+
V
1k
2
3
–
LTC1051
+
1/2
8
6
OUTPUT
4
–
V
R
L
10Ω
100k
2
–
1/2
LTC1051
3
+
FOR 1Hz NOISE BW INCREASE ALL THE CAPACITORS BY A FACTOR OF 10.
158k316k475k
6
0.1µF0.01µF
475k
10 SEC
–
LT1012
+
0.01µF
TO X-Y
RECORDER
1051/53 TC01
10513fa
5
Page 6
LTC1051/LTC1053
WUUU
APPLICATIO S I FOR ATIO
ACHIEVING PICOAMPERE/MICROVOLT PERFORMANCE
Picoamperes
In order to realize the picoampere level of accuracy of the
LTC1051/LTC1053, proper care must be exercised. Leakage currents in circuitry external to the amplifier can
significantly degrade performance. High quality insulation
should be used (e.g., Teflon, Kel-F); cleaning of all insulating surfaces to remove fluxes and other residues will
probably be necessary —particularly for high temperature
performance. Surface coating may be necessary to provide
a moisture barrier in high humidity environments.
Board leakage can be minimized by encircling the input
connections with a guard ring operated at a potential close
to that of the inputs: in inverting configurations, the guard
ring should be tied to ground; in noninverting connections,
to the inverting input. Guarding both sides of the printed
circuit board is required. Bulk leakage reduction depends
on the guard ring width.
Microvolts
Thermocouple effects must be considered if the LTC1051/
LTC1053’s ultra low drift op amps are to be fully utilized.
Any connection of dissimilar metals forms a thermoelectric junction producing an electric potential which varies
with temperature (Seebeck effect.) As temperature sensors, thermocouples exploit this phenomenon to produce
useful information. In low drift amplifier circuits, this effect
is a primary source of error.
Avoid connectors, sockets, switches and relays where
possible. In instances where this is not possible, attempt
to balance the number and type of junctions so that
differential cancellation occurs. Doing this may involve
deliberately introducing junctions to offset unavoidable
junctions.
When connectors, switches, relays and/or sockets are
necessary, they should be selected for low thermal EMF
activity. The same techniques of thermally balancing and
coupling the matching junctions are effective in reducing
the thermal EMF errors of these components.
Resistors are another source of thermal EMF errors.
Table 1 shows the thermal EMF generated for different
resistors. The temperature gradient across the resistor is
important, not the ambient temperature. There are two
junctions formed at each end of the resistor and if these
junctions are at the same temperature, their thermal EMFs
will cancel each other. The thermal EMF numbers are
approximate and vary with resistor value. High values give
higher thermal EMF.
Table 1. Resistor Thermal EMF
RESISTOR TYPETHERMAL EMF/°C GRADIENT
Tin Oxide~mV/°C
Carbon Composition~450µV/°C
Metal Film~20µV/°C
Wire Wound
Evenohm~2µV/°C
Manganin~2µV/°C
Connectors, switches, relay contacts, sockets, resistors,
solder, and even copper wire are all candidates for thermal
EMF generation. Junctions of copper wire from different
manufacturers can generate thermal EMFs of 200nV/°C—
4 times the maximum drift specification of the LTC1051/
LTC1053. The copper/kovar junction, formed when wire or
printed circuit traces contact a package lead, has a thermal
EMF of approximately 35µV/°C—700 times the maximum
drift specification of the LTC1051/LTC1053.
Minimizing thermal EMF-induced errors is possible if
judicious attention is given to circuit board layout and
component selection. It is good practice to minimize the
number of junctions in the amplifier’s input signal path.
6
Input Bias Current, Clock Feedthrough
At ambient temperatures below 60°C, the input bias current of the LTC1051/LTC1053 op amps’ is dominated by
the small amount of charge injection occurring during the
sampling and holding of the op amps’ input offset voltage.
The average value of the resulting current pulses is 10pA
to 15pA with sign convention shown in Figure 1.
+
I
B
–
I
B
TA < 60°CT
+
1/2
LTC1051
–
(a)(b)
Figure 1. LTC1051 Bias Current
+
I
B
–
I
B
+
LTC1051
–
1/2
> 85°C
A
1051/53 F01
10513fa
Page 7
WUUU
APPLICATIO S I FOR ATIO
RS = 0,
=11V/V
A
V
20mV/DIV
= 0,
R
S
=101V/V
A
V
20mV/DIV
= 100k,
R
S
=11V/V
A
V
20mV/DIV
R
= 100k,
S
=101V/V
A
V
20mV/DIV
LTC1051/LTC1053
R2
100k
R1
1k
R
S
–
LTC1051
+
1/2
100µs/DIV
(a)
Figure 2. Clock Feedthrough
As the ambient temperature rises, the leakage current of
the input protection devices increases, while the charge
injection component of the bias current, for all practical
purposes, stays constant. At elevated temperatures (above
85°C) the leakage current dominates and the bias current
of both inputs assumes the same sign.
The charge injection at the op amp input pins will cause
small output spikes. This phenomenon is often referred to
as “clock feedthrough” and can be easily observed when
the closed-loop gain exceeds 10V/V (Figure 2). The magnitude of the clock feedthrough is temperature independent but it increases when the closed-loop gain goes up,
when the source resistance increases and when the gain
setting resistors increase (Figure 2a, 2b). It is important to
note that the output small spikes are centered at 0V level
and do not add to the output offset error budget. For
instance, with RS = 1MΩ, the typical output offset voltage
of Figure 2c is:
V
OS(OUT)
≈ 108 • I
+
+ 101V
B
OS(IN)
A 10pA bias current will yield an output of 1mV ±100µV.
The output clock feedthrough can be attenuated by lowering the value of the gain setting resistors, i.e. R2 = 10k,
R1 = 100Ω, instead of 100k and 1k (Figure 2).
Clock feedthrough can also be attenuated by adding a
capacitor across the feedback resistor to limit the circuit
bandwidth below the internal sampling frequency
(Figure 3).
Input Capacitance
The input capacitance of the LTC1051/LTC1053 op amps
is approximately 12pF. When the LTC1051/LTC1053 op
amps are used with feedback factors approaching unity,
100µs/DIV
(b)
(c)
1051/53 F02
the feedback resistor value should not exceed 7k for
industrial temperature range and 5k for military temperature range. If a higher feedback resistor value is required,
a feedback capacitor of 20pF should be placed across the
feedback resistor. Note that the most common circuits
with feedback factors approaching unity are unity gain
followers and instrumentation amplifier front ends.
(See Figure 4.)
R
= 100k
S
A
=101V/V
V
20mV/DIV
= 1MΩ
R
S
=101V/V
A
V
100µs/DIV
C
R1
1k
R
S
Figure 3. Adding a Feedback Capacitor to
Eliminate Clock Feedthrough
R1
Figure 4. Operating the LTC1051
with Feedback Factors Approaching Unity
1000pF
–
LTC1051
+
–
LTC1051
+
1/2
1/2
R2
100k
2
3
R2 < 7k, IF R1 > >R2
2
3
1
1051/53 F03
1
1051/53 F04
10513fa
7
Page 8
LTC1051/LTC1053
WUUU
APPLICATIO S I FOR ATIO
LTC1051/LTC1053 as AC Amplifiers
Although initially chopper stabilized op amps were designed to minimize DC offsets and offset drifts, the
LTC1051/LTC1053 family, on top of its outstanding DC
characteristics, presents efficient AC performance. For
instance, at single 5V supply, each op amp typically
consumes 0.5mA and still provides 1.8MHz gain bandwidth product and 3V/µs slew rate. This, combined with
almost distortionless swing to the supply rails (Figure 8),
makes the LTC1051/LTC1053 op amps nearly general
purpose. To further expand this idea (the “aliasing” phenomenon) which can occur under AC conditions, should
be described and properly evaluated.
20dBV
15dB
/DIV
–100
B: MAG
RANGE: 9dBV
START: 100Hz
X: 1825Hz
fIN = 750Hzf
CLK
BW: 47.742Hz
Y: –70.72dBV
– f
IN
2f
IN
STATUS: PAUSED
STOP: 5 100Hz
2f
– f
CLK
Aliasing
The LTC1051/LTC1053 are equipped with internal circuitry to minimize aliasing. Aliasing, no matter how small,
occurs when the input signal approaches and exceeds the
internal sampling rate. Aliasing is caused by the sampled
data nature of the chopper op amps. A generalized study
of this phenomenon is beyond the scope of a data sheet;
however, a set of rules of thumb can answer many
questions:
1. Alias signals can be generally defined as output AC
signals at a frequency of nf
± mfIN. The nf
CLK
term is the
CLK
internal sampling frequency of the chopper stabilized op
amps and its harmonics; mf
is the frequency of the input
IN
signal and its harmonics, if any.
RMS: 25
R2
10k
2
3
–
LTC1051
+
1/2
–5V
5V
0.1µF
1
V
OUT
50pF
0.1µF
1051/53 F05a
80dB
R1
1k
f
IN
0.8V
P-P
IN
8
Figure 5a. Output Voltage Spectrum of 1/2 LTC1051 Operating as an Inverting Amplifier with Gain of 10,
and Amplifying a 750Hz/800mV, Input AC Signal
20dBV
15dB
/DIV
–100
A: MAG
RANGE: 11dBV
CENTER: 10 000Hz
X: 5550Hz
– f
6f
CLK
IN
BW: 95.485Hz
Y: –63.91dBV
fIN = 10kHz
STATUS: PAUSED
RMS: 25
SPAN: 10 000Hz
74dB
Figure 5b. Same as Figure 5a, but the AC Input Signal is 900mV, 10kHz
10513fa
Page 9
WUUU
APPLICATIO S I FOR ATIO
LTC1051/LTC1053
2. If we arbitrarily accept that “aliasing” occurs when
output alias signals reach an amplitude of 0.01% or more
of the output signal, then: the approximate minimum
frequency of an AC input signal which will cause aliasing
is equal to the internal clock frequency multiplied by the
square root of the op amp feedback factor. For instance,
with closed-loop gain of –10, the feedback factor is 1/11
and if f
= 2.6kHz, alias signals can be detected when
CLK
the frequency of the input signal exceeds 750Hz to 800Hz
(Figure 5a).
3. The number of alias signals increases when the input
signal frequency increases (Figure 5b).
13dBV
15dB
/DIV
B: MAG
RANGE: 9dBV
STATUS: PAUSED
RMS: 25
4. When the frequency, f
, the alias signal(s) amplitude(s) directly scale with
f
CLOCK
, of the input signal is less than
IN
the amplitude of the incoming signal. The output “signal to
alias ratio” cannot be increased by just boosting the input
signal amplitude. However, when the input AC signal
frequency well exceeds the clock frequency, the amplitude
of the alias signals does not directly scale with the input
amplitude. The “signal to alias ratio” increases when the
output swings closely to the rails. (See Figure 5b and
Figure 7.) It is important to note that the LTC1051/
LTC1053 op amps, under light loads (RL ≥ 10k), swing
closely to the supply rails without generating harmonic
distortion (Figure 8).
10k
–
LTC1051
+
5V
0.1µF
1/2
50pF
83.5dB
10k
–107
CENTER: 2 625Hz
X: 2535Hz
NOTE: THE f
ALIAS FREQUENCY IS 95dB
DOWN FROM THE OUTPUT LEVEL
– fIN = 85Hz
CLK
Figure 6a. Output Voltage Spectrum of 1/2 LTC1051 Operating as a Unity-Gain Inverting Amplifier.
VS = ±5V, RL = 10k, CL = 50pF, VIN = 8V
Figure 6b. Output Voltage Spectrum of 1/2 LTC1051 Operating as a Unity-Gain Inverting Amplifier.
VS = ±5V, RL = 10k, CL = 50pF, VIN = 8V
BW: 19.097Hz
Y: –74.16dBV
2f
– f
CLK
13dBV
15dB
5f
CLK
fIN – 2f
NOTE: ALL ALIAS FREQUENCY
80dB TO 84dB DOWN FROM OUTPUT
IN
f
CLK
B: MAG
RANGE: 9dBV
15dB
/DIV
–107
CENTER: 10 000Hz
X: 10000Hz
– f
IN
CLK
fIN = 2.685kHz
6f
– f
CLK
2 • f
IN
CLK
SPAN: 2 000Hz
, 2.685kHz
P-P
CLK
, 10kHz
P-P
BW: 95.485Hz
Y: 7.98dBV
fIN = 10kHzfIN – f
= 10kHz
V
IN
8V
P-P
STATUS: PAUSED
RMS: 50
SPAN: 10 000Hz
1kHz
80dB
–5V
0.1µF
1051/53 F05a
10513fa
9
Page 10
LTC1051/LTC1053
WUUU
APPLICATIO S I FOR ATIO
5. For unity-gain inverting configuration, all the alias
frequencies are 80dB to 84dB down from the output signal
(Figures 6a, 6b). Combined with excellent THD under wide
swing, the LTC1051/LTC1053 op amps make efficient
unity gain inverters.
For gain higher than –1, the “signal to alias” ratio decreases at an approximate rate of –6dB per decade of
closed-loop gain (Figure 9).
6. For closed-loop gains of –10 or higher, the “signal to
alias” ratio degrades when the value of the feedback gain
setting resistor increases beyond 50k. For instance, the
SYSTEM BUSY, ONLY ABORT COMMANDS ALLOWED
RANGE: 11dBV
20dBV
15dB
/DIV
STATUS: PAUSED
68dB value of Figure 7 decreases to 56dB if a (1k, 100k)
resistor set is used to set the gain of –100.
7. When the LTC1051/LTC1053 are used as noninverting
amplifiers, all the previous approximate rules of thumb
apply with the following exceptions: when the closed-loop
gain is 10(V/V) and below, the “signal to alias” ratio is 1dB
to 3dB less than the inverting case; when the closed-loop
gain is 100(V/V), the degradation can be up to 9dB,
especially when the input signal is much higher than the
clock frequency (i.e. fIN = 10kHz).
8. The signal/alias ratio performance improves when the
op amp has bandlimited loop gain.
R2
10k
–
LTC1051
+
1/2
5V
0.1µF
V
OUT
50pF
68dB
100Ω
90mV
10kHz
R1
P-P
–100
CENTER: 10 000Hz
X: 5475Hz
CLK
– f
BW: 95.485Hz
Y: –58.05dBV
IN
fIN =10kHz6f
SPAN: 10 000Hz
–5V
0.1µF
1051/53 F07
Figure 7. Output Voltage Spectrum of 1/2 LTC1051 Operating as an Inverting Amplifier with a Gain of –100 and
Amplifiying a 90mV
, 10kHz Input Signal. With a 9V
P-P
Output Swing the Measured 2nd Harmonic (20kHz)
P-P
was 75 Down from the 10kHz Input Signal
10
9
8
7
6
5
± SWING (±V)
4
OUT
V
3
2
1
0
01k2k3k
RL (LOAD RESISTANCE,Ω)
VS = ±8V, TA ≤85°C
VS = ±5V, TA ≤85°C
VS = ±2.5V, TA ≤85°C
NEGATIVE SWING
POSITIVE SWING
4k
6k 7k 8k 9k 10k
5k
1051/53 G08
90
80
70
60
50
40
30
20
10
OUTPUT SIGNAL TO ALIAS SIGNAL(S) RATIO (dB)
1
INVERTING CLOSED-LOOP GAIN
VS = ±5V
≤10kHz
f
IN
1051/53 G09
10010
Figure 8. Output Voltage Swing vs LoadFigure 9. Signal to Alias Ratio vs
Closed-Loop Gain
10
10513fa
Page 11
TYPICAL APPLICATIO S
LTC1051/LTC1053
U
Obtaining Ultralow VOS Drift and Low Noise
The dual chopper op amp buffers the inputs of A1 and
corrects its offset voltage and offset voltage drift. With the
R, C values shown, the power-up warm up time is typically
20 seconds. The step response of the composite amplifier
B
+
5
OUT
+
1/2
LTC1051
R4
6
–
R5
R3
7
C1
C2
1051/53 AC01a
2
–
1/2
LTC1051
3
+
3
+
2
–
–
A
1
5V
R2
R1
1
8
6
A1
does not present settling tails. The LT1007 should be used
when extremely low noise; VOS and VOS drift are sought
when the input source resistance is low—for instance a
350Ω strain gauge bridge. The LT1012 or equivalent
should be used when low bias current (100pA) is also
OUT
required in conjunction with DC to 10Hz low noise and low
and VOS drift. The measured typical input offset
V
OS
voltages were less than 2µV.
A1R1R2R3R4R5C1C2e
LT10073k2k340k10k100k0.01µF0.001µF0.1µV
LT1012*750Ω57Ω250k10k100k0.01µF0.001µF0.3µV
* Interchange connections A and B .
** Noise measured in a 10 sec window. Peak-to-peak noise was also measured for 10 continuous minutes: With the LT1007 op amp the recorded noise was less than 0.2µV
and DC-10Hz.
(DC – 1Hz)**e
OUT
P-P
P-P
(DC – 10Hz)**
OUT
0.15µV
LTC1051/LT1007 Peak-to-Peak Noise
VS = ±5V
0.2µV/DIV
1 SEC/DIV
DC TO 1Hz
NOISE
DC TO 10Hz
NOISE
1051/53 AC01b
P-P
0.4µV
P-P
for both DC-1Hz
P-P
10513fa
11
Page 12
LTC1051/LTC1053
+
–
–
+
1/4
LTC1053
+
–
1/4
LTC1053
+
–
1/4
LTC1053
1/4
LTC1053
9
10
12
13
2
3
5
6
7
1
14
10k
10k10k
10k
10k
20k
20k
10k
8
4
11
0.1µF
0.1µF
0.1µF
0.1µF
5V
–5V
I
OUT
R
LOAD
1051/53 AC03
20k
10k10k
R
G
V1
V2
• I
OUT
= 2(V2 – V1)/R
G
• BW = 100Hz
•
IOUTMAX
= 1mA
TYPICAL APPLICATIO S
Paralleling Choppers to Improve NoiseDifferential Voltage to Current Converter
R2
R1
V
IN
2
–
1/4
LTC1053
3
+
R2
R1
6
–
1/4
LTC1053
5
+
R2
R1
9
–
1/4
LTC1053
10
+
NOTE: THIS CIRCUIT CAN ALSO BE USED AS A
DIFFERENCE AMPLIFIER FOR STRAIN GAUGES.
CONNECT R2/3 AND R1/3 FROM NONINVERTING
INPUTS, SHORTED TOGETHER, TO GROUND AND
TO SOURCE RESPECTIVELY.
RR
1
R
7
R
8
V
= 3(R2/R1); INPUT DC – 10Hz NOISE
OUT/VIN
= NOISE OF EACH PARALLELED OP AMP/√3
≅ 0.8µV
P-P
U
5V
0.1µF
4
13
–
LTC1053
12
+
1/4
–5V
14
V
OUT
11
0.1µF
1051/53 AC02
12
Multiplexed Differential Thermometer
100Ω
1k
TYPE K
+–
0.1µF
100Ω
–
TYPE K
TYPE K
1k
1k
+–
0.1µF
100Ω
+
0.1µF
5V
2
7
K
LT1025A
–
GND
R
4
5
255k
0.068µF
2
–
LTC1053
3
+
6
–
LTC1053
5
+
9
–
LTC1053
10
+
1/4
255k
0.068µF
1/4
255k
0.068µF
1/4
1
T2
7
T1
8
ABSOLUTE
TEMPERATURE
ABSOLUTE
TEMPERATURE
10k
5V
10k
13
10k
4
–
1/4
14
LTC1053
12
+
11
– T1 OR T
REF
OUTPUT
(DIFFERENTIAL
TEMPERATURE)
– T2(10mV PER °C)
REF
1051/53 AC04
10513fa
S1
10k
T
REF
ALL FIXED RESISTORS ARE 1% METAL FILM
OUTPUT = T
ACCURACY = (±0.1% FROM 25°C TO 150°C)
Page 13
–
+
1/2
LTC1051
3
2
1
1k
0.22µF
100k
5V
5V
V
OUT1
V
OUT2
1µF
1µF
–
+
1/2
LTC1051
5
6
7
4
8
1k
0.22µF
0.0047µF
100k
1µF
8
7
11
12
1413
1µF
5
6
2
3
17
1518
416
–
+
–
+
INPUT 1
INPUT 2
GAIN = 101V/DIV
CMRR >100dB
V
OS
≅ 3µV
INPUT REFERRED NOISE ≅ 2µV
P-P
1051/53 AC06
LTC1043
TYPICAL APPLICATIO S
Six Decade Log Amplifier
LTC1051/LTC1053
U
Dual Instrumentation Amplifier
10k
0.1%
V
IN
1nA < IIN <1mA
Q1: TEL LAB TYPE Q81
ADJUST 2M POR. FOR NONLINEARITIES
2
3
–
1/2
LTC1051
+
V
OUT =
Q1Q10.0022µF22pF
3k
0.1%
15.8k
0.1%
1
LOG V
–2V
IN
3
2
1k
0.1%
+
–
2M
1/2
LTC1051
0.1µF
1N4148
5V
5V
2.5V
0.1µF
0.1µF
7
1/2
LTC1051
4
–5V
2.5M
8
0.1%
–
6
+
5
LT1009
1051/53 AC05
Linearized Platinum Signal Conditioner
250k*
8
1
4
10k*
274k*
50k
ZERO
ADJUST
8.25k*
2.4k
LT1009
2.5V
5V
5V
(LINEARITY CORRECTION LOOP)
2k
7
1µF
RP = ROSEMOUNT 118MFRTD
*1% FILM RESISTOR
TRIM SEQUENCE:
1/2 LTC1043
SET SENSOR TO 0°C VALUE. ADJUST ZERO FOR 0V OUT
SET SENSOR TO 100°C VALUE. ADJUST GAIN FOR 1.000V OUT
SET SENSOR TO 400°C VALUE. ADJUST LINEARITY FOR 4.000V OUT
REPEAT AS REQUIRED. FOR MORE INFORMATION REFER TO AN3
8
11
12
1µF
887Ω
1413
R
P
I
100Ω
K
AT 0°C
5
15
1/2 LTC1043
4
2
3
0.01µF
1µF
0V TO 4V =
GAIN
ADJUST
8.06k*
0°C TO 400°C
±0.05°C
7
1k
5k
1k
1051/53 AC07
10513fa
1µF
5
6
+
LTC1051
–
1/2
6
18
1716
13
Page 14
LTC1051/LTC1053
PACKAGE DESCRIPTIO
.300 BSC
(7.62 BSC)
.008 – .018
(0.203 – 0.457)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER
DIP/PLATE OR TIN PLATE LEADS
0° – 15°
(1.143 – 1.650)
CORNER LEADS OPTION
.045 – .068
FULL LEAD
OPTION
U
J Package
8-Lead CERDIP (Narrow 0.300, Hermetic)
(LTC DWG # 05-08-1110)
(4 PLCS)
.023 – .045
(0.584 – 1.143)
HALF LEAD
OPTION
.045 – .065
(1.143 – 1.651)
.014 – .026
(0.360 – 0.660)
N Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
.015 – .060
(0.381 – 1.524)
.100
(2.54)
BSC
.405
.200
(5.080)
MAX
.125
3.175
MIN
.005
(0.127)
MIN
.025
(0.635)
RAD TYP
(10.287)
MAX
87
12
65
3
4
OBSOLETE PACKAGE
.220 – .310
(5.588 – 7.874)
J8 0801
.255 ± .015*
(6.477 ± 0.381)
.300 – .325
(7.620 – 8.255)
.065
(1.651)
.008 – .015
(0.203 – 0.381)
+.035
.325
–.015
+0.889
8.255
()
–0.381
TYP
NOTE:
1. DIMENSIONS ARE
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
.045 – .065
(1.143 – 1.651)
.100
(2.54)
BSC
INCHES
MILLIMETERS
14-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
.770*
(19.558)
MAX
14
2
11
1213
31
5
4
8910
7
6
(7.620 – 8.255)
(0.203 – 0.381)
8.255
()
NOTE:
1. DIMENSIONS ARE
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
N Package
.300 – .325
.008 – .015
+.035
.325
–.015
+0.889
–0.381
.018 ± .003
(0.457 ± 0.076)
INCHES
MILLIMETERS
.130 ± .005
(3.302 ± 0.127)
.120
(3.048)
MIN
(0.508)
(3.302 ± 0.127)
.020
(0.508)
MIN
.020
MIN
N8 1002
.130 ± .005
.120
(3.048)
MIN
.255 ± .015*
(6.477 ± 0.381)
.400*
(10.160)
MAX
87 6
1234
(1.143 – 1.651)
.005
(0.125)
.100
MIN
(2.54)
BSC
.045 – .065
5
.065
(1.651)
TYP
.018 ± .003
(0.457 ± 0.076)
N14 1002
14
10513fa
Page 15
PACKAGE DESCRIPTIO
.030 ±.005
TYP
N
.420
MIN
U
SW Package
16-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)
.050 BSC
.045 ±.005
.325
±.005
16
N
NOTE 3
.398 – .413
(10.109 – 10.490)
NOTE 4
15 1413121110 9
LTC1051/LTC1053
.394 – .419
(10.007 – 10.643)
.005
(0.127)
RAD MIN
.009 – .013
(0.229 – 0.330)
.030 ±.005
TYP
.420
MIN
.005
(0.127)
RAD MIN
123N/2
RECOMMENDED SOLDER PAD LAYOUT
.291 – .299
(7.391 – 7.595)
NOTE 4
.010 – .029
(0.254 – 0.737)
NOTE 3
× 45°
.016 – .050
(0.406 – 1.270)
18-Lead Plastic Small Outline (Wide 0.300)
.050 BSC
N
123N/2
RECOMMENDED SOLDER PAD LAYOUT
.291 – .299
(7.391 – 7.595)
NOTE 4
.010 – .029
(0.254 – 0.737)
× 45°
.093 – .104
(2.362 – 2.642)
0° – 8° TYP
SW Package
(LTC DWG # 05-08-1620)
.045 ±.005
.093 – .104
(2.362 – 2.642)
N
1
.325 ±.005
NOTE 3
0° – 8° TYP
1
.050
(1.270)
BSC
.014 – .019
(0.356 – 0.482)
16
1718
2345
2345
TYP
.447 – .463
(11.354 – 11.760)
NOTE 4
14 131211
15
6
6
78
N/2
78
(0.940 – 1.143)
10
N/2
9
.037 – .045
(0.940 – 1.143)
.037 – .045
.004 – .012
(0.102 – 0.305)
.394 – .419
(10.007 – 10.643)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES
ON THE BOTTOM OF PACKAGES ARE THE
MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR
WITHOUT ANY OF THE OPTIONS
4. THESE DIMENSIONS DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT
EXCEED .006" (0.15mm)
S16 (WIDE) 0502
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES
ON THE BOTTOM OF PACKAGES ARE THE
MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR
WITHOUT ANY OF THE OPTIONS
4. THESE DIMENSIONS DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT
EXCEED .006" (0.15mm)
INCHES
(MILLIMETERS)
INCHES
(MILLIMETERS)
.009 – .013
(0.229 – 0.330)
.050
(1.270)
NOTE 3
.016 – .050
(0.406 – 1.270)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
BSC
(0.356 – 0.482)
.014 – .019
TYP
.004 – .012
(0.102 – 0.305)
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
S18 (WIDE) 0502
10513fa
15
Page 16
LTC1051/LTC1053
U
TYPICAL APPLICATIO S
DC Accurate, 3rd Order, 100Hz, Butterworth Antialiasing FilterDynamic Range
C1
0.1µF
0.1
60dB
R1
16.5kR2118kR321k
V
IN
C
0.1µF
WIDEBAND NOISE 9µV
THD + NOISE ≅ 0.0012%, 1V
(OUT) < 5µV
V
OS
RMS
0.1µF
RMS
C2
< VIN < 2V
2
3
RMS
8V
+
1/2
LTC1051
–
–8V
, VS = ±8V
0.1µF
0.1µF
1
V
OUT
1051/53 AC08
0.01
THD + NOISE (%)
0.001
0.0001
0.11.05.0
VIN (V
), fIN = 30Hz
RMS
DC Accurate, 18-Bit, 4th Order Antialiasing Bessel (Linear Phase),
100Hz, Lowpass FilterDynamic Range
0.1
0.01
THD + NOISE (%)
0.001
VS = ±8V
V
IN
R1A
10k
0.22µF
R2A
10k
C1A
0.022µF
R3A
26.7k
–
1/2
CA
LTC1051
+
0.022µF
R1B
50k
CB
R3B
412k
R2B
50k
0.0022µF
–
1/2
LTC1051
+
C1B
V
OUT
VS = ±5V
VS = ±5V
VS = ±8V
1051/53 AC09
80dB
100dB
120dB
60dB
80dB
100dB
WIDEBAND RMS NOISE 4.5µV
THD + NOISE ≅ 0.0005% (= 106dB DYNAMIC RANGE), 2V
VOS OUT < 10µV