Page 1
FEATURES
LTC1050
Precision Zero-Drift
Operational Amplifier
with Internal Capacitors
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DESCRIPTIO
■
No External Components Required
■
Noise Tested and Guaranteed
■
Low Aliasing Errors
■
Maximum Offset Voltage: 5µV
■
Maximum Offset Voltage Drift: 0.05µV/°C
■
Low Noise: 1.6µV
■
Minimum Voltage Gain: 130dB
■
Minimum PSRR: 125dB
■
Minimum CMRR: 120dB
■
Low Supply Current: 1mA
■
Single Supply Operation: 4.75V to 16V
■
Input Common Mode Range Includes Ground
■
Output Swings to Ground
■
Typical Overload Recovery Time: 3ms
(0.1Hz to 10Hz)
P-P
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APPLICATIO S
■
Thermocouple Amplifiers
■
Electronic Scales
■
Medical Instrumentation
■
Strain Gauge Amplifiers
■
High Resolution Data Acquisition
■
DC Accurate RC Active Filters
, LTC and LT are registered trademarks of Linear Technology Corporation.
The LTC®1050 is a high performance, low cost zero-drift
operational amplifier. The unique achievement of the
LTC1050 is that it integrates on-chip the two sample-andhold capacitors usually required externally by other chopper amplifiers. Further, the LTC1050 offers better combined overall DC and AC performance than is available
from other chopper stabilized amplifiers with or without
internal sample-and-hold capacitors.
The LTC1050 has an offset voltage of 0.5µV, drift of
0.01µV/°C, DC to 10Hz, input noise voltage of 1.6µV
P-P
and a typical voltage gain of 160dB. The slew rate of 4V/µs
and a gain bandwidth product of 2.5MHz are achieved with
only 1mA of supply current.
Overload recovery times from positive and negative saturation conditions are 1.5ms and 3ms respectively, which
represents an improvement of about 100 times over chopper amplifiers using external capacitors. Pin 5 is an optional
external clock input, useful for synchronization purposes.
The LTC1050 is available in standard 8-pin metal can,
plastic and ceramic dual-in-line packages as well as an
SO-8 package. The LTC1050 can be an improved plug-in
replacement for most standard op amps.
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TYPICAL APPLICATIO
High Performance, Low Cost Instrumentation Amplifier
5V
DIFFERENTIAL
INPUT
4
1/2 LTC1043
7 8
11
C
S
1µF
12
13
16
0.01µF
14
17
–5V
C
H
1µF
R1
CMRR > 120dB AT DC
CMRR > 120dB AT 60Hz
DUAL SUPPLY OR SINGLE 5V
GAIN = 1 + R2/R1
= 5µV
V
OS
COMMON MODE INPUT VOLTAGE EQUALS THE SUPPLIES
3
2
+
LTC1050
–
5V
–5V
1µF
7
6
4
R2
1050 TA01
Noise Spectrum
160
140
120
V
OUT
100
80
60
40
VOLTAGE NOISE DENSITY (nV/√Hz)
20
0
100
10 1k 10k 100k
FREQUENCY (Hz)
1050 TA02
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1
Page 2
LTC1050
1
2
3
4
8
7
6
5
TOP VIEW
NC
V
+
OUT
EXT CLOCK
INPUT
NC
–IN
+IN
V
–
S8 PACKAGE
8-LEAD PLASTIC SO
–
+
A
W
O
LUTEXI TIS
S
A
WUW
U
(Note 1)
ARB
G
Total Supply Voltage (V+ to V–) .............................. 18V
+
Input Voltage ........................ (V
+ 0.3V) to (V– – 0.3V)
Output Short-Circuit Duration ......................... Indefinite
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
WU
/
PACKAGE
–IN
+IN
8-LEAD TO-5 METAL CAN
O
RDER I FOR ATIO
TOP VIEW
NC
NC
2
8
1
3
4
V
H PACKAGE
T
= 150°C
JMAX
+
7
(CASE)
V
6
OUT
5
EXT CLOCK
INPUT
–
OBSOLETE PACKAGE
ORDER PART
NUMBER
LTC1050ACH
LTC1050CH
LTC1050AMH
LTC1050MH
Operating Temperature Range
LTC1050AC/C .................................. – 40°C to 85°C
LTC1050H ..................................... – 40°C to 125°C
LTC1050AM/M (OBSOLETE) .......... – 55°C to 125°C
U
T
= 150°C, θJA = 150°C/W
JMAX
ORDER PART
NUMBER
LTC1050CS8
LTC1050HS8
S8 PART MARKING
1050
1050H
TOP VIEW
NC
1
–IN
2
+IN
3
–
V
4
N8 PACKAGE
8-LEAD PDIP
= 150°C, θJA = 100°C/W
T
JMAX
J8 PACKAGE 8-LEAD CERDIP
= 150°C, θJA = 100°C/W
T
JMAX
NC
8
V
7
OUT
6
EXT CLOCK
5
INPUT
+
OBSOLETE PACKAGE
Consider the N8 Package for Alternate Source
Consult LTC Marketing for parts specified with wider operating temperature ranges.
LECTRICAL C CHARA TERIST
E
ORDER PART
NUMBER
LTC1050ACN8
LTC1050CN8
LTC1050ACJ8
LTC1050CJ8
LTC1050AMJ8
LTC1050MJ8
The ● denotes specifications which apply over the full operating temperature
ICS
1
NC
2
NC
3
NC
4
–IN
5
+IN
6
NC
–
7
V
14-LEAD PDIP
T
= 150°C, θJA = 70°C/W
JMAX
TOP VIEW
N PACKAGE
ORDER PART
NUMBER
NC
14
NC
13
NC
12
+
V
11
OUT
10
NC
9
NC
8
LTC1050CN
range, otherwise specifications are at TA = 25°C. VS = ±5V
LTC1050AM LTC1050AC
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Input Offset Voltage (Note 3) ±0.5 ±5 ±0.5 ±5 µV
Average Input Offset Drift (Note 3) ● ±0.01 ±0.05 ±0.01 ±0.05 µV/°C
Long Term Offset Voltage Drift 50 50 nV/√Mo
Input Offset Current (Note 5) ±20 ±60 ±20 ± 60 pA
Input Bias Current (Note 5) ±10 ±30 ±10 ±30 pA
Input Noise Voltage 0.1Hz to 10Hz (Note 6) 1.6 2.1 1.6 2.1 µV
2
DC to 1Hz 0.6 0.6 µV
● ±300 ±150 pA
● ±2000 ±100 pA
P-P
P-P
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LTC1050
LECTRICAL C CHARA TERIST
E
The ● denotes specifications which apply over the full operating temperature
ICS
range, otherwise specifications are at TA = 25°C. VS = ±5V
LTC1050AM LTC1050AC
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Input Noise Current f = 10Hz (Note 4) 1.8 1.8 fA/√Hz
Common Mode Rejection Ratio VCM = V– to 2.7V 114 140 114 140 dB
Power Supply Rejection Ratio VS = ±2.375V to ± 8V ● 125 140 125 140 dB
Large-Signal Voltage Gain RL = 10k, V
Maximum Output Voltage Swing RL = 10k ● ±4.7 ±4.85 ±4.7 ±4.85 V
Slew Rate RL = 10k, CL = 50pF 4 4 V/µs
Gain Bandwidth Product 2.5 2.5 MHz
Supply Current No Load 1 1.5 1 1.5 mA
Internal Sampling Frequency 2.5 2.5 kHz
R
= 100k ±4.95 ±4.95 V
L
= ±4V ● 130 160 130 160 dB
OUT
● 110 110 dB
● 2.3 2.3 mA
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = ±5V
LTC1050M/H LTC1050C
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Input Offset Voltage (Note 3) ±0.5 ±5 ±0.5 ±5 µV
Average Input Offset Drift (Note 3) ● ±0.01 ±0.05 ±0.01 ±0.05 µV/°C
Long Term Offset Voltage Drift 50 50 nV/√Mo
Input Offset Current (Note 5) ±20 ±100 ±20 ±125 pA
Input Bias Current (Note 5) ±10 ±50 ±10 ±75 pA
Input Noise Voltage RS = 100Ω, 0.1Hz to 10Hz (Note 6) 1.6 1.6 µV
Input Noise Current f = 10Hz (Note 4) 1.8 1.8 fA/√Hz
Common Mode Rejection Ratio VCM = V– to 2.7V 114 130 114 130 dB
Power Supply Rejection Ratio VS = ±2.375V to ±8V, LTC1050M/C ● 120 140 120 140 dB
Large-Signal Voltage Gain RL = 10k, V
Maximum Output Voltage Swing RL = 10k ● ±4.7 ±4.85 ±4.7 ±4.85 V
Slew Rate RL = 10k, CL = 50pF 4 4 V/µs
Gain Bandwidth Product 2.5 2.5 MHz
Supply Current No Load 1 1.5 1 1.5 mA
Internal Sampling Frequency 2.5 2.5 kHz
RS = 100Ω, DC to 1Hz 0.6 0.6 µV
LTC1050M/C
LTC1050H
LTC1050H
= ±4V ● 120 160 120 160 dB
OUT
R
= 100k ±4.95 ±4.95 V
L
● ±300 ±200 pA
● ±2000 ±150 pA
P-P
P-P
● 110 110 dB
● 100 dB
● 110 dB
● 2.3 2.3 mA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: Connecting any terminal to voltages greater than V+ or less than
V– may cause destructive latchup. It is recommended that no sources
operating from external supplies be applied prior to power-up of the
LTC1050.
Note 3: These parameters are guaranteed by design. Thermocouple effects
preclude measurement of these voltage levels in high speed automatic test
systems. V
capability.
is measured to a limit determined by test equipment
OS
Note 4: Current Noise is calculated from the formula: In = √(2q • Ib)
where q = 1.6 • 10
Note 5: At T
tested.
Note 6: Every lot of LTC1050AM and LTC1050AC is 100% tested for
Broadband Noise at 1kHz and sample tested for Input Noise Voltage at
0.1Hz to 10Hz.
–19
Coulomb.
≤ 0°C these parameters are guaranteed by design and not
A
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LTC1050
LPER
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ATYPICA
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CCHARA TERIST
E
C
ICS
Offset Voltage
vs Sampling Frequency
10
VS = ± 5V
8
6
4
OFFSET VOLTAGE (µV)
2
0
2.5
2.0
3.0
SAMPLING FREQUENCY, fS (kHz)
Sampling Frequency
vs Supply Voltage
3.5
TA = 25°C
3.0
(kHz)
S
2.5
2.0
SAMPLING FREQUENCY, f
1.5
4
681012
TOTAL SUPPLY VOLTAGE, V+ TO V– (V)
3.5
4.0
1050 G01
14 16
1050 G04
10Hz PEAK-TO-PEAK NOISE (µV)
4.5
Sampling Frequency
vs Temperature
5
4
(kHz)
S
3
2
1
SAMPLING FREQUENCY, f
0
–50
10Hz
P-P
Noise
vs Sampling Frequency
8
VS = ± 5V
7
6
5
4
3
2
1
0
100
SAMPLING FREQUENCY, fS (Hz)
VS = ± 5V
0
–25
AMBIENT TEMPERATURE, TA (°C)
1k 10k
50
25
Common Mode Input Range
vs Supply Voltage
1050 G02
8
6
4
2
0
–2
–4
COMMON MODE RANGE (V)
–6
–8
VCM = V
0
–
±1
± 2
SUPPLY VOLTAGE (V)
± 3
± 4
± 5
± 6
± 7
1050 G03
± 8
Overload Recovery
200mV
INPUT
OUTPUT
100
125
1050 G05
75
0V
0V
–5V
= –100 0.5ms/DIV
A
V
V
= ±5V
S
1050 G6
Supply Current vs Supply Voltage
1.50
TA = 25°C
1.25
(mA)
S
1.00
0.75
0.50
SUPPLY CURRENT, I
0.25
0
4
TOTAL SUPPLY VOLTAGE, V+ TO V– (V)
81012
6
4
14 16
1050 G07
Supply Current vs Temperature
2.0
VS = ± 5V
1.8
1.6
1.4
(mA)
S
1.2
1.0
0.8
0.6
SUPPLY CURRENT, I
0.4
0.2
0
–50
0
–25
AMBIENT TEMPERATURE, TA (°C)
50
25
Short-Circuit Output Current
vs Supply Voltage
6
(mA)
4
OUT
2
0
–10
–20
SHORT-CIRCUIT OUTPUT CURRENT, I
100
125
1050 G08
75
–30
4
TOTAL SUPPLY VOLTAGE, V+ TO V– (V)
81012
6
I
SOURCE
V
OUT
V
OUT
I
SINK
= V
= V
–
+
14 16
1050 G09
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LPER
F
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ATYPICA
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CCHARA TERIST
E
C
LTC1050
ICS
Gain/Phase vs Frequency
120
100
80
60
40
20
VOLTAGE GAIN (dB)
0
VS = ± 5V
= 25°C
T
A
–20
= 100pF
C
L
≥ 1k
R
L
–40
1k
100 10k 100k 10M
GAIN
FREQUENCY (Hz)
PHASE
1M
LTC1050 DC to 1Hz Noise
0.5µV
1050 G10
60
80
PHASE SHIFT (DEGREES)
100
120
140
160
180
200
220
100mV
STEP
Small-Signal Transient Response Large-Signal Transient Response
V
OUT
2V
VIN = 6V
= 1
A
V
= 10k
R
L
C
= 100pF
L
= ±5V
V
S
1050 G11
= 1
A
V
= 10k
R
L
C
= 100pF
L
= ±5V
V
S
1050 G12
10 SEC
LTC1050 DC to 10Hz Noise
1µV
1 SEC
1050 G13
1050 G14
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Page 6
LTC1050
TEST CIRCUITS
Electrical Characteristics Test Circuit
100k
–
LTC1050
+
1k
PPLICATI
A
1M
+
V
2
3
7
–
LTC1050 OUTPUT
+
6
4
–
V
U
O
S
IFOR ATIO
R
L
1050 TC01
10Ω
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ACHIEVING PICOAMPERE/MICROVOLT
PERFORMANCE
Picoamperes
In order to realize the picoampere level of accuracy of the
LTC1050, proper care must be exercised. Leakage currents
in circuitry external to the amplifier can significantly degrade
performance. High quality insulation should be used (e.g.,
Teflon, Kel-F); cleaning of all insulating surfaces to remove
fluxes and other residues will probably be necessary—
particularly for high temperature performance. Surface
coating may be necessary to provide a moisture barrier in
high humidity environments.
Board leakage can be minimized by encircling the input
connections with a guard ring operated at a potential close
to that of the inputs: in inverting configurations the guard
ring should be tied to ground; in noninverting connections
to the inverting input (see Figure 1). Guarding both sides
of the printed circuit board is required. Bulk leakage reduction depends on the guard ring width.
Microvolts
Thermocouple effect must be considered if the LTC1050’s
ultralow drift is to be fully utilized. Any connection of dissimilar metals forms a thermoelectric junction producing
an electric potential which varies with temperature (Seebeck
effect). As temperature sensors, thermocouples exploit this
phenomenon to produce useful information. In low drift
amplifier circuits the effect is a primary source of error.
Connectors, switches, relay contacts, sockets, resistors,
solder and even copper wire are all candidates for thermal
DC-10Hz Noise Test Circuit
475k
0.015µF
158k 316k 475k
0.015µF
FOR 1Hz NOISE BW, INCREASE ALL
THE CAPACITORS BY A FACTOR OF10
+
V
OUTPUT
OPTIONAL
EXTERNAL
CLOCK
–
V
0.015µF
7
6
5
4
Figure 1
8
GUARD
–
LT®1012
+
1
3
TO X-Y
RECORDER
1050 TC02
2
INPUTS
1050 F01
EMF generation. Junctions of copper wire from different
manufacturers can generate thermal EMFs of 200nV/°C—
4 times the maximum drift specification of the LTC1050.
The copper/kovar junction, formed when wire or printed
circuit traces contact a package lead, has a thermal EMF of
approximately 35µV/°C—700 times the maximum drift
specification of the LTC1050.
Minimizing thermal EMF-induced errors is possible if judicious attention is given to circuit board layout and
component selection. It is good practice to minimize the
number of junctions in the amplifier’s input signal path.
Avoid connectors, sockets, switches and relays where
possible. In instances where this is not possible, attempt
to balance the number and type of junctions so that differential cancellation occurs. Doing this may involve
deliberately introducing junctions to offset unavoidable
junctions.
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Page 7
LTC1050
CAPACITANCE LOADING (pF)
1
1
SAMPLING FREQUENCY, f
S
(kHz)
2
105 100
1050 F03
3
VS = ± 5V
PPLICATI
A
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IFOR ATIO
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Figure 2 is an example of the introduction of an unnecessary resistor to promote differential thermal balance.
Maintaining compensating junctions in close physical proximity will keep them at the same temperature and reduce
thermal EMF errors.
NOMINALLY
UNNECESSARY
RESISTOR USED TO
THERMALLY BALANCE
OTHER INPUT RESISTOR
RESISTOR LEAD, SOLDER
COPPER TRACE JUNCTION
LEAD WIRE/SOLDER/COPPER
TRACE JUNCTION
+
LTC1050 OUTPUT
–
1050 F02
Figure 2
When connectors, switches, relays and/or sockets are
necessary they should be selected for low thermal EMF
activity. The same techniques of thermally balancing and
coupling the matching junctions are effective in reducing
the thermal EMF errors of these components.
Resistors are another source of thermal EMF errors.
Table 1 shows the thermal EMF generated for different
resistors. The temperature gradient across the resistor is
important, not the ambient temperature. There are two
junctions formed at each end of the resistor and if these
junctions are at the same temperature, their thermal
EMFs will cancel each other. The thermal EMF numbers
are approximate and vary with resistor value. High values
give higher thermal EMF.
PACKAGE-INDUCED OFFSET VOLTAGE
Package-induced thermal EMF effects are another important source of errors. It arises at the copper/kovar junctions
formed when wire or printed circuit traces contact a
package lead. Like all the previously mentioned thermal
EMF effects, it is outside the LTC1050’s offset nulling loop
and cannot be cancelled. The input offset voltage specification of the LTC1050 is actually set by the package-induced
warm-up drift rather than by the circuit itself. The thermal
time constant ranges from 0.5 to 3 minutes, depending
upon package type.
OPTIONAL EXTERNAL CLOCK
An external clock is not required for the LTC1050 to
operate. The internal clock circuit of the LTC1050 sets the
nominal sampling frequency at around 2.5kHz. This frequency is chosen such that it is high enough to remove the
amplifier 1/f noise, yet still low enough to allow internal
circuits to settle.The oscillator of the internal clock circuit
has a frequency 4 times the sampling frequency and its
output is brought out to Pin 5 through a 2k resistor. When
the LTC1050 operates without using an external clock,
Pin 5 should be left floating and capacitive loading on this
pin should be avoided. If the oscillator signal on Pin 5 is
used to drive other external circuits, a buffer with low
input capacitance is required to minimize loading on this
pin. Figure 3 illustrates the internal sampling frequency
versus capacitive loading at Pin 5.
Table 1. Resistor Thermal EMF
RESISTOR TYPE THERMAL EMF/°C GRADIENT
Tin Oxide ~mV/°C
Carbon Composition ~450µV/°C
Metal Film ~20µV/°C
Wire Wound
Evenohm ~2µV/°C
Manganin ~2µV/°C
Figure 3. Sampling Frequency vs Capacitance Loading at Pin 5
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Page 8
LTC1050
PPLICATI
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IFOR ATIO
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When an external clock is used, it is directly applied to
Pin 5. The internal oscillator signal on Pin 5 has very low
drive capability and can be overdriven by any external
signal. When the LTC1050 operates on ±5V power supplies, the external clock level is TTL compatible.
Using an external clock can affect performance of the
LTC1050. Effects of external clock frequency on input
offset voltage and input noise voltage are shown in the
Typical Performance Characteristics section. The sampling frequency is the external clock frequency divided
by 4. Input bias currents at temperatures below 100°C
are dominated by the charge injection of input switches
and they are basically proportional to the sampling
frequency. At higher temperatures, input bias currents
are mainly due to leakage currents of the input protection
devices and are insensitive to the sampling frequency.
LOW SUPPLY OPERATION
The minimum supply for proper operation of the LTC1050
is typically below 4V (±2V). In single supply applications,
PSRR is guaranteed down to 4.7V (±2.35V) to ensure
proper operation down to the minimum TTL specified
voltage of 4.75V.
PIN COMPATIBILITY
The LTC1050 is pin compatible with the 8-pin versions of
7650, 7652 and other chopper-stabilized amplifiers. The
7650 and 7652 require the use of two external capacitors
connected to Pin 1 and Pin 8 that are not needed for the
LTC1050. Pin 1 and Pin 8 of the LTC1050 are not connected internally while Pin 5 is an optional external clock
input pin. The LTC1050 can be a direct plug-in for the 7650
and 7652 even if the two capacitors are left on the circuit
board.
In applications operating from below 16V total power
supply, (±8V), the LTC1050 can replace many industry
standard operational amplifiers such as the 741, LM101,
LM108, OP07, etc. For devices like the 741 and LM101,
the removal of any connection to Pin 5 is all that is
needed.
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O
PPLICATITYPICAL
120Ω
2
3
2.5V
–
LTC1050
+
5V
SA
Strain Gauge Signal Conditioner with Bridge Excitation
2N2907
–5V
*
3
+
10k
ZERO
51Ω
2W
LTC1050
2
–
–5V
OPTIONAL REFERENCE OUT TO MONITORING
*
10-BIT A/D CONVERTER
AT GAIN = 1000, 10Hz PEAK-TO-PEAK NOISE
**
IS <0.5LSB FOR 10-BIT RESOLUTION
LT1009
5V
7
4
–5V
350Ω
BRIDGE
301k
RN60C
1N4148
2k
6
5V
7
6
4
C**
GAIN
TRIM
OUTPUT
± 2.5V
R2
0.1%
R1
0.1%
1050 TA03
8
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Page 9
LTC1050
–
+
LTC1050
7
1050 TA06
5V
TYPE K
2
LT1004-1.2
3
4
100k
1%
6
5V = NO AIR FLOW
0V = AIR FLOW
1k
AMBIENT
TEMPERATURE
STILL AIR
10k
43.2Ω
1%
240Ω
–
+
–
+
AIR FLOW
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PPLICATITYPICAL
SA
5V
2
LT1025A
GND R
45
Single Supply Thermocouple Amplifier
2
3
0.068µF
–
LTC1050
+
255k
1%
5V
7
4
1k
1%
100Ω
7
K
–
+–
0.1µF
TYPE K
0°C ~ 100°C TEMPERATURE RANGE
Battery-Operated Temperature Monitor with 10-Bit Serial Output A/D
= 9V
V
IN
LT1021C-5
0.1µF
4
6
1k
0.1%
Air Flow Detector
V
OUT
10mV/°C
1050 TA04
62
+
10µF
0.33µF
178k
0.1%
1N4148
3.4k
1%
2
V
IN
LT1025A
GND R
45
2
8
J
–
TYPE J
+–
0°C ~ 500°C TEMPERATURE RANGE
2°C MAX ERROR
*THERMOCOUPLE LINEARIZATION CODE AVAILABLE FROM LTC
3
1µF
–
LTC1050
+
7
4
47Ω
6
1µF
1
2
3
4
LTC1092
CS
+IN
–IN
GND
V
CLK
D
OUT
V
REF
1050 TA05
8
CC
TO µP*
7
6
5
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Page 10
LTC1050
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PPLICATITYPICAL
SA
INPUT
10k
1%
Fast Precision Inverter
10k
100pF
5V
10k
2
3
7
–
LTC1050
+
–5V
FULL POWER BANDWIDTH = 2MHz
SLEW RATE ≥ 40V/µs
SETTLING TIME = 5µs TO 0.01% (10V STEP)
OFFSET VOLTAGE = 5µV
OFFSET DRIFT = 50nV/°C
6
4
1000pF
2
3
10k
10k
V
IN
–
+
10k
5pF
5V
LT318A
–5V
7
6
4
OUTPUT
1050 TA07
Ground Referred Precision Current Sources
±100mA Output Drive
5V
2
3
7
–
LTC1050
+
4
–5V
FULL POWER BANDWIDTH = 10kHz
= 5µV
V
OS
/∆T = 50nV/°C
V
OS
GAIN = 10
100pF
6
5V
LT1010
–5V
100k
V
OUT
R
L
1050 TA08
±100mA
10k
2
3
–
LTC1050
+
+
V
7
4
LT1034
2N2222
6
0 ≤ I
≤ 25mA*
OUT
1.235V
R
SET
≤ (V+) – 2V
OUT
0.2V ≤ V
*MAXIMUM CURRENT LIMITED BY
POWER DISSIPATION OF 2N2222
R
SET
I
=
OUT
+
V
OUT
–
10k
3
2
+
LTC1050
–
+
V
OUT
–
7
6
4
2N2907
–
LT1034
V
1.235V
I
=
OUT
R
SET
R
SET
0 ≤ I
≤ 25mA*
OUT
–
) + 2V ≤ V
(V
*MAXIMUM CURRENT LIMITED BY
POWER DISSIPATION OF 2N2907
OUT
≤ –1.8V
1050 TA09
1050fb
10
Page 11
LTC1050
–
+
7 8
13
14
16
17
11
LTC1043
C1
1µF
C2
1µF
FOR VS = ±5V, (V–) + 1.8V < VIN < V
+
V
OUT
= –VIN ±20ppm
MATCHING BETWEEN C1 AND C2 NOT REQUIRED
12
0.01µF
1050 TA12
V
OUT
V
IN
V
+
V
–
4
7
2
3
6
LTC1050
U
O
PPLICATITYPICAL
SA
Precision Voltage Controlled Current Source
with Ground Referred Input and Output
5V
INPUT
0V TO
3.2V
3
+
LTC1050
2
–
1k
8 7
1µF
14
17
7
4
0.68µF
5V
4
LTC1043
11
12
0.001µF
1µF
1050 TA10
6
2N2222
100Ω
13
V
IN
I
=
16
OUT
100Ω
SAMPLE HOLD
Sample-and-Hold Amplifier
LTC1043
6 5
NC
2
16
FOR 1V ≤ V
ACQUISTION TIME IS DETERMINED BY THE SWITCH R
TIME CONSTANT
C
L
17
V
IN
≤ 4V, THE HOLD STEP IS ≤300µV.
IN
2
3
C
L
0.01µF
–
LTC1050
+
Ultraprecision Voltage Inverter
6
V
OUT
1050 TA11
.
ON
1050fb
11
Page 12
LTC1050
U
O
PPLICATITYPICAL
SA
Instrumentation Amplifier with Low Offset and Input Bias Current
C
2
–
LTC1050
3
+
–
INPUT
3
+
+
LTC1050
2
–
OFFSET VOLTAGE ≤ ±10µV
INPUT BIAS CURRENT = 15pA
CMRR = 100dB FOR GAIN = 100
INPUT REFERRED NOISE = 5µV
6
6
0.1%
0.1%
1050 TA13
= 20µV
1k
1k
FOR C = 0.1µF
P-P
FOR C = 0.01µF
P-P
2
3
–
LTC1050
+
100k
0.1%
100k
0.1%
6
OUTPUT
Instrumentation Amplifier with 100V Common Mode Input Voltage
1k
2
3
–
LTC1050
+
1M
+
V
7
6
V
OUT
4
–
V
1050 TA14
+
1M
+
V
IN
1M
–
1k
V
2
3
OUTPUT OFFSET ≤5mV
FOR 0.1% RESISTORS, CMRR = 54dB
–
LTC1050
+
7
4
–
V
1k
6
12
Single Supply Instrumentation Amplifier
1k
+
1M
–V
IN
V
2
3
OUTPUT OFFSET ≤5mV
FOR 0.1% RESISTORS, CMRR = 54dB
–
LTC1050
+
7
4
1k
6
+V
IN
2
3
–
LTC1050
+
1M
+
V
7
6
V
OUT
4
1050 TA15
1050fb
Page 13
LTC1050
U
O
PPLICATITYPICAL
SA
5082-4204
Photodiode Amplifier
15pF
500k
5V
2
HP
3
500k
–
LTC1050
+
7
4
6 Decade Log Amplifier
6
V
OUT
1050 TA16
MAT-01MAT-01
0.0022µF
3k
2
3
–
LTC1050
+
5V
–5V
7
4
15.7k
0.1%
66
V
OUT
2M
1%
1k*
0.1%
10k
0.1%
V
IN
I
IN
ERROR REFERRED TO INPUT <1%
FOR INPUT CURRENT RANGE 1nA ~ 1mA
*TEL LAB TYPE Q81
†
CORRECTS FOR NONLINEARITIES
†
1%
†
1N4148
= –LOG = –LOG = – LOG(VIN) – 2V
V
OUT
22pF
5V
2
7
–
LTC1050
I
IN
()
1µA
3
+
4
–5V
V
IN
()
10mV
2.5M
0.1%
5V
25k
2.5V
LT1009
1050 TA17
DC Accurate, 10Hz, 7th Order Lowpass Bessel Filter
V
–8V
0.1µF
R
16k
IN
0.47µF
1N4148
C
1
2
LTC1062
3
4
R′
196k
8
7
6
5
f
CLK
2kHz
8V
0.1µF
R′
196k
C2
0.047µF
• WIDEBAND NOISE 52µV
• LINEAR PHASE
≤ ±6V
• V
IN
• CLOCK TO CUTOFF FREQUENCY RATIO = 200:1
C1
0.047µF
RMS
3
2
+
LTC1050
–
8V
–8V
7
6
V
OUT
4
1050 TA18
1050fb
13
Page 14
LTC1050
PACKAGEDESCRIPTI
0.335 – 0.370
(8.509 – 9.398)
DIA
0.305 – 0.335
(7.747 – 8.509)
0.016 – 0.021**
(0.406 – 0.533)
SEATING
PLANE
0.040
(1.016)
MAX
0.010 – 0.045*
(0.254 – 1.143)
*
LEAD DIAMETER IS UNCONTROLLED BETWEEN THE REFERENCE PLANE
AND 0.045" BELOW THE REFERENCE PLANE
**
FOR SOLDER DIP LEAD FINISH, LEAD DIAMETER IS
O
U
H Package
8-Lead TO-5 Metal Can (.200 Inch PCD)
(Reference LTC DWG # 05-08-1320)
45°TYP
0.050
(1.270)
MAX
(4.191 – 4.699)
GAUGE
PLANE
(12.700 – 19.050)
0.016 – 0.024
(0.406 – 0.610)
0.165 – 0.185
0.500 – 0.750
REFERENCE
PLANE
0.028 – 0.034
(0.711 – 0.864)
0.110 – 0.160
(2.794 – 4.064)
INSULATING
STANDOFF
0.027 – 0.045
(0.686 – 1.143)
PIN 1
H8(TO-5) 0.200 PCD 1197
0.200
(5.080)
TYP
CORNER LEADS OPTION
0.300 BSC
(0.762 BSC)
0.008 – 0.018
(0.203 – 0.457)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
0.045 – 0.068
(1.143 – 1.727)
FULL LEAD
OPTION
0° – 15°
0.045 – 0.065
(1.143 – 1.651)
0.014 – 0.026
(0.360 – 0.660)
J8 Package
8-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
(4 PLCS)
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
OPTION
0.015 – 0.060
(0.381 – 1.524)
0.100
(2.54)
BSC
0.200
(5.080)
MAX
0.125
3.175
MIN
0.005
(0.127)
MIN
0.025
(0.635)
RAD TYP
0.405
(10.287)
MAX
87
12
65
3
4
0.220 – 0.310
(5.588 – 7.874)
J8 1298
14
OBSOLETE PACKAGES
1050fb
Page 15
PACKAGEDESCRIPTI
0.300 – 0.325
(7.620 – 8.255)
O
U
N8 Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
0.045 – 0.065
(1.143 – 1.651)
0.130 ± 0.005
(3.302 ± 0.127)
0.400*
(10.160)
MAX
87 6
LTC1050
5
0.065
(1.651)
0.009 – 0.015
(0.229 – 0.381)
+0.035
0.325
–0.015
+0.889
8.255
()
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
0.300 – 0.325
(7.620 – 8.255)
0.009 – 0.015
(0.229 – 0.381)
+0.035
0.325
–0.015
+0.889
8.255
()
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
0.020
(0.508)
MIN
0.130 ± 0.005
(3.302 ± 0.127)
0.125
(3.175)
MIN
TYP
0.005
(0.125)
MIN
0.100
(2.54)
BSC
0.125
0.020
(3.175)
MIN
(0.508)
0.018 ± 0.003
(0.457 ± 0.076)
MIN
N Package
14-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
0.045 – 0.065
(1.143 – 1.651)
0.065
(1.651)
TYP
0.018 ± 0.003
0.100
(2.54)
BSC
(0.457 ± 0.076)
0.255 ± 0.015*
(6.477 ± 0.381)
0.255 ± 0.015*
(6.477 ± 0.381)
12
14
4
3
N8 1098
0.770*
(19.558)
MAX
11
1213
31
2
5
4
8910
7
6
N14 1098
8-Lead Plastic Small Outline (Narrow .150 Inch)
0.010 – 0.020
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
× 45°
0.016 – 0.050
(0.406 – 1.270)
0.053 – 0.069
(1.346 – 1.752)
0°– 8° TYP
0.014 – 0.019
(0.355 – 0.483)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
S8 Package
(Reference LTC DWG # 05-08-1610)
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
TYP
BSC
0.228 – 0.244
(5.791 – 6.197)
0.189 – 0.197*
(4.801 – 5.004)
8
1
7
2
5
6
0.150 – 0.157**
(3.810 – 3.988)
SO8 1298
3
4
1050fb
15
Page 16
LTC1050
U
O
PPLICATITYPICAL
SA
DC Accurate 10th Order Max Flat Lowpass Filter
Q = 0.707, f
0.12R
V
IN
• f
CUTOFF
• RC =
• 60dB/OCT. SLOPE
• PASSBAND ERROR <0.1dB FOR 0 ≤ f ≤ 0.67f
• THD = 0.04%, WIDEBAND NOISE = 120µV
• f
CLK
R
0.1µF 0.1µF
f
CLK
= 0.9
()
100
0.2244
f
CUTOFF
≅ 100kHz
C
C
1
2
3
4
LTC1062
RMS
8
7
6
5
CUTOFF
2
–
3
+
DC Accurate, Noninverting 2nd Order Lowpass Filter
R4
5V
R3
2
R1
V
IN
= 20Hz. FOR fC = 10Hz, THE RESISTOR (R1, R2) VALUES SHOULD BE DOUBLED
C
COMPONENT VALUES
DC GAIN
1
2
4
6
8
10
R3
∞
10k
10.5k
10.2k
10.2k
10.1k
R2
3
R4
0
10k
31.6k
51.1k
71.5k
90.9k
C2
R1
32.4k
11.8k
18.7k
14k
11.8k
10.5k
C1
–
LTC1050
+
–5V
R2
18.7k
24.3k
34.8k
46.4k
54.9k
61.9k
7
4
C1
0.47µF
0.47µF
0.22µF
0.22µF
0.22µF
0.22µF
6
1050 TA20
C2
0.22µF
0.47µF
0.47µF
0.47µF
0.47µF
0.47µF
V
OUT
5V
LTC1050
–5V
5V–5V
7
4
R
6
C
–5V
1
2
3
4
LTC1062
8
7
6
5
V
OUT
(DC ACCURATE)
5V
f
CLK
1050 TA19
Gain of 1, 10Hz 3rd Order Bessel DC Accurate Lowpass Filter
5V
R3
5.9k
C3
2µF
R1
47.5k
R2
24.3k
C1
0.47µF
2
3
C2
0.22µF
–
LTC1050
+
7
4
–5V
1050 TA21
6
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LTC1051 Dual Zero-Drift Op Amp’s Dual Version of the LTC1050
LTC2050 Zero-Drift Op Amp SOT-23 Package
LTC2051 Zero-Drift Op Amp’s Dual Version of the LTC2050 in an MS8 Package
LTC2053 Zero-Drift Instrumentation Amp 110dB CMRR, MS8 Package, Gain Programmable
Linear Technology Corporation
16
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
LINEAR TE CHNO LOGY CORP O R AT IO N 1991
1050fb
LW/TP 0802 1K • PRINTED IN USA
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