Datasheet LTC1046MJ8, LTC1046IN8, LTC1046, LTC1046CS8, LTC1046CN8 Datasheet (Linear Technology)
Page 1
FEATURES
■
50mA Output Current
■
Plug-In Compatible with ICL7660/LTC1044
■
R
= 35Ω Maximum
OUT
■
300µA Maximum No Load Supply Current at 5V
■
Boost Pin (Pin 1) for Higher Switching Frequency
■
97% Minimum Open-Circuit Voltage Conversion
Efficiency
■
95% Minimum Power Conversion Efficiency
■
Wide Operating Supply Voltage Range: 1.5V to 6V
■
Easy to Use
■
Low Cost
U
APPLICATIO S
LTC1046
“Inductorless”
5V to –5V Converter
U
DESCRIPTIO
The LTC®1046 is a 50mA monolithic CMOS switched
capacitor voltage converter. It plugs in for ICL7660/
LTC1044 in 5V applications where more output current is
needed. The device is optimized to provide high current
capability for input voltages of 6V or less. It trades off
operating voltage to get higher output current. The
LTC1046 provides several voltage conversion functions:
the input voltage can be inverted (V
(V
OUT =VIN/
2) or multiplied (V
OUT
Designed to be pin-for-pin and functionally compatible
with the ICL7660 and LTC1044, the LTC1046 provides 2.5
times the output drive capability.
, LTC and LT are registered trademarks of Linear Technology Corporation.
= –VIN), divided
OUT
= ±nVIN).
■
Conversion of 5V to ±5V Supplies
■
Precise Voltage Division, V
■
Supply Splitter, V
OUT
OUT
= ±VS/2
TYPICAL APPLICATIO
Generating –5V from 5V
LTC1046
10µF
1
BOOST
2
+
+
CAP
3
GND
4
–
CAP
V
OSC
OUT
8
+
V
7
6
LV
5
= VIN/2
U
10µF
+
1046 TA01
5V INPUT
–5V INPUT
Output Voltage vs Load Current for V+ = 5V
–5
–4
ICL7660/LTC1044,
–3
–2
OUTPUT VOLTAGE (V)
–1
0
0
= 55Ω
R
OUT
R
10 20 30 40
LOAD CURRENT, IL (mA)
LTC1046,
= 27Ω
OUT
TA = 25°C
50
1046 TA02
1
Page 2
LTC1046
1
2
3
4
8
7
6
5
TOP VIEW
V
+
OSC
LV
V
OUT
BOOST
CAP
+
GND
CAP
–
J8 PACKAGE
8-LEAD CERDIP
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
WU
NUMBER
A
S
(Note 1)
W
O
LUTEXI TIS
A
WUW
U
ARB
G
Supply Voltage ....................................................... 6.5V
Input Voltage on Pins 1, 6 and 7
(Note 2) ............................ –0.3 < V
< (V+) +0.3V
IN
Current into Pin 6 .................................................. 20µA
Output Short Circuit Duration
(V+ ≤ 6V) ...............................................Continuous
Operating Temperature Range
LTC1046C .................................... 0°C ≤ TA ≤ 70°C
PACKAGE
/
O
RDER I FOR ATIO
ORDER PART
LTC1046CN8
LTC1046CS8
LTC1046IN8
LTC1046IS8
LTC1046MJ8
LTC1046I .................................–40°C ≤ TA ≤ 85°C
LTC1046M .................................... –55°C to 125°C
Storage Temperature Range ...............–65°C to +150°C
Lead Temperature (Soldering, 10 sec.).................300°C
LECTRICAL C CHARA TERIST
E
temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
I
S
+
V
+
V
R
OUT
f
OSC
P
EFF
V
OUTEFF
I
OSC
Supply Current RL = ∞, Pins 1 and 7 No Connection 165 300 165 300 µA
= ∞, Pins 1 and 7 No Connection, 35 35 µA
R
L
V+ = 3V
Minimum Supply Voltage RL = 5kΩ ● 1.5 1.5 V
L
Maximum Supply Voltage RL = 5kΩ ● 66V
H
Output Resistance V+ = 5V, IL = 50mA (Note 3) 27 35 27 35 Ω
V+ = 2V, IL = 10mA ● 60 85 60 90 Ω
Oscillator Frequency V+ = 5V (Note 4) 20 30 20 30 kHz
V+ = 2V 4 5.5 4 5.5 kHz
Power Efficiency RL = 2.4kΩ 95 97 95 97 %
Voltage Conversion RL = ∞ 97 99.9 97 99.9 %
Efficiency
Oscillator Sink or Source V
Current Pin 1 = 0V ● 4.2 35 4.2 40 µA
= 0V or V
OSC
Pin 1 = V
ICS
+
+
The ● denotes the specifications which apply over the full operating
T
= 160°C, θJA = 100°C (J8)
JMAX
= 110°C, θJA = 130°C (N8)
T
JMAX
T
= 150°C, θJA = 150°C (S8)
JMAX
= 0pF, unless otherwise noted.
OSC
LTC1046C LTC1046I/M
● 27 45 27 50 Ω
● 15 45 15 50 µA
S8 PART MARKING
1046
1046I
U
Note 1: Absolute Maximum Ratings are those values beyond which
the life of the device may be impaired.
Note 2: Connecting any input terminal to voltages greater than V
less than ground may cause destructive latch-up. It is recommended
that no inputs from sources operating from external supplies be
applied prior to power-up of the LTC1046.
2
Note 3: R
+
or
Note 4: f
fixture capacitance loading. The 0pF frequency is correlated to this 100pF
test point, and is intended to simulate the capacitance at pin 7 when the
device is plugged into a test socket and no external capacitor is used.
is measured at TJ = 25°C immediately after power-on.
OUT
is tested with C
OSC
= 100pF to minimize the effects of test
OSC
Page 3
UW
LPER
R
F
O
ATYPICA
Output Resistance vs Output Resistance vs Output Resistance vs
Oscillator Frequency Supply Voltage Temperature
500
400
(Ω)
O
300
200
C1 = C2
= 100µF
100
OUTPUT RESISTANCE, R
C1 = C2
= 10µF
TA = 25°C
+
V
= 10mA
I
L
C1 = C2
= 1µF
= 5V
CCHARA TERIST
E
C
1000
TA = 25°C
= 3mA
I
L
(Ω)
O
100
C
OUTPUT RESISTANCE, R
OSC
= 0pF
ICS
(Using Test Circuit in Figure 1)
80
C1 = C2 = 10µF
70
60
V+ = 2V, C
C
= 100pF
OSC
50
40
30
OUTPUT RESISTANCE (Ω)
20
= 0pF
OSC
V+ = 5V, C
LTC1046
= 0pF
OSC
0
100
1k 10k 100k
OSCILLATOR FREQUENCY, f
OSC
(Hz)
1046 G01
10
134
0
2567
SUPPLY VOLTAGE, V+ (V)
1046 G02
10
–25 0 75
–55
AMBIENT TEMPERATURE (°C)
25 50 100 125
Power Conversion Efficiency vs Power Conversion Efficiency vs Power Conversion Efficiency vs
Load Current for V+ = 2V Load Current for V+ = 5V Oscillator Frequency
100
(%)
90
EFF
80
70
60
50
40
30
20
10
POWER CONVERSION EFFICIENCY, P
0
12 5
0
34 67
LOAD CURRENT, IL (mA)
P
EFF
I
S
TA = 25°C
+
= 2V
V
C1 = C2 = 10µF
= 8kHz
f
OSC
8910
1046 G04
100
10
(%)
9
8
7
6
5
4
3
2
1
0
90
EFF
80
SUPPLY CURRENT (mA)
70
60
50
40
30
20
10
POWER CONVERSION EFFICIENCY, P
0
10 20 50
0
P
EFF
I
S
TA = 25°C
+
= 5V
V
C1 = C2 = 10µF
f
OSC
30 40 60 70
LOAD CURRENT, IL (mA)
= 30kHz
100
90
80
70
60
50
40
30
20
10
0
1046 G05
100
(%)
98
EFF
SUPPLY CURRENT (mA)
POWER CONVERSION EFFICIENCY, P
A
96
94
92
90
88
86
84
82
80
C
100
1k 10k 100k 1M
OSCILLATOR FREQUENCY, f
B
E
D
A = 100µF, 1mA
B = 100µF, 15mA
C = 10µF, 1mA
D = 10µF, 15mA
E = 1µF, 1mA
F = 1µF, 15mA
Output Voltage vs Load Current Output Voltage vs Load Current Oscillator Frequency as a
for V+ = 2V for V+ = 5V Function of C
2.5
TA = 25°C
+
2.0
= 2V
V
= 8kHz
f
OSC
1.5
C1 = C2 = 10µF
1.0
0.5
0.0
–0.5
–1.0
OUTPUT VOLTAGE (V)
–1.5
–2.0
–2.5
2
0
4
LOAD CURRENT, IL (mA)
SLOPE = 52Ω
10 12 14 16 18 20
6
8
1046 G07
5
TA = 25°C
+
4
= 5V
V
= 30kHz
f
OSC
3
C1 = C2 = 10µF
2
1
0
–1
–2
OUTPUT VOLTAGE (V)
–3
–4
–5
0
10 20 30 40
LOAD CURRENT, IL (mA)
SLOPE = 27Ω
50 60 70 80 90 100
1046 G08
100
(kHz)
OSC
10
1
OSCILLATOR FREQUENCY, f
0.1
1
EXTERNAL CAPACITOR (PIN 7 TO GND), C
OSC
PIN 1 = V
PIN 1 = OPEN
10 100 10000
F
OSC
1000
1046 G03
V+ = 5V
= 25°C
T
A
C1 = C2
(Hz)
1046 G06
V+ = 5V
= 25°C
T
A
+
OSC
1046 G09
(pF)
3
Page 4
LTC1046
LPER
100
(kHz)
OSC
UW
R
F
O
ATYPICA
Oscillator Frequency as a Oscillator Frequency vs
Function of Supply Voltage Temperature
TA = 25°C
= 0pF
C
OSC
CCHARA TERIST
E
C
ICS
(Using Test Circuit in Figure 1)
40
38
(kHz)
OSC
36
V+ = 5V
C
OSC
= 0pF
10
OSCILLATOR FREQUENCY, f
1
0
1457
AMBIENT TEMPERATURE (°C)
TEST CIRCUIT
23 6
1046 G10
1
2
+
10µF
C1
3
4
LTC1046
BOOST
CAP
GND
CAP
34
32
30
28
OSCILLATOR FREQUENCY, f
26
–25 0 75
–55
V+ (5V)
8
+
V
V
OSC
OUT
7
6
LV
5
+
–
EXTERNAL
OSCILLATOR
C
OSC
R
L
25 50 100 125
AMBIENT TEMPERATURE (°C)
I
S
I
L
V
OUT
C2
10µF
+
1046 F01
1046 G11
Figure 1
PPLICATI
A
U
O
S
I FOR ATIO
WU
U
Theory of Operation
To understand the theory of operation of the LTC1046, a
review of a basic switched capacitor building block is
helpful.
In Figure 2, when the switch is in the left position, capacitor
C1 will charge to voltage V1. The total charge on C1 will be
q1 = C1V1. The switch then moves to the right, discharging C1 to voltage V2. After this discharge time, the charge
on C1 is q2 = C1V2. Note that charge has been transferred
from the source, V1, to the output, V2. The amount of
charge transferred is:
∆ q = q1 – q2 = C1(V1 – V2).
4
If the switch is cycled “f” times per second, the charge
transfer per unit time (i.e., current) is:
I = f • ∆q = f • C1(V1 – V2).
V2V1
f
R
C1
Figure 2. Switched Capacitor Building Block
L
C2
1046 F02
Page 5
LTC1046
PPLICATI
A
U
O
S
I FOR ATIO
WU
U
Rewriting in terms of voltage and impedance equivalence,
VV
12–
VV
12
I
=
fC
11
/
()
A new variable, R
R
= 1/fC1. Thus, the equivalent circuit for the switched
EQUIV
=
–
.
R
EQUIV
, has been defined such that
EQUIV
capacitor network is as shown in Figure 3.
R
EQUIV
1
R
=
EQUIV
fC1
Figure 3. Switched Capacitor Equivalent Circuit
C2
R
L
1046 F03
V2V1
Examination of Figure 4 shows that the LTC1046 has the
same switching action as the basic switched capacitor
building block. With the addition of finite switch ON
resistance and output voltage ripple, the simple theory,
although not exact, provides an intuitive feel for how the
device works.
+
V
BOOST
3x
(1)
OSC
(7)
(8)
φ
OSC +2
φ
SW1 SW2
CAP
+
CAP
+
(2)
C1
–
(4)
V
OUT
(5)
As frequency is decreased, the output impedance will
eventually be dominated by the 1/fC1 term and power
efficiency will drop. The typical curves for power efficiency versus frequency show this effect for various capacitor values.
Note also that power efficiency decreases as frequency
goes up. This is caused by internal switching losses which
occur due to some finite charge being lost on each
switching cycle. This charge loss per unit cycle, when
multiplied by the switching frequency, becomes a current
loss. At high frequency this loss becomes significant and
the power efficiency starts to decrease.
LV (Pin 6)
The internal logic of the LTC1046 runs between V+ and LV
(Pin 6). For V+ greater than or equal to 3V, an internal
switch shorts LV to GND (Pin 3). For V+ less than 3V, the
LV pin should be tied to ground. For V+ greater than or
equal to 3V, the LV pin can be tied to ground or left floating.
OSC (Pin 7) and BOOST (Pin 1)
The switching frequency can be raised, lowered or driven
from an external source. Figure 5 shows a functional
diagram of the oscillator circuit.
+
V
I2I
C2
+
LV
(6)
Figure 4. LTC1046 Switched Capacitor
Voltage Converter Block Diagram
CLOSED WHEN
+
V
> 3.0V
GND
(3)
1046 F04
For example, if you examine power conversion efficiency
as a function of frequency (see typical curve), this simple
theory will explain how the LTC1046 behaves. The loss,
and hence the efficiency, is set by the output impedance.
BOOST
(1)
LV
(6)
I2I
1046 F05
Figure 5. Oscillator
OSC
(7)
∼14pF
SCHMITT
TRIGGER
5
Page 6
LTC1046
PPLICATI
A
U
O
S
I FOR ATIO
WU
U
By connecting the BOOST (Pin 1) to V+, the charge and
discharge current is increased and, hence, the frequency
is increased by approximately three times. Increasing the
frequency will decrease output impedance and ripple for
higher load currents.
Loading Pin 7 with more capacitance will lower the frequency. Using the BOOST pin in conjunction with external
capacitance on Pin 7 allows user selection of the frequency over a wide range.
Driving the LTC1046 from an external frequency source
can be easily achieved by driving Pin 7 and leaving the
BOOST pin open, as shown in Figure 6. The output current
from Pin 7 is small, typically 15µA, so a logic gate is
capable of driving this current. The choice of using a CMOS
logic gate is best because it can operate over a wide supply
voltage range (3V to 15V) and has enough voltage swing
to drive the internal Schmitt trigger shown in Figure 5. For
5V applications, a TTL logic gate can be used by simply
adding an external pull-up resistor (see Figure 6).
Capacitor Selection
While the exact values of CIN and C
are noncritical,
OUT
good quality, low ESR capacitors such as solid tantalum
are necessary to minimize voltage losses at high currents.
For CIN the effect of the ESR of the capacitor will be
multiplied by four, due to the fact that switch currents are
approximately two times higher than output current, and
losses will occur on both the charge and discharge cycle.
This means that using a capacitor with 1Ω of ESR for C
IN
will have the same effect as increasing the output impedance of the LTC1046 by 4Ω. This represents a significant
increase in the voltage losses. For C
is less dramatic. C
is alternately charged and dis-
OUT
the effect of ESR
OUT
charged at a current approximately equal to the output
current, and the ESR of the capacitor will cause a step
function to occur, in the output ripple, at the switch
transitions. This step function will degrade the output
regulation for changes in output load current, and should
be avoided. Realizing that large value tantalum capacitors
can be expensive, a technique that can be used is to
parallel a smaller tantalum capacitor with a large aluminum electrolytic capacitor to gain both low ESR and
reasonable cost. Where physical size is a concern some
of the newer chip type surface mount tantalum capacitors
can be used. These capacitors are normally rated at
working voltages in the 10V to 20V range and exhibit very
low ESR (in the range of 0.1Ω).
6
–(V+)
+
V
OSC INPUT
1046 F06
REQUIRED FOR TTL LOGIC
LTC1046
1
NC
BOOST
2
+
+
C1
CAP
3
GND
4
–
CAP
Figure 6. External Clocking
V
V
OSC
OUT
8
+
7
6
LV
5
100k
+
C2
Page 7
LTC1046
1
2
3
4
8
7
6
5
V
+
OSC
LV
V
OUT
BOOST
CAP
+
GND
CAP
–
LTC1046
10µF10µF
V
D
V
D
+
+
1046 F08
V
+
1.5V TO 6V
V
OUT
= 2
(V
IN
–1)
REQUIRED
FOR
V
+
< 3V
+ +
U
O
PPLICATITYPICAL
SA
Negative Voltage Converter
Figure 7 shows a typical connection which will provide a
negative supply from an available positive supply. This
circuit operates over full temperature and power supply
ranges without the need of any external diodes. The LV pin
(Pin 6) is shown grounded, but for V+ ≥ 3V, it may be
floated, since LV is internally switched to GND (Pin 3) for
V+ ≥ 3V.
The output voltage (Pin 5) characteristics of the circuit are
those of a nearly ideal voltage source in series with an 27Ω
resistor. The 27Ω output impedance is composed of two
terms: 1) the equivalent switched capacitor resistance
(see Theory of Operation), and 2) a term related to the ON
resistance of the MOS switches.
At an oscillator frequency of 30kHz and C1 = 10µF, the first
term is:
R=
EQUIV
36
15 10 10 10
•
••
1
f/2
()
OSC
1
=
C1
•
67
Ω.
=
–
.
the typical curves of output impedance and power efficiency versus frequency. For C1 = C2 = 10µF, the output
impedance goes from 27Ω at f
f
= 1kHz. As the 1/fC term becomes large compared to
OSC
= 30kHz to 225Ω at
OSC
switch ON resistance term, the output resistance is determined by 1/fC only.
Voltage Doubling
Figure 8 shows a two diode, capacitive voltage doubler.
With a 5V input, the output is 9.1V with no load and 8.2V
with a 10mA load.
Figure 8. Voltage Doubler
Ultraprecision Voltage Divider
Notice that the equation for R
is not a capacitive
EQUIV
reactance equation (XC = 1/ωC) and does not contain a 2π
term.
The exact expression for output impedance is complex,
but the dominant effect of the capacitor is clearly shown on
LTC1046
10µF
1
BOOST
2
+
+
CAP
3
GND
4
–
CAP
T
MIN
V
OSC
LV
V
OUT
≤ TA ≤ T
8
+
7
6
REQUIRED FOR V+ < 3V
5
MAX
Figure 7. Negative Voltage Converter
10µF
+
1046 F07
+
V
1.5V TO 6V
V
= –V
OUT
An ultraprecision voltage divider is shown in Figure 9. To
achieve the 0.0002% accuracy indicated, the load current
should be kept below 100nA. However, with a slight loss
in accuracy, the load current can be increased.
LTC1046
1
BOOST
2
+
C1
10µF
+
+
V
±0.002%
2
≤ TA ≤ T
T
MIN
IL ≤ 100nA
MAX
CAP
3
GND
4
CAP
+
C2
10µF
+
OSC
–
V
OUT
+
V
LV
REQUIRED FOR V
Figure 9. Ultraprecision Voltage Divider
+
8
V
3V TO 12V
7
6
5
1046 F09
+
< 6V
7
Page 8
LTC1046
U
O
PPLICATITYPICAL
SA
Battery Splitter
A common need in many systems is to obtain positive and
negative supplies from a single battery or single power
supply system. Where current requirements are small, the
circuit shown in Figure 10 is a simple solution. It provides
symmetrical positive or negative output voltages, both
LTC1046
1
V
B
9V
10µF
3V ≤ V
+
C1
≤ 12V
B
2
3
4
BOOST
CAP
GND
CAP
+
–
Figure 10. Battery Splitter
OSC
V
OUT
8
+
V
7
6
LV
5
+VB/2
4.5V
REQUIRED FOR V
/2
–V
B
–4.5V
C2
+
10µF
OUTPUT COMM0N
1046 F10
B
< 6V
equal to one half the input voltage. The output voltages are
both referenced to Pin 3 (output common). If the input
voltage between Pin 8 and Pin 5 is less than 6V, Pin 6
should also be connected to Pin 3, as shown by the
dashed line.
Paralleling for Lower Output Resistance
Additional flexibility of the LTC1046 is shown in Figures 11
and 12. Figure 11 shows two LTC1046s connected in
parallel to provide a lower effective output resistance. If,
however, the output resistance is dominated by 1/fC1,
increasing the capacitor size (C1) or increasing the frequency will be of more benefit than the paralleling
circuit shown.
Figure 12 makes use of “stacking” two LTC1046s to
provide even higher voltages. In Figure 12, a negative
voltage doubler or tripler can be achieved depending upon
how Pin 8 of the second LTC1046 is connected, as shown
schematically by the switch.
10µF
10µF
+
C2
20µF
+
1046 F11
V
V
OUT
= –(V+)
LTC1046
1
BOOST
2
+
+
C1
CAP
3
GND
4
–
CAP
V
OSC
OUT
8
+
V
7
6
LV
5
10µF
+
C1
LTC1046
1
BOOST
2
+
CAP
3
GND
4
–
CAP
1/4 CD4077
OPTIONAL SYNCHRONIZATION
CIRCUIT TO MINIMIZE RIPPLE
V
OSC
OUT
8
+
V
7
6
LV
5
Figure 11. Paralleling for 100mA Load Current
= –3V
OUT
LTC1046
+
–
V
OSC
OUT
+
8
+
V
7
6
LV
5
C1
10µF
FOR V
1
BOOST
+
2
CAP
3
GND
4
CAP
+
V
LTC1046
1
BOOST
2
+
+
CAP
3
GND
4
–
CAP
V
V
OSC
LV
OUT
8
+
7
6
5
–(V
+
)
++
FOR V
10µF10µF
1046 F12
OUT
V
OUT
= –2V
+
8
Figure 12. Stacking for Higher Voltage
Page 9
PACKAGEDESCRIPTI
U
O
Dimensions in inches (milimeters) unless otherwise noted.
J8 Package
8-Lead CERDIP (Narrow 0.300, Hermetic)
(LTC DWG # 05-08-1110)
LTC1046
CORNER LEADS OPTION
(4 PLCS)
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
0.045 – 0.068
(1.143 – 1.727)
FULL LEAD
OPTION
0.300 BSC
(0.762 BSC)
0.008 – 0.018
(0.203 – 0.457)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
0° – 15°
OPTION
0.005
(0.127)
MIN
0.025
(0.635)
RAD TYP
0.045 – 0.065
(1.143 – 1.651)
0.014 – 0.026
(0.360 – 0.660)
0.405
(10.287)
MAX
87
12
65
3
4
0.220 – 0.310
(5.588 – 7.874)
0.015 – 0.060
(0.381 – 1.524)
0.100
(2.54)
BSC
0.200
(5.080)
MAX
0.125
3.175
MIN
J8 1298
9
Page 10
LTC1046
PACKAGEDESCRIPTI
O
U
Dimensions in inches (milimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400*
(10.160)
MAX
876
0.255 ± 0.015*
(6.477 ± 0.381)
5
12
0.300 – 0.325
(7.620 – 8.255)
0.065
(1.651)
0.009 – 0.015
(0.229 – 0.381)
+0.035
0.325
–0.015
+0.889
8.255
()
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
TYP
0.045 – 0.065
(1.143 – 1.651)
0.100
(2.54)
BSC
3
4
0.130 ± 0.005
(3.302 ± 0.127)
0.125
(3.175)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
0.020
(0.508)
MIN
N8 1098
10
Page 11
PACKAGEDESCRIPTI
U
O
Dimensions in inches (milimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
8
0.189 – 0.197*
(4.801 – 5.004)
7
6
LTC1046
5
0.228 – 0.244
(5.791 – 6.197)
0.010 – 0.020
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
×
°
45
0.016 – 0.050
(0.406 – 1.270)
0°– 8° TYP
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
TYP
0.150 – 0.157**
(3.810 – 3.988)
1
3
2
4
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
SO8 1298
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
Page 12
LTC1046
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LTC1044A 12V CMOS Voltage Converter Doubler or Inverter, 20mA I
LT®1054 Switched Capacitor Voltage Converter with Regulator Doubler or Inverter, 100mA I
LTC1550 Low Noise, Switched Capacitor Regulated Inverter < 1mV
LT1611 1.4MHz Inverting Switching Regulator 5V to –5V at 150mA, Low Output Noise, SOT-23 Package
LT1617 Micropower Inverting Switching Regulator 5V to –5V at 20µA Supply Current, SOT-23 Package
LTC1754-5 Micropower Regulated 5V Charge Pump in SOT-23 5V/50mA, 13µA Supply Current, 2.7V to 5.5V Input Range
Output Ripple, 900kHz Operation, SO-8 Package
P-P
, 1.5V to 12V Input Range
OUT
, SO-8 Package
OUT
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear-tech.com
1046fa LT/TP 1099 2K REV A • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1991
Loading...