Datasheet LT6552IS8, LT6552IDD, LT6552CS8, LT6552CDD Datasheet (Linear Technology)

LT6552

Final Electrical Specifications

3.3V Single Supply

Video Difference Amplifier

FEATURES

■

Differential or Single-Ended Gain Block

■

Wide Supply Range 3V to 12.6V

■

Output Swings Rail-to-Rail

■

Input Common Mode Range Includes Ground

■

600V/µs Slew Rate

■

–3dB Bandwidth = 75MHz, AV = ±2

■

CMRR at 10MHz: >60dB

■

Output Swings Rail-to-Rail

■

Specified on 3.3V, 5V and ±5V Supplies

■

High Output Drive: ±70mA

■

Power Shutdown to 300µA

■

Operating Temperature Range: –40°C to 85°C

■

Tiny 3mm x 3mm x 1mm DFN Package

U

APPLICATIO S

■

Differential to Single-Ended Conversion

■

Video Line Driver

■

Automotive Displays

■

RGB Amplifiers

■

Coaxial Cable Drivers

■

Low Voltage High Speed Signal Processing

U

July 2003

DESCRIPTIO

The LT®6552 is a video difference amplifier optimized for
low voltage single supply operation. This versatile ampli­fier features uncommitted high input impedance (+) and
(–) inputs and can be used in differential or single-ended
configurations. A second set of inputs gives gain adjust­ment and DC control to the differential amplifier.

On a single 3.3V supply, the input voltage range extends
from ground to 1.3V and the output can swing to within
400mV of the supply voltage while driving a 150Ω load.
The LT6552 features 75MHz – 3dB bandwidth, 600V/µs
slew rate, and ±70mA output current making it ideal for
driving cables directly. The LT6552 maintains its perfor­mance for supplies from 3V to 12.6V and is fully specified
at 3.3V, 5V and ±5V supplies. The shutdown feature
reduces power dissipation to less than 1mW and allows
multiple amplifiers to drive the same cable.

The LT6552 is available in the 8-pin SO package as well as
a tiny, dual fine pitch leadless package (DFN). The device
is specified over the commercial and industrial tempera­ture range.

, LTC and LT are registered trademarks of Linear Technology Corporation.

TYPICAL APPLICATIO

Cable Sense Amplifier for Loop Through
Connections with DC Adjust

V

IN

3

500Ω

2
1

8

R

G

CABLE

V

= 0.25V

DC

U

Input Referred CMRR vs Frequency

100

VS = 5V, 0V

90

5V

7

+
–

LT6552

REF
FB

4

R

500Ω

C

8pF

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

75Ω

6

F

F

V

75Ω

6552 TA01a

OUT

80

70

60

50

40

30

20

COMMON MODE REJECTION RATIO (dB)

10

100k

VCM = 0V

1 10 100

FREQUENCY (MHz)

6552 TA01b

6552i

1

LT6552

WW

W

ABSOLUTE AXI U RATI GS

U

(Note 1)

Supply Voltage (V+ to V–) .................................... 12.6V

Input Current (Note 2) ........................................ ±10mA

Input Voltage Range .................................................±V

Differential Input Voltage

+Input (Pin 3) to –Input (Pin 2)................................±V

Output Short-Circuit Duration (Note 3)............ Indefinite

UUW

PACKAGE/ORDER I FOR ATIO

TOP VIEW

FB

1REF

–IN

2

+IN

3

–

V

4

8-LEAD (3mm × 3mm) PLASTIC DFN

T

DD PACKAGE

= 125°C, θJA = 160°C/W (NOTE 3)

JMAX

UNDERSIDE METAL INTERNALLY

CONNECTED TO V

(PCB CONNECTION OPTIONAL)

8

+

V

7

OUT

6

SHDN

5

–

ORDER PART

NUMBER

LT6552CDD
LT6552IDD

DD PART MARKING*

ADR

Operating Temperature Range (Note 4) ...–40°C to 85°C

Specified Temperature Range (Note 5)....–40°C to 85°C

Maximum Junction Temperature .......................... 150°C

S

(DD Package) ................................................... 125°C

Storage Temperature Range ..................–65°C to 150°C

S

(DD Package) ....................................–65°C to 125°C

Lead Temperature (Soldering, 10 sec).................. 300°C

ORDER PART

TOP VIEW

REF

1

–IN

2

+IN

3

–

V

4

S8 PACKAGE

8-LEAD PLASTIC SO

T

= 150°C, θJA = 100°C/W

JMAX

FB

8

+

V

7

OUT

6

SHDN

5

NUMBER

LT6552CS8
LT6552IS8

S8 PART MARKING

6552
6552I

*The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges.

3.3V ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full

operating temperature range, otherwise specifications are at TA = 25°C. VS = 3.3V, 0V. Figure 1 shows the DC test circuit,
V

= VCM = 1V, V

REF

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

∆VOS/∆T Input VOS Drift ● 40 µV/°C
I

B

I

OS

= 0V, V

DIFF

Input Offset Voltage Both Inputs (Note 7) 5 20 mV

Input Bias Current Any Input ● 25 50 µA
Input Offset Current Either Input Pair ● 15 µA

= V+, unless otherwise noted. RL = RF + RG = 1k. (Note 6)

SHDN

● 25 mV

2

6552i

LT6552

3.3V ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full

operating temperature range, otherwise specifications are at TA = 25°C. VS = 3.3V, 0V. Figure 1 shows the DC test circuit,
V

= VCM = 1V, V

REF

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

e

n

i

n

R

IN

CMRR Common Mode Rejection Ratio VCM = 0V to 1.3V ● 58 75 dB

PSRR Power Supply Rejection VS = 3V to 12V ● 48 54 dB

G

E

V

OH

V

OL

SR Slew Rate V

FPBW Full-Power Bandwidth (Note 9) VO = 2V
BW Small-Signal –3dB Bandwidth AV = 2, RL = 150Ω 65 MHz
tr, t

f

t

S

I

SC

I

S

V

L

V

H

t

ON

t

OFF

DIFF

= 0V, V

= V+, unless otherwise noted. RL = RF + RG = 1k. (Note 6)

SHDN

Input Noise Voltage Density f = 10kHz 55 nV/√Hz
Input Noise Current Density f = 10kHz 0.7 pA/√Hz
Input Resistance Common Mode, VCM = 0V to 1.3V 300 kΩ

Input Range ● 0 1.3 V

Minimum Supply (Note 8) ● 3V
Gain Error VO = 0.5V to 2V, RL = 1k ● 13 %

= 150Ω ● 13 %

R

L

Swing High (V

Swing Low (V

= 0.4V), V

DIFF

= 1k ● 3.1 3.2 V

R

L

R

= 150Ω ● 2.5 2.9 V

L

= 75Ω 2 2.5 V

R

L

= –0.1V), V

DIFF

= 1k ● 850 mV

R

L

= 5mA ● 65 120 mV

I

SINK

I

= 10mA ● 40 200 mV

SINK

= 0.5V to 2.5V Measure from 1V to 2V, 350 V/µs

OUT

= 150Ω, AV = 2

R

L

P-P

(Pin 1) = 0V, AV = 10

REF

(Pin 1) = 0V, AV = 10

REF

55 MHz

Rise Time, Fall Time (Note 10) AV =50, VO = 0.5V to 2.5V, 125 175 ns

20% to 80%, R

Settling Time to 3% AV = 2, ∆V
Settling Time to 1% R

= 150Ω 30 ns

L

= 150Ω

L

= 2V 20 ns

OUT

Differential Gain AV = 2, RL = 150Ω, Black Level = 0.6V 0.4 %
Differential Phase AV = 2, RL = 150Ω, Black Level = 0.6V 0.15 Deg
Short-Circuit Current V

OUT

= 0V, V

= 1V 35 50 mA

DIFF

● 25 mA

Supply Current 12 13.5 mA

● 15 mA

Supply Current Shutdown V

= 0.5V ● 300 750 µA

SHDN

Shutdown Pin Input Low Voltage ● 0.5 V
Shutdown Pin Input High Voltage ● 3V
Shutdown Pin Current V

Turn On-Time V
Turn Off-Time V

= 0.5V ● 40 150 µA

SHDN

V

= 3V ● 310 µA

SHDN

from 0.5V to 3V 250 ns

SHDN

from 3V to 0.5V 450 ns

SHDN

6552i

3

LT6552

5V ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, 0V; Figure 1 shows the DC test circuit,
V

= VCM = 1V, V

REF

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

∆VOS/∆T Input VOS Drift ● 40 µV/°C
I

B

I

OS

e

n

i

n

R

IN

CMRR Common Mode Rejection Ratio VCM = 0V to 3V ● 58 75 dB

PSRR Power Supply Rejection VS = 3V to 12V ● 48 54 dB

G

E

V

OH

V

OL

SR Slew Rate V

FPBW Full-Power Bandwidth (Note 9) VO = 2V
BW Small-Signal –3dB Bandwidth AV = 2, RL = 150Ω 70 MHz
tr, t

f

t

S

I

SC

I

S

V

L

V

H

DIFF

= 0V, V

= V+, unless otherwise noted. RL = RF + RG = 1k. (Note 6)

SHDN

Input Offset Voltage Both Inputs (Note 7) 5 20 mV

● 25 mV

Input Bias Current Any Input ● 25 50 uA
Input Offset Current Either Input Pair ● 15 uA
Input Noise Voltage Density f = 10kHz 55 nV/√Hz
Input Noise Current Density f = 10kHz 0.7 pA/√Hz
Input Resistance Common Mode, VCM = 0V to 3V 300 kΩ

Input Range ● 03V

Minimum Supply (Note 8) ● 3V
Gain Error VO = 0.5V to 3.5V, RL = 1k ● 13 %

= 150Ω ● 13 %

R

L

Swing High (V

Swing Low (V

= 0.6V), V

DIFF

= 1k ● 4.8 4.875 V

R

L

R

= 150Ω ● 3.6 4.3 V

L

= 75Ω, 0°C ≤ TA ≤ 70°C (Only) ● 2.75 3.4 V

R

L

= –0.1V), V

DIFF

= 1k ● 850 mV

R

L

I

= 5mA ● 65 120 mV

SINK

= 10mA ● 110 200 mV

I

SINK

= 0.5V to 3.5V

OUT

Measure from 1V to 3V, R

P-P

(Pin 1) = 0V, AV = 10

REF

(Pin 1) = 0V, AV = 10

REF

= 150Ω, AV = 2 450 V/µs

L

70 MHz

Rise Time, Fall Time 5V, 0V; AV = 50, VO = 0.5V to 3.5V, 125 175 ns

20% to 80%, R

Settling Time to 3% AV = 2, ∆V
Settling Time to 1% R

= 150Ω 30 ns

L

= 1k

L

= 2V 20 ns

OUT

Differential Gain AV = 2, RL = 150Ω, Black Level = 1V 0.25 %
Differential Phase AV = 2, RL = 150Ω, Black Level = 1V 0.04 Deg
Short-Circuit Current V

= 0V, V

OUT

0°C ≤ T
–40°C ≤ T

= 1V 50 70 mA

DIFF

≤ 70°C ● 45 mA

A

≤ 85°C ● 35 mA

A

Supply Current 13 14.5 mA

● 16 mA

Supply Current Shutdown V

= 0.5V ● 400 900 µA

SHDN

Shutdown Pin Input Low Voltage ● 0.5 V
Shutdown Pin Input High Voltage ● 4.7 V
Shutdown Pin Current V

= 0.5V ● 70 200 µA

SHDN

= 4.7V ● 410 µA

V

SHDN

4

6552i

LT6552

5V ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are at TA = 25°C. VS = 5V, 0V. Figure 1 shows the DC test circuit, V
V

DIFF

= 0V, V

= V+, unless otherwise noted. RL = RF + RG = 1k. (Note 6)

SHDN

The ● denotes the specifications which apply over the full operating

= VCM = 1V,

REF

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

t

ON

t

OFF

±5V ELECTRICAL CHARACTERISTICS

ing temperature range, otherwise specifications are at TA = 25°C. VS = ±5V. Figure 2 shows the DC test circuit, V
V

= 0V, V

DIFF

Turn-On Time V
Turn-Off Time V

= V+, unless otherwise noted. RL = RF + RG = 1k. (Note 6)

SHDN

from 0.5V to 4.7V 250 ns

SHDN

from 4.7V to 0.5V 450 ns

SHDN

The ● denotes the specifications which apply over the full operat-

= VCM = 0V,

REF

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

Input Offset Voltage Both Inputs (Note 7) 10 25 mV

● 30 mV

∆VOS/∆T Input VOS Drift ● 50 µV/°C
I

B

I

OS

e

n

i

n

R

IN

Input Bias Current Any Input ● 25 50 µA
Input Offset Current Either Input Pair ● 15 µA
Input Noise Voltage Density f = 10kHz 55 nV/√Hz
Input Noise Current Density f = 10kHz 0.7 pA/√Hz
Input Resistance Common Mode, VCM = –5V to 3V 300 kΩ

CMRR Common Mode Rejection Ratio VCM = –5V to 3V ● 58 75 dB

Input Range ● –5 3 V

PSRR Power Supply Rejection VS = ±2V to ±6V, VCM = 0V ● 48 54 dB
G

E

SR Slew Rate VCM = 0V, V

FPBW Full-Power Bandwidth VO = 6V

Gain Error VO = –3V to 3V, RL = 1k ● 13 %

= 150Ω ● 13 %

R

L

Output Voltage Swing (V

= ± 0.6V), V

DIFF

R

= 1k ● ±4.8 ±4.875 V

L

= 150Ω ● ±3.6 ±4.3 V

R

L

= 75Ω, 0°C ≤ TA ≤ 70°C (Only) ● ±2.75 ±3.4 V

R

L

V

= –5V to 5V Measure from –2V to 2V, RL = 150Ω

O

DIFF

(Note 9) 30 MHz

P-P

(Pin 1) = 0V, AV = 10

REF

= –1.5V to +1.5V, 400 600 V/µs

BW Small-Signal –3dB Bandwidth 75 MHz
tr, t
t

S

f

Rise Time, Fall Time AV = 50, VO = –3V to 3V, 20% to 80% 125 175 ns
Settling Time to 3% AV = 2, ∆V

Settling Time to 1% R

= 150Ω 35 ns

L

= 6V 25 ns

OUT

Differential Gain AV = 2, RL = 150Ω 0.2 %
Differential Phase AV = 2, RL = 150Ω 0.15 Deg

I

SC

I

S

V

L

V

H

Short-Circuit Current V

Supply Current Shutdown V

= 0V, V

OUT

0°C ≤ T
–40°C ≤ T

= –4.5V ● 650 1400 µA

SHDN

= ±1V 50 70 mA

DIFF

≤ 70°C ● 45 mA

A

≤ 85°C ● 35 mA

A

Supply Current 14 16.5 mA

● 18.5 mA

Shutdown Pin Input Low Voltage ● –4.5 V
Shutdown Pin Input High Voltage ● 4.7 V

6552i

5

LT6552

REF
–IN
+IN
V

–

FB
V

+

OUT

SHDN

+
–

+
–

+

–

+
–

+
–

V

DIFF

V

CM

V

SHDN

V

+

V

–

R

G

100Ω

0.1%

R

F

900Ω

0.1%

R

L

6552 F02

1µF

1µF

±5V ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are at TA = 25°C. VS = ±5V. Figure 2 shows the DC test circuit, V
V

DIFF

= 0V, V

= V+, unless otherwise noted. RL = RF + R6 = 1k. (Note 6)

SHDN

The ● denotes the specifications which apply over the full operating

= VCM = 0V,

REF

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Shutdown Pin Current V

t
t

ON

OFF

Turn-On Time V
Turn-Off Time V

Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.

Note 2: The inputs are protected from ESD with diodes to the supplies.
Note 3: A heat sink may be required to keep the junction temperature

below absolute maximum.
Note 4: The LT6552C/LT6552I are guaranteed functional over the

temperature range of –40°C to 85°C.
Note 5: The LT6552C is guaranteed to meet specified performance from

0°C to 70°C and is designed, characterized and expected to meet specified
performance from –40°C to 85°C, but is not tested or QA sampled at these

= –4.5V ● 85 250 µA

SHDN

= 4.7 ● 310 µA

V

SHDN

from –4.5V to 4.7V 200 ns

SHDN

from 4.7V to –4.5V 400 ns

SHDN

Note 6: When R

= 150Ω or RL = 75Ω is specified, then an additional resistor of that

R

L

= 1k is specified, the load resistor is RF + RG, but when

L

value is added to the output.
Note 7: V

measured at the output (Pin 6) is the contribution from both

OS

input pairs and is input referred.

Note 8: Minimum supply is guaranteed by the PSRR test.
Note 9: Full power bandwidth is calculated from the slew rate.

FPBW = SR/2πVp

Note 10: V

= 3.3V limits are guaranteed by correlation to VS = 5V and

S

±5V tests.

temperatures. The LT6552I is guaranteed to meet specified performance
from – 40°C to 85°C.

R

G

100Ω

0.1%

REF

DIFF

CM

–IN
+IN
V

–

V

–

+

+

+

V

REF

–

V

–

OUT

SHDN

V

SHDN

FB

+

V

+
–

1µF

R

F

900Ω

0.1%

+

+

V

–

R

L

6552 F01

Figure 1. 3.3V, 5V DC Test Circuit Figure 2. ±5V DC Test Circuit

U

WUU

APPLICATIO S I FOR ATIO

The LT6552 is a video difference amplifier with two pairs
of high impedance inputs. The primary purpose of the
LT6552 is to convert high frequency differential signals
into a single-ended output, while rejecting any common
mode noise. In the simplest configuration, one pair of
inputs are connected to the incoming differential signal,
while the other pair of inputs are used to set the amplifier
gain and DC level. The device will operate on either single
or dual supplies and has an input common mode range
which includes the negative supply. The common mode
rejection ratio is greater than 60dB at 10MHz.

Figure 3 shows the single supply connection. The ampli­fier gain is set by a feedback network from the output to
Pin 8 (FB). A DC signal applied to pin 1 (REF) establishes
the output quiescent voltage and the differential signal is
applied to Pins 2 and 3.

Figure 4 shows several other connections using dual
supplies. In each case, the amplifier gain is set by a
feedback network from the output to Pin 8 (FB).

6

6552i

LT6552

V

+

7

6

LT6552

4

1
8

V

O

+

3

–

2

V

IN

SHDN

5

VO = –

R

F

+ R

G

R

G

VO = +

R

F

+ R

G

R

G

R

F

SHDN

R

F

+ R

G

R

G

R

F

R

G

6552 F01

7

6

LT6552

4

REF

1

FB

8

V

O

+

3

–

2

5

VO =

R

F

7

6

LT6552

4

1
8

V

O

+

3

–

2

V

IN

SHDN

5

R

F

V

IN

(

(

(

(

(

(

V

INDIFF

–V

IN

V

IN

V

IN

(

(

REF
FB

REF

FB

R

G

V

INDIFF

R

G

R

G

V

+

V

+

V

–

V

–

V

–

U

WUU

APPLICATIO S I FOR ATIO

Amplifier Characteristics

Figure 5 shows a simplified schematic of the LT6552.
There are two input stages, the first one consists of
transistors Q1 to Q8 for the (+) and (–) inputs while the
second input stage consists of transistors Q9 to Q16 for
the reference and feedback inputs. This topology provides
high slew rates at low supply voltages. The input common
mode range extends from ground to typically 1.75V from
VCC, and is limited by 2 V
current sources I1-I4. Each input stage drives the degen­eration resistors of PNP and NPN current mirrors, Q17 to
Q20, that convert the differential signals into a single­ended output. The complementary drive generator sup­plies current to the output transistors that swing from rail­to-rail.

SHDN

+

V

5

V

INDIFF

3
2

1

V

IN

8

+
–

REF

FB

LT6552

7

6

4

plus a saturation voltage of

BE’s

V

O

The current generated through R1 or R2, divided by the
capacitor CM, determines the slew rate. Note that this
current, and hence the slew rate are proportional to the
magnitude of the input step. The input step equals the
output step divided by the closed loop gain. The highest
slew rates are therefore obtained in the lowest gain con­figurations.

ESD

The LT6552 has reverse-biased ESD protection diodes on
all inputs and outputs, as shown in Figure 5. If these pins
are forced beyond either supply, unlimited current will
flow through these diodes. If the current is transient in
nature and limited to 100mA or less, no damage to the
device will occur.

R

F

R

+ R

F

Q6

R

6552 F01

DESD3

DESD4

G

G

Q7

Q8

V

V

Figure 4

+

7

V

R3 R4

I4I3I2I1

Q10

Q11

Q9

Q12

+

R

IN2RIN3

2

–

–IN

REF

+

V

DESD5

DESD6

1

–

V

Figure 5. Simplified Schematic

R2

Q13

Q14

Q15

Q16

DESD7

DESD8

+

V

–

V

I5

Q21

Q18Q17

CM

COMPLEMENTARY

DRIVE GENERATOR

Q20Q19

R5 R6

I6

R

IN4

BIAS

8

FB

Q22

V

–

V

V

–

V

+

DESD9

DESD10

+

DESD11

DESD12

6

4

5

6552 TA02

OUT

–

V

SHDN

6552i

R

VO = (V

G

INDIFF

+ VIN)

Figure 3

Q2

Q3Q4Q5

R1

Q1

+

V

R

IN1

DESD1

DESD2

3

+IN

–

V

7

LT6552

PACKAGE DESCRIPTIO

U

0.675 ±0.05

DD Package

8-Lead Plastic DFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1698)

R = 0.115

TYP

0.38 ± 0.10

85

3.5 ±0.05

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

.050 BSC

.245
MIN

.030 ±.005

TYP

RECOMMENDED SOLDER PAD LAYOUT

1.65 ±0.05
(2 SIDES)2.15 ±0.05

0.28 ± 0.05

2.38 ±0.05

(2 SIDES)

.045 ±.005

.160

±.005

PIN 1

TOP MARK

0.200 REF

NOTE:

1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)

2. ALL DIMENSIONS ARE IN MILLIMETERS

3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

4. EXPOSED PAD SHALL BE SOLDER PLATED

0.50
BSC

PACKAGE
OUTLINE

S8 Package

8-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610)

.010 – .020

(0.254 – 0.508)

.008 – .010

(0.203 – 0.254)

NOTE:

1. DIMENSIONS IN

2. DRAWING NOT TO SCALE

3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

× 45°

.016 – .050

(0.406 – 1.270)

INCHES

(MILLIMETERS)

0°– 8° TYP

.053 – .069

(1.346 – 1.752)

.014 – .019

(0.355 – 0.483)

TYP

3.00 ±0.10

(4 SIDES)

0.75 ±0.05

(1.270)

0.00 – 0.05

.004 – .010

(0.101 – 0.254)

.050

BSC

SO8 0303

1.65 ± 0.10

(2 SIDES)

.228 – .244

(5.791 – 6.197)

.189 – .197

NOTE 3

7

2

6

3

14

0.50 BSC

5

4

0.28 ± 0.05

2.38 ±0.10

(2 SIDES)

BOTTOM VIEW—EXPOSED PAD

(4.801 – 5.004)

8

1

(DD8) DFN 0203

.150 – .157

(3.810 – 3.988)

NOTE 3

RELATED PARTS

PART NUMBER DESCRIPTION COMMENTS

LT1193 Av = 2 Video Difference Amp 80MHz BW, 500V/µs, Shutdown
LT1675 RGB Multiplexer with Current Feedback Amplifiers –3dB Bandwidth = 250MHz, 100MHz Pixel Switching
LT1809/LT1810 Single/Dual 180MHz, Rail-to-Rail Input and Output Amplifiers 350V/µs Slew Rate, Shutdown, Low Distortion –90dBc at 5MHz
LT6550/LT6551 3.3V Triple and Quad Video Amplifiers Internal Gain of 2, 110MHz –3dB Bandwidth,

Input Common Modes to Ground

LT/TP 0703 1K • PRINTED IN USA

8

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

[phone] ● FAX: [phone] ● www.linear.com

 LINEAR TECHNOLOGY CORPORATION 2003

6552i