Operation From 3.6V to 36V
Overvoltage Lockout Protects Circuit through
60V Transients
■
2A Maximum Output Current
■
Adjustable Switching Frequency: 200kHz to 2.4MHz
■
Low Shutdown Current: IQ < 1μA
■
Integrated Boost Diode
■
Synchronizable Between 250kHz to 2MHz
■
Power Good Flag
■
Saturating Switch Design: 0.25 On-Resistance
■
0.790V Feedback Reference Voltage
■
Output Voltage: 0.79V to 20V
■
Soft-Start Capability
■
Small 10-Pin Thermally Enhanced MSOP and
(3mm × 3mm) DFN Packages
APPLICATIONS
■
Automotive Battery Regulation
■
Set Top Box
■
Distributed Supply Regulation
■
Industrial Supplies
■
Wall Transformer Regulation
The LT®3685 is an adjustable frequency (200kHz to 2.4MHz)
monolithic step-down switching regulator that accepts
input voltages up to 38V operating and 60V maximum. An
internal overvoltage protection circuit turns off the power
switch when V
is above 38V typical (36V minimum) which
IN
then allows the part to safely withstand 60V transients. A
high effi ciency 0.25 switch is included on the die along
with a boost Schottky diode and the necessary oscillator,
control, and logic circuitry. Current mode topology is
used for fast transient response and good loop stability.
The LT3685’s high operating frequency allows the use of
small, low cost inductors and ceramic capacitors resulting in low output ripple while keeping total solution size
to a minimum. The low current shutdown mode reduces
input supply current to less than 1μA while a resistor and
capacitor on the RUN/SS pin provide a controlled output
voltage ramp (soft-start). A power good fl ag signals when
reaches 86% of the programmed output voltage. The
V
OUT
LT3685 is available in 10-Pin MSOP and 3mm × 3mm DFN
packages with exposed pads for low thermal resistance.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
Burst Mode is a registered trademark of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
TYPICAL APPLICATION
3.3V Step-Down Converter
V
IN
4.5V TO 36V
TRANSIENT
TO 60V
OFF ON
14k
4.7μF
470pF
40.2k
V
IN
RUN/SSBOOST
V
LT3685
C
R
T
PG
SYNC
GND
BD
SW
Effi ciency
V
OUT
3.3V
2A
0.47μF
4.7μH
100k
316k
22μF
3685 TA01
FB
100
90
80
70
EFFICIENCY (%)
60
50
0
0.51.01.52
LOAD CURRENT (A)
V
= 5V
OUT
V
= 3.3V
OUT
VIN = 12V
L = 5.6μH
F = 800 kHz
3685 TA01b
3685fa
1
Page 2
LT3685
ABSOLUTE MAXIMUM RATINGS
VIN, RUN/SS Voltage (Note 5) ...................................60V
BOOST Pin Voltage ...................................................56V
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based fi nish parts.
*For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The ● denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VIN = 10V, V
noted. (Note 2)
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
33.6V
363840V
0.01
450
1.3
0.5
600
1.7
μA
μA
μA
2
3685fa
Page 3
LT3685
ELECTRICAL CHARACTERISTICS
The ● denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
noted. (Note 2)
PARAMETERCONDITIONSMINTYPMAXUNITS
Quiescent Current from BDV
Minimum Bias Voltage (BD Pin)2.73V
Feedback Voltage
FB Pin Bias Current (Note 3)V
FB Voltage Line Regulation4V < V
Error Amp g
Error Amp Gain1000
Source Current45μA
V
C
Sink Current45μA
V
C
Pin to Switch Current Gain3.5A/V
V
C
Clamp Voltage2V
V
C
Switching FrequencyR
Minimum Switch Off-Time
Switch Current LimitDuty Cycle = 5%3.23.74.2A
Switch V
Boost Schottky Reverse LeakageV
Minimum Boost Voltage (Note 4)
BOOST Pin CurrentI
RUN/SS Pin Current V
RUN/SS Input Voltage High2.5V
RUN/SS Input Voltage Low0.2V
PG Threshold Offset from Feedback VoltageVFB Rising90mV
PG Hysteresis12mV
PG LeakageV
PG Sink CurrentV
SYNC Low Threshold0.5V
SYNC High Threshold0.7V
SYNC Pin Bias CurrentV
m
CESAT
= 25°C. VIN = 10V, V
A
= 0.2V
RUN/SS
V
= 3V, Not Switching
BD
V
= 0, Not Switching
BD
= 0.8V, VC = 0.4V
FB
< 36V0.0020.01%/V
IN
RUN/SS
= 10V V
= 15V, VBD = 3.3V unless otherwise
BOOST
0.01
●
0.9
1
780
775
●
●
790
790
730 nA
0.5
1.3
5
800
805
μA
mA
μA
mV
mV
500μMho
= 8.66k
T
R
= 29.4k
T
R
= 187k
T
2.1
0.9
160
●
2.4
1
200
2.7
1.15
240
MHz
MHz
kHz
60150nS
ISW = 2A500mV
= 10V, VBD = 0V0.022μA
SW
●
= 1A2235mA
SW
= 2.5V510μA
RUN/SS
= 5V0.11μA
PG
= 0.4V
PG
= 0V0.1μA
SYNC
●
100600μA
1.52.1V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3685E is guaranteed to meet performance specifi cations
from 0°C to 125°C. Specifi cations over the –40°C to 125°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LT3685I specifi cations are
guaranteed over the –40°C to 125°C temperature range.
Note 3: Bias current fl ows out of the FB pin.
Note 4: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the switch.
Note 5: Absolute Maximum Voltage at V
and RUN/SS pins is 60V for
IN
nonrepetitive 1 second transients, and 40V for continuous operation.
BD (Pin 1): This pin connects to the anode of the boost
Schottky diode. BD also supplies current to the internal
regulator.
BOOST (Pin 2): This pin is used to provide a drive
voltage, higher than the input voltage, to the internal bipolar
NPN power switch.
SW (Pin 3): The SW pin is the output of the internal power
switch. Connect this pin to the inductor, catch diode and
boost capacitor.
(Pin 4): The VIN pin supplies current to the LT3685’s
V
IN
internal regulator and to the internal power switch. This
pin must be locally bypassed.
RUN/SS (Pin 5): The RUN/SS pin is used to put the
LT3685 in shutdown mode. Tie to ground to shut down
the LT3685. Tie to 2.5V or more for normal operation. If
the shutdown feature is not used, tie this pin to the V
IN
pin. RUN/SS also provides a soft-start function; see the
Applications Information section.
SYNC (Pin 6): This is the external clock synchronization
input. Ground this pin when SYNC function is not used. Tie
to a clock source for synchronization. Clock edges should
have rise and fall times faster than 1μs. See synchronizing
section in Applications Information.
PG (Pin 7): The PG pin is the open collector output of an
internal comparator. PG remains low until the FB pin is
within 14% of the fi nal regulation voltage. PG output is
valid when V
is above 3.6V and RUN/SS is high.
IN
FB (Pin 8): The LT3685 regulates the FB pin to 0.790V.
Connect the feedback resistor divider tap to this pin.
(Pin 9): The VC pin is the output of the internal error
V
C
amplifi er. The voltage on this pin controls the peak switch
current. Tie an RC network from this pin to ground to
compensate the control loop.
(Pin 10): Oscillator Resistor Input. Connecting a resistor
R
T
to ground from this pin sets the switching frequency.
Exposed Pad (Pin 11): Ground. The Exposed Pad must
be soldered to PCB.
BLOCK DIAGRAM
V
V
IN
IN
4
C1
INTERNAL 0.79V REF
RUN/SS
5
R
T
10
R
T
SYNC
6
SOFT-START
PG
7
GND
118
–
BOOST
BD
1
2
C3
SW
3
V
C
9
L1
D1
C
C
C
F
R
C
V
OUT
C2
3685 BD
3685fa
+
SLOPE COMP
S
OSCILLATOR
200kHz–2.4MHz
ERROR AMP
+
0.7V
–
R2
+
–
FB
R1
SWITCH
LATCH
R
S
VC CLAMP
Q
7
Page 8
LT3685
OPERATION
The LT3685 is a constant frequency, current mode stepdown regulator. An oscillator, with frequency set by RT,
enables an RS fl ip-fl op, turning on the internal power
switch. An amplifi er and comparator monitor the current
fl owing between the V
off when this current reaches a level determined by the
voltage at V
voltage through an external resistor divider tied to the FB
pin and servos the V
increases, more current is delivered to the output; if it
decreases, less current is delivered. An active clamp on the
pin provides current limit. The VC pin is also clamped to
V
C
the voltage on the RUN/SS pin; soft-start is implemented
by generating a voltage ramp at the RUN/SS pin using an
external resistor and capacitor.
An internal regulator provides power to the control circuitry.
The bias regulator normally draws power from the V
but if the BD pin is connected to an external voltage higher
than 3V bias power will be drawn from the external source
(typically the regulated output voltage). This improves
effi ciency. The RUN/SS pin is used to place the LT3685
in shutdown, disconnecting the output and reducing the
input current to less than 1μA.
. An error amplifi er measures the output
C
and SW pins, turning the switch
IN
pin. If the error amplifi er’s output
C
pin,
IN
The switch driver operates from either the input or from
the BOOST pin. An external capacitor and diode are used
to generate a voltage at the BOOST pin that is higher than
the input supply. This allows the driver to fully saturate the
internal bipolar NPN power switch for effi cient operation.
The oscillator reduces the LT3685’s operating frequency
when the voltage at the FB pin is low. This frequency
foldback helps to control the output current during startup
and overload.
The LT3685 contains a power good comparator which trips
when the FB pin is at 86% of its regulated value. The PG
output is an open-collector transistor that is off when the
output is in regulation, allowing an external resistor to pull
the PG pin high. Power good is valid when the LT3685 is
enabled and V
The LT3685 has an overvoltage protection feature which
disables switching action when the V
typical (36V minimum). When switching is disabled, the
LT3685 can safely sustain input voltages up to 60V.
is above 3.6V.
IN
goes above 38V
IN
8
3685fa
Page 9
APPLICATIONS INFORMATION
LT3685
FB Resistor Network
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the 1% resistors according to:
RR
12
⎛
⎜
⎝
079
OUT
.
⎞
1=
–
⎟
⎠
V
V
Reference designators refer to the Block Diagram.
Setting the Switching Frequency
The LT3685 uses a constant frequency PWM architecture
that can be programmed to switch from 200kHz to 2.4MHz
by using a resistor tied from the R
showing the necessary R
value for a desired switching
T
pin to ground. A table
T
frequency is in Figure 1.
SWITCHING FREQUENCY (MHz)RT VALUE (kΩ)
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
Figure 1. Switching Frequency vs. RT Value
187
121
88.7
68.1
56.2
46.4
40.2
34
29.4
23.7
19.1
16.2
13.3
11.5
9.76
8.66
Operating Frequency Tradeoffs
Selection of the operating frequency is a tradeoff between
effi ciency, component size, minimum dropout voltage, and
maximum input voltage. The advantage of high frequency
operation is that smaller inductor and capacitor values may
be used. The disadvantages are lower effi ciency, lower
maximum input voltage, and higher dropout voltage. The
highest acceptable switching frequency (f
SW(MAX)
) for a
given application can be calculated as follows:
VV
+
DOUT
–
+
()
()
f
SW MAX
()
=
tVVV
ON MINDINSW
where VIN is the typical input voltage, V
voltage, V
is the catch diode drop (~0.5V) and VSW is the
D
is the output
OUT
internal switch drop (~0.5V at max load). This equation
shows that slower switching frequency is necessary to
safely accommodate high V
IN/VOUT
ratio. Also, as shown
in the next section, lower frequency allows a lower dropout
voltage. The reason input voltage range depends on the
switching frequency is because the LT3685 switch has fi nite
minimum on and off times. The switch can turn on for a
minimum of ~150ns and turn off for a minimum of ~150ns.
Typical minimum on time at 25°C is 80ns. This means that
the minimum and maximum duty cycles are:
DCft
DCft
where fSW is the switching frequency, the t
minimum switch on time (~150ns), and the t
=
MINSW ON MIN
=
MAXSW OFF MIN
–1
()
()
ON(MIN)
OFF(MIN)
is the
is
the minimum switch off time (~150ns). These equations
show that duty cycle range increases when switching
frequency is decreased.
A good choice of switching frequency should allow adequate input voltage range (see next section) and keep
the inductor and capacitor values small.
Input Voltage Range
The maximum input voltage for LT3685 applications
depends on switching frequency, the Absolute Maximum
Ratings of the V
and BOOST pins, and the operating
IN
mode.
The LT3685 can operate from input voltages up to 38V,
and safely withstand input voltages up 60V. Note that
while V
> 38V (typical), the LT3685 will stop switching,
IN
allowing the output to fall out of regulation.
While the output is in start-up, short-circuit, or other
overload conditions, the switching frequency should be
chosen according to the following discussion.
For safe operation at inputs up to 60V the switching frequency must be set low enough to satisfy V
IN(MAX)
according to the following equation. If lower V
≥ 40V
IN(MAX)
is
desired, this equation can be used directly.
3685fa
9
Page 10
LT3685
APPLICATIONS INFORMATION
VV
+
V
IN MAX
where V
V
OUT
IN(MAX)
is the output voltage, VD is the catch diode drop
(~0.5V), V
load), f
t
ON(MIN)
SW
is the minimum switch on time (~150ns). Note that
OUTD
ft
SW ON MIN
()
VV
–=
+
DSW()
is the maximum operating input voltage,
is the internal switch drop (~0.5V at max
SW
is the switching frequency (set by RT), and
a higher switching frequency will depress the maximum
operating input voltage. Conversely, a lower switching
frequency will be necessary to achieve safe operation at
high input voltages.
If the output is in regulation and no short-circuit, startup, or overload events are expected, then input voltage
transients of up to 60V are acceptable regardless of the
switching frequency. In this mode, the LT3685 may enter
pulse skipping operation where some switching pulses
are skipped to maintain output regulation. In this mode
the output voltage ripple and inductor current ripple will
be higher than in normal operation. Above 38V switching
will stop.
The minimum input voltage is determined by either the
LT3685’s minimum operating voltage of ~3.6V or by its
maximum duty cycle (see equation in previous section).
The minimum input voltage due to duty cycle is:
VV
+
V
IN MIN
where V
IN(MIN)
OUTD
ft
–
1
SW OFF MIN
()
VV
–=
+
DSW()
is the minimum input voltage, and t
OFF(MIN)
is the minimum switch off time (150ns). Note that higher
switching frequency will increase the minimum input
voltage. If a lower dropout voltage is desired, a lower
switching frequency should be used.
Inductor Selection
For a given input and output voltage, the inductor value
and switching frequency will determine the ripple current.
The ripple current ΔI
increases with higher VIN or V
L
OUT
and decreases with higher inductance and faster switching
frequency. A reasonable starting point for selecting the
ripple current is:
ΔI
L
where I
= 0.4(I
OUT(MAX)
OUT(MAX)
)
is the maximum output load current. To
guarantee suffi cient output current, peak inductor current
must be lower than the LT3685’s switch current limit (I
LIM
).
The peak inductor current is:
L(PEAK)
L(PEAK)
= I
OUT(MAX)
is the peak inductor current, I
I
where I
the maximum output load current, and ΔI
ripple current. The LT3685’s switch current limit (I
+ ΔIL/2
LIM
is
) is
OUT(MAX)
is the inductor
L
at least 3.5A at low duty cycles and decreases linearly to
2.5A at DC = 0.8. The maximum output current is a function of the inductor ripple current:
= I
I
OUT(MAX)
LIM
– ΔIL/2
Be sure to pick an inductor ripple current that provides
suffi cient maximum output current (I
OUT(MAX)
).
The largest inductor ripple current occurs at the highest
. To guarantee that the ripple current stays below the
V
IN
specifi ed maximum, the inductor value should be chosen
according to the following equation:
⎛
VV
=
⎜
⎝
OUTD
fI
SWL
L
⎛
⎞
+
Δ
VV
1–
⎜
⎟
⎠
⎝
OUTD
V
IN MAX
⎞
+
⎟⎟
⎠
()
where VD is the voltage drop of the catch diode (~0.4V),
V
IN(MAX)
voltage, f
is the maximum input voltage, V
is the switching frequency (set by RT), and
SW
is the output
OUT
L is in the inductor value.
The inductor’s RMS current rating must be greater than the
maximum load current and its saturation current should be
about 30% higher. For robust operation in fault conditions
(start-up or short circuit) and high input voltage (>30V),
the saturation current should be above 3.5A. To keep the
effi ciency high, the series resistance (DCR) should be less
than 0.1 , and the core material should be intended for
high frequency applications. Table 1 lists several vendors
and suitable types.
10
3685fa
Page 11
APPLICATIONS INFORMATION
LT3685
Table 1. Inductor Vendors
VENDORURLPART SERIESTYPE
Muratawww.murata.comLQH55DOpen
TDKwww.componenttdk.comSLF7045
SLF10145
Tokowww.toko.comD62CB
D63CB
D75C
D75F
Sumidawww.sumida.comCR54
CDRH74
CDRH6D38
CR75
Shielded
Shielded
Shielded
Shielded
Shielded
Open
Open
Shielded
Shielded
Open
Of course, such a simple design guide will not always result in the optimum inductor for your application. A larger
value inductor provides a slightly higher maximum load
current and will reduce the output voltage ripple. If your
load is lower than 2A, then you can decrease the value of
the inductor and operate with higher ripple current. This
allows you to use a physically smaller inductor, or one
with a lower DCR resulting in higher effi ciency. There are
several graphs in the Typical Performance Characteristics
section of this data sheet that show the maximum load
current as a function of input voltage and inductor value
for several popular output voltages. Low inductance may
result in discontinuous mode operation, which is okay
but further reduces maximum load current. For details of
maximum output current and discontinuous mode operation, see Linear Technology Application Note 44. Finally,
for duty cycles greater than 50% (V
OUT/VIN
> 0.5), there
is a minimum inductance required to avoid subharmonic
oscillations. See AN19.
Input Capacitor
Bypass the input of the LT3685 circuit with a ceramic capacitor of X7R or X5R type. Y5V types have poor performance
over temperature and applied voltage, and should not be
used. A 4.7μF to 10μF ceramic capacitor is adequate to
bypass the LT3685 and will easily handle the ripple current.
Note that larger input capacitance is required when a lower
switching frequency is used. If the input power source has
high impedance, or there is signifi cant inductance due to
long wires or cables, additional bulk capacitance may be
necessary. This can be provided with a lower performance
electrolytic capacitor.
Step-down regulators draw current from the input supply in pulses with very fast rise and fall times. The input
capacitor is required to reduce the resulting voltage
ripple at the LT3685 and to force this very high frequency
switching current into a tight local loop, minimizing EMI.
A 4.7μF capacitor is capable of this task, but only if it is
placed close to the LT3685 and the catch diode (see the
PCB Layout section). A second precaution regarding the
ceramic input capacitor concerns the maximum input
voltage rating of the LT3685. A ceramic input capacitor
combined with trace or cable inductance forms a high
quality (under damped) tank circuit. If the LT3685 circuit
is plugged into a live supply, the input voltage can ring to
twice its nominal value, possibly exceeding the LT3685’s
voltage rating. This situation is easily avoided (see the Hot
Plugging Safety section).
For space sensitive applications, a 2.2μF ceramic capacitor can be used for local bypassing of the LT3685 input.
However, the lower input capacitance will result in increased input current ripple and input voltage ripple, and
may couple noise into other circuitry. Also, the increased
voltage ripple will raise the minimum operating voltage
of the LT3685 to ~3.7V.
Output Capacitor and Output Ripple
The output capacitor has two essential functions. Along
with the inductor, it fi lters the square wave generated by the
LT3685 to produce the DC output. In this role it determines
the output ripple, and low impedance at the switching
frequency is important. The second function is to store
energy in order to satisfy transient loads and stabilize the
LT3685’s control loop. Ceramic capacitors have very low
equivalent series resistance (ESR) and provide the best
ripple performance. A good starting value is:
capacitance in μF. Use X5R or X7R types. This choice will
provide low output ripple and good transient response.
Transient performance can be improved with a higher value
capacitor if the compensation network is also adjusted
to maintain the loop bandwidth. A lower value of output
capacitor can be used to save space and cost but transient
performance will suffer. See the Frequency Compensation
section to choose an appropriate compensation network.
When choosing a capacitor, look carefully through the
data sheet to fi nd out what the actual capacitance is under
operating conditions (applied voltage and temperature).
A physically larger capacitor, or one with a higher voltage
rating, may be required. High performance tantalum or
electrolytic capacitors can be used for the output capacitor.
Low ESR is important, so choose one that is intended for
use in switching regulators. The ESR should be specifi ed by
the supplier, and should be 0.05
or less. Such a capacitor
will be larger than a ceramic capacitor and will have a larger
capacitance, because the capacitor must be large to achieve
low ESR. Table 2 lists several capacitor vendors.
Catch Diode
where I
is the output load current. The only reason to
OUT
consider a diode with a larger current rating than necessary
for nominal operation is for the worst-case condition of
shorted output. The diode current will then increase to the
typical peak switch current. Peak reverse voltage is equal
to the regulator input voltage. Use a Schottky diode with a
reverse voltage rating greater than the input voltage. The
overvoltage protection feature in the LT3685 will keep the
switch off when V
rated Schottky even when V
> 38V which allows the use of a 40V
IN
ranges up to 60V. Table 3
IN
lists several Schottky diodes and their manufacturers.
Table 3. Diode Vendors
PART NUMBER
On Semicnductor
MBRM120E
MBRM140
Diodes Inc.
B220
B230
DFLS240L
International Rectifi er
10BQ030
20BQ030
V
(V)
20
40
20
30
40
30
30
R
I
(A)
AVE
1
1
2
2
2
1
2
AT 1A
V
F
(mV)
530
550
420470
VF AT 2A
(mV)
595
500
500
500
470
The catch diode conducts current only during switch off
time. Average forward current in normal operation can
be calculated from:
I
D(AVG)
= I
OUT
(VIN – V
OUT
)/V
IN
12
Ceramic Capacitors
A precaution regarding ceramic capacitors concerns the
maximum input voltage rating of the LT3685. A ceramic
input capacitor combined with trace or cable inductance
3685fa
Page 13
APPLICATIONS INFORMATION
LT3685
forms a high quality (under damped) tank circuit. If the
LT3685 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding
the LT3685’s rating. This situation is easily avoided (see
the Hot Plugging Safely section).
Frequency Compensation
The LT3685 uses current mode control to regulate the
output. This simplifi es loop compensation. In particular, the
LT3685 does not require the ESR of the output capacitor
for stability, so you are free to use ceramic capacitors to
achieve low output ripple and small circuit size. Frequency
compensation is provided by the components tied to the
pin, as shown in Figure 2. Generally a capacitor (CC)
V
C
and a resistor (R
) in series to ground are used. In addi-
C
tion, there may be lower value capacitor in parallel. This
capacitor (C
) is not part of the loop compensation but
F
is used to fi lter noise at the switching frequency, and is
required only if a phase-lead capacitor is used or if the
output capacitor has high ESR.
Loop compensation determines the stability and transient
performance. Designing the compensation network is a
bit complicated and the best values depend on the application and in particular the type of output capacitor. A
practical approach is to start with one of the circuits in
this data sheet that is similar to your application and tune
the compensation network to optimize the performance.
Stability should then be checked across all operating
conditions, including load current, input voltage and
temperature. The LT1375 data sheet contains a more
thorough discussion of loop compensation and describes
how to test the stability using a transient load. Figure 2
shows an equivalent circuit for the LT3685 control loop.
The error amplifi er is a transconductance amplifi er with
fi nite output impedance. The power section, consisting of
the modulator, power switch and inductor, is modeled as
a transconductance amplifi er generating an output current proportional to the voltage at the V
pin. Note that
C
the output capacitor integrates this current, and that the
capacitor on the V
pin (CC) integrates the error ampli-
C
fi er output current, resulting in two poles in the loop. In
most cases a zero is required and comes from either the
output capacitor ESR or from a resistor R
. This simple model works well as long as the value
C
C
in series with
C
of the inductor is not too high and the loop crossover
frequency is much lower than the switching frequency.
A phase lead capacitor (C
) across the feedback divider
PL
may improve the transient response. Figure 3 shows the
transient response when the load current is stepped from
500mA to 1500mA and back to 500mA.
LT3685
CURRENT MODE
POWER STAGE
= 3.5mho
g
m
3M
V
C
R
C
C
F
C
C
ERROR
AMPLIFIER
gm =
420μmho
Figure 2. Model for Loop Response
V
OUT
100mV/DIV
I
L
0.5A/DIV
VIN = 12V; FRONT PAGE APPLICATION
Figure 3. Transient Load Response of the LT3685 Front Page
Application as the Load Current is Stepped from 500mA to
1500mA. V
OUT
= 3.3V
SW
C
R1
FB
–
+
0.8V
POLYMER
GND
TANTALUM
R2
10μs/DIV
PL
ESR
C1
OR
OUTPUT
C1
+
CERAMIC
3685 F02
3685 F03
3685fa
13
Page 14
LT3685
APPLICATIONS INFORMATION
BOOST and BIAS Pin Considerations
Capacitor C3 and the internal boost Schottky diode (see
the Block Diagram) are used to generate a boost voltage that is higher than the input voltage. In most cases
a 0.22μF capacitor will work well. Figure 2 shows three
ways to arrange the boost circuit. The BOOST pin must be
more than 2.3V above the SW pin for best effi ciency. For
outputs of 3V and above, the standard circuit (Figure 4a)
is best. For outputs between 2.8V and 3V, use a 1μF boost
capacitor. A 2.5V output presents a special case because it
is marginally adequate to support the boosted drive stage
while using the internal boost diode. For reliable BOOST pin
operation with 2.5V outputs use a good external Schottky
diode (such as the ON Semi MBR0540), and a 1μF boost
capacitor (see Figure 4b). For lower output voltages the
boost diode can be tied to the input (Figure 4c), or to
another supply greater than 2.8V. Tying BD to V
reduces
IN
the maximum input voltage to 30V. The circuit in Figure 4a
is more effi cient because the BOOST pin current and BD
pin quiescent current comes from a lower voltage source.
You must also be sure that the maximum voltage ratings
of the BOOST and BD pins are not exceeded.
The minimum operating voltage of an LT3685 application
is limited by the minimum input voltage (3.6V) and by the
maximum duty cycle as outlined in a previous section. For
proper startup, the minimum input voltage is also limited
by the boost circuit. If the input voltage is ramped slowly,
or the LT3685 is turned on with its RUN/SS pin when the
output is already in regulation, then the boost capacitor
may not be fully charged. Because the boost capacitor is
charged with the energy stored in the inductor, the circuit
will rely on some minimum load current to get the boost
circuit running properly. This minimum load will depend
on input and output voltages, and on the arrangement of
the boost circuit. The minimum load generally goes to
zero once the circuit has started. Figure 5 shows a plot
of minimum load to start and to run as a function of input
V
OUT
BD
BOOST
V
4.7μF
V
4.7μF
V
4.7μF
IN
IN
IN
V
LT3685
IN
GND
(4a) For V
BD
V
LT3685
IN
GND
(4b) For 2.5V < V
BD
V
LT3685
IN
GND
(4c) For V
OUT
SW
OUT
BOOST
SW
BOOST
SW
< 2.5V; V
C3
> 2.8V
C3
< 2.8V
OUT
C3
IN(MAX)
D2
3685 FO4
= 30V
V
OUT
V
OUT
Figure 4. Three Circuits For Generating The Boost Voltage
voltage. In many cases the discharged output capacitor
will present a load to the switcher, which will allow it to
start. The plots show the worst-case situation where V
IN
is ramping very slowly. For lower start-up voltage, the
boost diode can be tied to V
; however, this restricts the
IN
input range to one-half of the absolute maximum rating
of the BOOST pin.
14
3685fa
Page 15
APPLICATIONS INFORMATION
6.0
5.5
TO START
(WORST CASE)
5.0
4.5
4.0
TO RUN
3.5
INPUT VOLTAGE (V)
3.0
V
= 3.3V
OUT
= 25°C
T
A
2.5
L = 8.2μH
f = 700kHz
2.0
1
8.0
7.0
6.0
5.0
4.0
INPUT VOLTAGE (V)
3.0
2.0
110000101001000
101001000
LOAD CURRENT (A)
TO START
(WORST CASE)
TO RUN
V
= 5V
OUT
= 25°C
T
A
L = 8.2μH
f = 700kHz
LOAD CURRENT (A)
Figure 5. The Minimum Input Voltage Depends on
Output Voltage, Load Current and Boost Circuit
At light loads, the inductor current becomes discontinuous and the effective duty cycle can be very high. This
reduces the minimum input voltage to approximately
300mV above V
. At higher load currents, the inductor
OUT
current is continuous and the duty cycle is limited by the
maximum duty cycle of the LT3685, requiring a higher
input voltage to maintain regulation.
Soft-Start
The RUN/SS pin can be used to soft-start the LT3685,
reducing the maximum input current during start-up.
The RUN/SS pin is driven through an external RC fi lter to
create a voltage ramp at this pin. Figure 6 shows the startup and shut-down waveforms with the soft-start circuit.
10000
3685 F05
LT3685
I
L
3685 F06
1A/DIV
V
RUN/SS
2V/DIV
V
OUT
2V/DIV
RUN
15k
RUN/SS
0.22μF
GND
2ms/DIV
Figure 6. To Soft-Start the LT3685, Add a Resisitor
and Capacitor to the RUN/SS Pin
By choosing a large RC time constant, the peak start-up
current can be reduced to the current that is required to
regulate the output, with no overshoot. Choose the value
of the resistor so that it can supply 20μA when the RUN/SS
pin reaches 2.5V.
Synchronization
Synchronizing the LT3685 oscillator to an external frequency can be done by connecting a square wave (with
20% to 80% duty cycle) to the SYNC pin. The square
wave amplitude should have valleys that are below 0.3V
and peaks that are above 0.8V (up to 6V).
The LT3685 may be synchronized over a 250kHz to 2MHz
range. The R
resistor should be chosen to set the LT3685
T
switching frequency 20% below the lowest synchronization
input. For example, if the synchronization signal will be 250kHz
and higher, the R
should be chosen for 200kHz. To assure
T
reliable and safe operation the LT3685 will only synchronize
when the output voltage is near regulation as indicated by the
PG fl ag. It is therefore necessary to choose a large enough
inductor value to supply the required output current at the
frequency set by the R
resistor. See Inductor Selection sec-
T
tion. It is also important to note that slope compensation
is set by the R
higher than the one set by R
value: When the sync frequency is much
T
, the slope compensation will
T
be signifi cantly reduced which may require a larger inductor
value to prevent subharmonic oscillation.
3685fa
15
Page 16
LT3685
L
APPLICATIONS INFORMATION
Shorted and Reversed Input Protection
If the inductor is chosen so that it won’t saturate excessively, an LT3685 buck regulator will tolerate a shorted
output. There is another situation to consider in systems
where the output will be held high when the input to the
LT3685 is absent. This may occur in battery charging applications or in battery backup systems where a battery
or some other supply is diode OR-ed with the LT3685’s
output. If the V
pin is allowed to fl oat and the RUN/SS
IN
pin is held high (either by a logic signal or because it is
tied to V
), then the LT3685’s internal circuitry will pull
IN
its quiescent current through its SW pin. This is fi ne if
your system can tolerate a few mA in this state. If you
ground the RUN/SS pin, the SW pin current will drop to
essentially zero. However, if the V
pin is grounded while
IN
the output is held high, then parasitic diodes inside the
LT3685 can pull large currents from the output through
the SW pin and the V
pin. Figure 7 shows a circuit that
IN
will run only when the input voltage is present and that
protects against a shorted or reversed input.
D4
MBRS140
V
IN
V
IN
RUN/SS
V
C
LT3685
GND FB
BOOST
SW
3685 F07
V
OUT
BACKUP
Figure 7. Diode D4 Prevents a Shorted Input from
Discharging a Backup Battery Tied to the Output. It Also
Protects the Circuit from a Reversed Input. The LT3685
Runs Only When the Input is Present
PCB Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board layout. Figure 8 shows
the recommended component placement with trace,
ground plane and via locations. Note that large, switched
currents fl ow in the LT3685’s V
and SW pins, the catch
IN
diode (D1) and the input capacitor (C1). The loop formed
L1
V
D1
VIAS TO LOCAL GROUND PLANE
VIAS TO V
OUT
C1
VIAS TO SYNC
OUT
C2
GND
VIAS TO RUN/SS
VIAS TO PG
C
R
RT
R
PG
C
R
C
R2
R1
VIAS TO V
IN
OUTLINE OF LOCA
3685 F08
Figure 8. A Good PCB Layout Ensures Proper, Low EMI Operation
by these components should be as small as possible. These
components, along with the inductor and output capacitor,
should be placed on the same side of the circuit board,
and their connections should be made on that layer. Place
a local, unbroken ground plane below these components.
The SW and BOOST nodes should be as small as possible.
Finally, keep the FB and V
nodes small so that the ground
C
traces will shield them from the SW and BOOST nodes.
The Exposed Pad on the bottom of the package must be
soldered to ground so that the pad acts as a heat sink. To
keep thermal resistance low, extend the ground plane as
much as possible, and add thermal vias under and near
the LT3685 to additional ground planes within the circuit
board and on the bottom side.
Hot Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LT3685 circuits. However, these capacitors can cause problems if the LT3685 is plugged into a
live supply (see Linear Technology Application Note 88 for
16
3685fa
Page 17
APPLICATIONS INFORMATION
LT3685
a complete discussion). The low loss ceramic capacitor,
combined with stray inductance in series with the power
source, forms an under damped tank circuit, and the
voltage at the V
nominal input voltage, possibly exceeding the LT3685’s
rating and damaging the part. If the input supply is poorly
controlled or the user will be plugging the LT3685 into an
energized supply, the input network should be designed
to prevent this overshoot. Figure 9 shows the waveforms
that result when an LT3685 circuit is connected to a 24V
supply through six feet of 24-gauge twisted pair. The
fi rst plot is the response with a 4.7μF ceramic capacitor
at the input. The input voltage rings as high as 50V and
the input current peaks at 26A. A good solution is shown
in Figure 9b. A 0.7
input to eliminate the voltage overshoot (it also reduces
the peak input current). A 0.1μF capacitor improves high
frequency fi ltering. For high input voltages its impact on
effi ciency is minor, reducing effi ciency by 1.5 percent for
a 5V output at full load operating from 24V.
High Temperature Considerations
The PCB must provide heat sinking to keep the LT3685
cool. The Exposed Pad on the bottom of the package must
be soldered to a ground plane. This ground should be tied
to large copper layers below with thermal vias; these layers will spread the heat dissipated by the LT3685. Place
pin of the LT3685 can ring to twice the
IN
resistor is added in series with the
additional vias can reduce thermal resistance further. With
these steps, the thermal resistance from die (or junction)
to ambient can be reduced to
100 LFPM airfl ow, this resistance can fall by another 25%.
Further increases in airfl ow will lead to lower thermal resistance. Because of the large output current capability of
the LT3685, it is possible to dissipate enough heat to raise
the junction temperature beyond the absolute maximum of
125°C. When operating at high ambient temperatures, the
maximum load current should be derated as the ambient
temperature approaches 125°C.
Power dissipation within the LT3685 can be estimated by
calculating the total power loss from an effi ciency measurement and subtracting the catch diode loss and inductor
loss. The die temperature is calculated by multiplying the
LT3685 power dissipation by the thermal resistance from
junction to ambient.
Other Linear Technology Publications
Application Notes 19, 35 and 44 contain more detailed descriptions and design information for buck regulators and
other switching regulators. The LT1376 data sheet has a more
extensive discussion of output ripple, loop compensation and
stability testing. Design Note 100 shows how to generate a
bipolar output supply using a buck regulator.
= 35°C/W or less. With
JA
3685fa
17
Page 18
LT3685
APPLICATIONS INFORMATION
+
LOW
IMPEDANCE
ENERGIZED
24V SUPPLY
+
CLOSING SWITCH
SIMULATES HOT PLUG
I
IN
STRAY
INDUCTANCE
DUE TO 6 FEET
(2 METERS) OF
TWISTED PAIR
0.7Ω
V
IN
V
IN
LT3685
4.7μF
20V/DIV
I
10A/DIV
IN
DANGER
20μs/DIV
MAY EXCEED
IN
RINGING V
ABSOLUTE MAXIMUM RATING
(9a)
V
IN
(9b)
20V/DIV
I
10A/DIV
IN
20μs/DIV
LT3685
4.7μF0.1μF
V
IN
(9c)
20V/DIV
I
10A/DIV
IN
20μs/DIV
LT3685
+
22μF
35V
AI.EI.
+
4.7μF
Figure 9. A Well Chosen Input Network Prevents Input Voltage Overshoot and
Ensures Reliable Operation when the LT3685 is Connected to a Live Supply
3685 F09
18
3685fa
Page 19
TYPICAL APPLICATIONS
LT3685
5V Step-Down Converter
6.8V TO 36V
TRANSIENT
TO 60V
4.7μF
V
4.4V TO 36V
TRANSIENT
TO 60V
4.7μF
V
IN
ON OFF
16.2k
40.2k
470pF
D: DIODES INC. DFLS240L
L: TAIYO YUDEN NP06DZB6R8M
IN
ON OFF
14k
40.2k
470pF
D: DIODES INC. DFLS240L
L: TAIYO YUDEN NP06DZB4R7M
V
IN
RUN/SSBOOST
V
C
R
T
PG
SYNC
f = 800kHz
LT3685
GND
BD
SW
FB
3.3V Step-Down Converter
V
IN
RUN/SSBOOST
V
C
R
T
PG
SYNC
f = 800kHz
LT3685
GND
BD
SW
FB
0.47μF
D
100k
0.47μF
D
100k
536k
316k
L
6.8μH
L
4.7μH
3685 TA02
3685 TA03
V
5V
2A
22μF
V
OUT
3.3V
2A
22μF
OUT
3685fa
19
Page 20
LT3685
TYPICAL APPLICATIONS
2.5V Step-Down Converter
V
IN
4V TO 36V
TRANSIENT
TO 60V
4.7μF
V
8.6V TO 22V
TRANSIENT TO 36V
2.2μF
ON OFF
20k
56.2k
330pF
D1: DIODES INC. DFLS240L
D2: MBR0540
L: TAIYO YUDEN NP06DZB4R7M
f = 600kHz
5V, 2MHz Step-Down Converter
IN
ON OFF
14k
11.5k
470pF
D: DIODES INC. DFLS240L
L: SUMIDA CDRH4D22/HP-2R2
V
IN
RUN/SSBOOST
V
C
R
T
PG
SYNC
RUN/SSBOOST
V
C
R
T
PG
SYNC
f = 2MHz
LT3685
GND
V
IN
BD
SW
BD
LT3685
GND
V
OUT
2.5V
3685 TA04
L
3685 TA05
2A
47μF
V
OUT
5V
2A
22μF
D2
L
1μF
4.7μH
D1
100k
100k
0.47μF
D
215k
2.2μH
536k
FB
SW
FB
20
3685fa
Page 21
TYPICAL APPLICATIONS
LT3685
12V Step-Down Converter
V
15V TO 36V
TRANSIENT
TO 60V*
10μF
V
3.5V TO 27V
4.7μF
IN
ON OFF
26.1k
40.2k
330pF
D: DIODES INC. DFLS240L
L: NEC/TOKIN PLC-0755-100
*USE SCHOTTKY DIODE RATED AT V
IN
ON OFF
18.2k
68.1k
330pF
D: DIODES INC. DFLS240L
L: TAIYO YUDEN NP06DZB3R3M
V
IN
RUN/SSBOOST
V
C
R
T
PG
SYNC
f = 800kHz
LT3685
GND
>45V.
R
BD
SW
FB
1.8V Step-Down Converter
V
IN
RUN/SSBOOST
V
C
R
T
PG
SYNC
f = 500kHz
LT3685
GND
BD
SW
FB
0.47μF
D
50k
0.47μF
D
100k
715k
127k
L
10μH
L
3.3μH
3685 TA06
3685 TA08
V
OUT
12V
2A
22μF
V
OUT
1.8V
2A
47μF
3685fa
21
Page 22
LT3685
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)
3.50 p0.05
0.675 p0.05
1.65 p0.05
(2 SIDES)2.15 p0.05
PACKAGE
OUTLINE
0.25 p0.05
2.38 p0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
(2 SIDES)
0.50
BSC
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
3.00 p0.10
(4 SIDES)
0.75 p0.05
1.65 p0.10
(2 SIDES)
0.00 – 0.05
R = 0.115
TYP
2.38 p0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
106
15
0.25 p0.05
0.50 BSC
0.38 p0.10
(DD) DFN 1103
22
3685fa
Page 23
PACKAGE DESCRIPTION
2.794 p 0.102
(.110 p .004)
MSE Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1663)
0.889 p 0.127
(.035 p .005)
BOTTOM VIEW OF
EXPOSED PAD OPTION
1
LT3685
2.06 p 0.102
(.081 p .004)
1.83 p 0.102
(.072 p .004)
5.23
(.206)
MIN
0.305 p 0.038
(.0120 p .0015)
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
GAUGE PLANE
0.18
(.007)
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
DETAIL “A”
DETAIL “A”
2.083 p 0.102
(.082 p .004)
0.50
(.0197)
BSC
0o – 6o TYP
0.53 p 0.152
(.021 p .006)
3.20 – 3.45
(.126 – .136)
SEATING
PLANE
3.00 p 0.102
(.118 p .004)
(NOTE 3)
4.90 p 0.152
(.193 p .006)
1.10
(.043)
MAX
0.17 –0.27
(.007 – .011)
TYP
10
12
0.50
(.0197)
BSC
8910
3
7
6
45
0.497 p 0.076
(.0196 p .003)
REF
3.00 p 0.102
(.118 p .004)
(NOTE 4)
0.86
(.034)
REF
0.1016 p 0.0508
(.004 p .002)
MSOP (MSE) 0307 REV B
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
3685fa
23
Page 24
LT3685
TYPICAL APPLICATION
1.2V Step-Down Converter
V
IN
3.6V TO 27V
ON OFF
4.7μF
16.2k
68.1k
330pF
D: DIODES INC. DFLS240L
L: TAIYO YUDEN NP06DZB3R3M
V
IN
RUN/SSBOOST
V
C
LT3685
R
T
PG
SYNC
GND
f = 500kHz
BD
SW
FB
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VIN: 3.6V to 36V, V
VIN: 3.3V to 80V, V
3mm DFN and 16-Pin TSSOP Packages
VIN: 3.6V to 36V, V
VIN: 3.6V to 40V, V
DFN Package
VIN: 3.3V to 60V, V
Package
VIN: 3V to 25V, V
VIN: 3.6V to 25V, V
Package
VIN: 5.5V to 60V, V
Package
VIN: 3.3V to 60V, V
Package
VIN: 3.6V to 38V, V
3mm DFN and 10-Pin MSOP Packages
VIN: 3.6V to 34V, V
3mm DFN and 10-Pin MSOP Packages
VIN: 3.6V to 34V, V
3mm DFN and 10-Pin MSOP Packages