Datasheet LT3028 Datasheet (LINEAR TECHNOLOGY)

查询LT3020IMS8供应商

FEATURES

■

Low Noise: 20µV

■

Low Quiescent Current: 30µA/Output

■

Independent Inputs

■

Wide Input Voltage Range: 1.8V to 20V

■

Output Current: 100mA/500mA

■

Very Low Shutdown Current: <0.1µA

■

Low Dropout Voltage: 300mV/320mV at

(10Hz to 100kHz)

RMS

100mA/500mA

■

Adjustable Outputs from 1.22V to 20V

■

Stable with as Low as 1µF/3.3µF Output Capacitor

■

Stable with Aluminum, Tantalum or Ceramic Capacitors

■

Reverse-Battery Protected

■

No Protection Diodes Needed

■

Overcurrent and Overtemperature Protected

■

Tracking/Sequencing Capability

■

Thermally Enhanced 16-Lead TSSOP and 16-Lead (5mm × 3mm) DFN Packages

U

APPLICATIO S

■

Cellular Phones

■

Pagers

■

Battery-Powered Systems

■

Frequency Synthesizers

■

Wireless Modems

■

Tracking/Sequencing Power Supplies

LT3028

Dual 100mA/500mA

Low Dropout, Low Noise,

Micropower Regulators with

Independent Inputs

U

DESCRIPTIO

The LT®3028 is a dual, micropower, low noise, low dropout regulator with independent inputs. With an external

0.01µF bypass capacitor, output noise is a low 20µV over a 10Hz to 100kHz bandwidth. Designed for use in battery-powered systems, the low 30µA quiescent current per output makes it an ideal choice. In shutdown, quiescent current drops to less than 0.1µA. Shutdown control is independent for each output, allowing for flexibility in power management. The device is capable of operating over an input voltage range of 1.8V to 20V. Output 1 can supply 500mA of output current with a dropout voltage of 320mV. The device can supply 100mA of output current from Output 2 with a dropout voltage of 300mV. Quiescent current is well controlled in dropout.

The LT3028 regulator is stable with output capacitors as low as 1µF for the 100mA output and 3.3µF for the 500mA output. Small ceramic capacitors can be used without the series resistance required by other regulators.

Internal protection circuitry includes reverse-battery protection, current limiting and thermal limiting protection. The device is available as an adjustable device with a 1.22V reference voltage. The LT3028 regulator is available in the thermally enhanced 16-lead TSSOP and 16-lead, low profile (5mm × 3mm × 0.75mm) DFN packages.

, LTC and LT are registered trademarks of Linear Technology Corporation.

Protected by U.S. Patents including 6118263, 6144250.

RMS

TYPICAL APPLICATIO

3.3V/2.5V Low Noise Regulators

OUT1

V

3.7V TO 20V

V

2.9V TO 20V

IN1

IN2

1µF

IN1

SHDN1

IN2

SHDN2

LT3028

GND

BYP1 ADJ1

OUT2

BYP2 ADJ2

U

0.01µF 10µF 422k

249k

0.01µF 10µF 261k

249k

3028 TA01a

3.3V AT 500mA NOISE

20µV

RMS

2.5V AT 100mA NOISE

20µV

RMS

10Hz to 100kHz Output Noise

V

OUT

100µV/DIV

3028 TA01b

20µV

RMS

3028f

1

LT3028

16

15

14

13

12

11

10

9

17

1

2

3

4

5

6

7

8

ADJ1

SHDN1

IN1

IN2

SHDN2

ADJ2

BYP1

NC

OUT1

GND

OUT2

BYP2

TOP VIEW

DHC PACKAGE

16-LEAD (5mm × 3mm) PLASTIC DFN

WWWU

ABSOLUTE AXI U RATI GS

(Note 1)

IN1, IN2 Pin Voltage .............................................. ±20V

OUT1, OUT2 Pin Voltage ....................................... ±20V

Input-to-Output Differential Voltage....................... ±20V

ADJ1, ADJ2 Pin Voltage ......................................... ±7V

BYP1, BYP2 Pin Voltage ....................................... ±0.6V

SHDN1, SHDN2 Pin Voltage ................................. ±20V

Output Short-Circut Duration.......................... Indefinite

UU

W

PACKAGE/ORDER I FOR ATIO

TOP VIEW

1

GND

2

BYP1

3

OUT1

4

OUT1

GND

OUT2

BYP2

GND

16-LEAD PLASTIC TSSOP

T

= 150°C, θJA = 38°C/ W, θJC = 8°C/ W

JMAX

EXPOSED PAD (PIN 17) IS GND

MUST BE SOLDERED TO PCB

5

6

7

8

FE PACKAGE

17

GND

16

ADJ1

15

SHDN1

14

IN1

13

IN2

12

SHDN2

11

ADJ2

10

GND

9

ORDER PART

NUMBER

LT3028EFE LT3028IFE

FE PART

MARKING

3028EFE 3028IFE

Operating Junction Temperature Range

(Note 2) ............................................ –40°C to 125°C

Storage Temperature Range

FE Package ....................................... – 65°C to 150°C

DHC Package .................................... – 65°C to 125°C

Lead Temperature (Soldering, 10 sec).................. 300°C

ORDER PART

NUMBER

LT3028EDHC LT3028IDHC

DHC PART

MARKING

3028

T

= 125°C, θJA = 40°C/ W, θJC = 10°C/ W

JMAX

EXPOSED PAD (PIN 17) IS GND

MUST BE SOLDERED TO PCB

3028I

Consult factory for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Minimum Input Voltage Output 2, I (Notes 3, 10) Output 1, I

ADJ1, ADJ2 Pin Voltage VIN = 2V, I (Notes 3, 4) Output 2, 2.3V < V

Line Regulation (Note 3) ∆VIN = 2V to 20V, I

Load Regulation (Note 3) Output 2, V

2

= 100mA ● 1.8 2.3 V

LOAD

= 500mA ● 1.8 2.3 V

LOAD

= 1mA 1.205 1.220 1.235 V

LOAD

Output 1, 2.3V < V

= 2.3V, ∆I

IN2

= 2.3V, ∆I

V

IN2

Output 1, V

IN1

V

IN1

= 2.3V, ∆I = 2.3V, ∆I

< 20V, 1mA < I

IN2

< 20V, 1mA < I

IN1

= 1mA ● 110 mV

LOAD

= 1mA to 100mA 1 12 mV

LOAD

= 1mA to 100mA ● 25 mV

LOAD

= 1mA to 500mA 1 12 mV

LOAD

= 1mA to 500mA ● 25 mV

LOAD

< 100mA ● 1.190 1.220 1.250 V

LOAD

< 500mA ● 1.190 1.220 1.250 V

LOAD

3028f

LT3028

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Dropout Voltage I (Output 2) I

V

= V

IN2

OUT2(NOMINAL)

(Notes 5, 6, 10)

Dropout Voltage I (Output 1) I

V

= V

IN1

OUT1(NOMINAL)

(Notes 5, 6, 10)

GND Pin Current I (Output 2) I V

= V

IN2

OUT2(NOMINAL)

(Notes 5, 7) I

GND Pin Current I (Output 1) I V

= V

IN1

OUT1(NOMINAL)

(Notes 5, 7) I

Output Voltage Noise C

ADJ1/ADJ2 Pin Bias Current ADJ1, ADJ2 (Notes 3, 8) 30 100 nA

Shutdown Threshold V

SHDN1/SHDN2 Pin Current V (Note 9) V

Quiescent Current in Shutdown VIN = 6V, V

Ripple Rejection VIN = 2.72V (Avg), V

Current Limit Output 2, V

Input Reverse Leakage Current VIN = – 20V, V

Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.

Note 2: The LT3028 regulator is tested and specified under pulse load conditions such that T

≈ TA. The LT3028E is guaranteed to meet

J

performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature

= 1mA 0.10 0.15 V

LOAD

= 1mA ● 0.19 V

LOAD

I

= 10mA 0.17 0.22 V

LOAD

I

= 10mA ● 0.29 V

LOAD

I

= 50mA 0.24 0.31 V

LOAD

I

= 50mA ● 0.40 V

LOAD

I

= 100mA 0.30 0.35 V

LOAD

I

= 100mA ● 0.45 V

LOAD

= 10mA 0.12 0.19 V

LOAD

= 10mA ● 0.25 V

LOAD

I

= 50mA 0.17 0.22 V

LOAD

I

= 50mA ● 0.32 V

LOAD

I

= 100mA 0.21 0.28 V

LOAD

I

= 100mA ● 0.34 V

LOAD

I

= 500mA 0.32 0.37 V

LOAD

I

= 500mA ● 0.47 V

LOAD

= 0mA ● 25 50 µA

LOAD

= 1mA ● 60 95 µA

LOAD

I

= 10mA ● 230 400 µA

LOAD

= 50mA ● 12 mA

LOAD

I

= 100mA ● 2.2 4 mA

LOAD

= 0mA ● 30 75 µA

LOAD

= 1mA ● 65 120 µA

LOAD

I

= 50mA ● 1 1.6 mA

LOAD

= 100mA ● 23 mA

LOAD

I

= 250mA ● 58 mA

LOAD

I

= 500mA ● 10 16 mA

LOAD

= 10µF, C

OUT

= 0.01µF, I

BYP

= Full Current, 20 µV

LOAD

RMS

BW = 10Hz to 100kHz

= Off to On ● 0.80 1.4 V

OUT

V

= On to Off ● 0.25 0.65 V

OUT

, V

SHDN1

, V

SHDN1

I

= Full Current

LOAD

Output 1, V

= 0V ● 0 0.5 µA

SHDN2

= 20V ● 1 3.0 µA

SHDN2

= 0V, V

SHDN1

RIPPLE

= 7V, V

IN2

V

IN2

IN1

V

IN1

OUT2

= 2.3V, ∆V

= 7V, V

OUT1

= 2.3V, ∆V

= 0V ● 1mA

OUT

= 0V 0.01 0.1 µA

SHDN2

= 0.5V

P-P

, f

= 120Hz, 55 65 dB

RIPPLE

= 0V 500 mA

= –0.1V ● 110 mA

OUT2

= 0V 1.3 A

= –0.1V ● 520 mA

OUT1

range are assured by design, characterization and correlation with statistical process controls. The LT3028I is guaranteed and tested over the full –40°C to 125°C operating junction temperature range.

Note 3: The LT3028 is tested and specified for these conditions with the ADJ1/ADJ2 pin connected to the corresponding OUT1/OUT2 pin.

3028f

3

LT3028

ELECTRICAL CHARACTERISTICS

Note 4: Operating conditions are limited by maximum junction temperature. The regulated output voltage specification will not apply for all possible combinations of input voltage and output current. When operating at maximum input voltage, the output current range must be limited. When operating at maximum output current, the input voltage range must be limited.

Note 5: To satisfy requirements for minimum input voltage, the LT3028 is tested and specified for these conditions with an external resistor divider (two 250k resistors) for an output voltage of 2.44V. The external resistor divider will add a 5µA DC load on the output.

Note 6: Dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage will be equal to: V

IN

– V

DROPOUT

.

Note 7: GND pin current is tested with V load. This means the device is tested while operating in its dropout region or at the minimum input voltage specification. This is the worst-case GND pin current. The GND pin current will decrease slightly at higher input voltages. Total GND pin current is equal to the sum of GND pin currents from Output 1 and Output 2.

Note 8: ADJ1 and ADJ2 pin bias current flows into the pin. Note 9: SHDN1 and SHDN2 pin current flows into the pin. Note 10: For the LT3028 dropout voltage will be limited by the minimum

input voltage specification under some output voltage/load conditions. See the curve of Minimum Input Voltage in the Typical Performance Characteristics.

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Output 2 Typical Dropout Voltage

500

450

400

350

300

250

200

150

DROPOUT VOLTAGE (mV)

100

50

0

0 102030

40

OUTPUT CURRENT (mA)

TJ = 125°C

TJ = 25°C

60 70 80 90 100

50

3028 G01

Output 2 Guaranteed Dropout Voltage

500

= TEST POINTS

450

400

350

300

250

200

150

DROPOUT VOLTAGE (mV)

100

50

0

0 102030

TJ ≤ 125°C

TJ ≤ 25°C

40

50

OUTPUT CURRENT (mA)

60 70 80 90 100

3028 G02

= 2.44V and a current source

IN

Output 2 Dropout Voltage

500

450

400

350

300

250

200

150

DROPOUT VOLTAGE (mV)

100

50

0

–50

–25

IL = 100mA

25

0

TEMPERATURE (°C)

IL = 50mA

IL = 10mA

IL = 1mA

50

100

125

3028 G03

75

Output 1 Typical Dropout Voltage

500

450

400

350

300

250

200

150

DROPOUT VOLTAGE (mV)

100

50

0

0 50 100 150

OUTPUT CURRENT (mA)

4

TJ = 125°C

TJ = 25°C

200

300 350 400 450 500

250

3028 G04

Output 1 Guaranteed Dropout Voltage

500

= TEST POINTS

450

400

350

300

250

200

150

100

50

GUARANTEED DROPOUT VOLTAGE (mV)

0

0 50 100 150

TJ ≤ 125°C

TJ ≤ 25°C

200

300 350 400 450 500

250

OUTPUT CURRENT (mA)

3028 G05

Output 1 Dropout Voltage

500

450

400

350

300

250

200

150

DROPOUT VOLTAGE (mV)

100

50

0

–50

I

= 50mA

L

–25

I

= 100mA

L

0

25

TEMPERATURE (°C)

= 250mA

I

L

IL = 10mA

50

IL = 500mA

IL = 1mA

75

100

125

3028 G06

3028f

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LT3028

Quiescent Current (Per Output)

50

45

40

35

30

25

20

15

QUIESCENT CURRENT (µA)

10

5

0

VIN = 6V

= 250k, IL = 5µA

R

L

–50

V

= V

SHDN

IN

050–25 25 75 125

TEMPERATURE (°C)

Output 2 GND Pin Current

2.50

2.25

2.00

1.75

1.50

1.25

1.00

0.75

GND PIN CURRENT (mA)

0.50

0.25

0

0123

RL = 12.2Ω I

= 100mA*

L

RL = 1.22k

= 1mA*

I

L

4

5

INPUT VOLTAGE (V)

RL = 24.4Ω I

L

100

3028 G07

TJ = 25°C *FOR V

= 1.22V

OUT

= 50mA*

RL = 122Ω

= 10mA*

I

L

678910

3028 G10

ADJ1 or ADJ2 Pin Voltage Quiescent Current (Per Output)

1.240 IL = 1mA

1.235

1.230

1.225

1.220

1.215

ADJ PIN VOLTAGE (V)

1.210

1.205

1.200

–25 25 75 125

–50

050

TEMPERATURE (°C)

100

3028 G08

40

TJ = 25°C

= 250k

R

L

35

30

25

20

15

10

QUIESCENT CURRENT (µA)

5

0

42 6 10 14 18

0

INPUT VOLTAGE (V)

V

SHDN

V

SHDN

8

Output 2 GND Pin Current vs I

2.50 VIN = V

OUT(NOMINAL)

= 25°C

T

2.25

J

2.00

1.75

1.50

1.25

1.00

0.75

GND PIN CURRENT (mA)

0.50

0.25

0

0 102030

OUTPUT CURRENT (mA)

+ 1V

40

50

LOAD

60 70 80 90 100

3028 G11

Output 1 GND Pin Current

1200

1000

800

600

400

GND PIN CURRENT (µA)

200

0

0123

RL = 24.4Ω

= 50mA*

I

L

RL = 122Ω

= 10mA*

I

L

RL = 1.22k

= 1mA*

I

L

4

INPUT VOLTAGE (V)

5

= V

IN

= 0V

12

16

20

3028 G09

TJ = 25°C

= V

V

IN

SHDN

*FOR V

= 1.22V

OUT

678910

3028 G12

Output 1 GND Pin Current

12

10

RL = 2.44Ω

= 500mA*

I

8

6

4

GND PIN CURRENT (mA)

2

0

0123

L

4

INPUT VOLTAGE (V)

TJ = 25°C

= V

V

IN

SHDN

*FOR V

5

= 1.22V

OUT

RL = 4.07Ω

= 300mA*

I

L

RL = 12.2Ω

= 100mA*

I

L

678910

3028 G13

Output 1 GND Pin Current vs I

12

VIN = V

OUT(NOMINAL)

= 25°C

T

J

10

8

6

4

GND PIN CURRENT (mA)

2

0

0 50 100 150

OUTPUT CURRENT (mA)

+ 1V

200

300 350 400 450 500

250

LOAD

3028 G14

SHDN1 or SHDN2 Pin Threshold (On-to-Off)

1.0 IL = 1mA

0.9

0.8

0.7

0.6

0.5

0.4

0.3

SHDN PIN THRESHOLD (V)

0.2

0.1

0

–50

–25

0

TEMPERATURE (°C)

50

25

100

125

3028 G15

3028f

75

5

LT3028

UW

TYPICAL PERFOR A CE CHARACTERISTICS

SHDN1 or SHDN2 Pin Threshold (Off-to-On)

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

SHDN PIN THRESHOLD (V)

0.2

0.1

0

–50

–25

IL = FULL

IL = 1mA

50

25

0

TEMPERATURE (°C)

ADJ1 or ADJ2 Pin Bias Current

100

90

80

70

60

50

40

30

ADJ PIN BIAS CURRENT (nA)

20

10

0

–50

–25

0

TEMPERATURE (°C)

50

25

SHDN1 or SHDN2 Pin Input Current

1.0 TJ = 25°C

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

SHDN PIN INPUT CURRENT (µA)

0.1

100

125

3028 G16

75

0

0123

4

678910

5

SHDN PIN VOLTAGE (V)

3028 G17

SHDN1 or SHDN2 Pin Input Current

1.4

1.2

1.0

0.8

0.6

0.4

SHDN PIN INPUT CURRENT (µA)

0.2

0

–50

–25

25

0

TEMPERATURE (°C)

V

= 20V

SHDN

50

75

100

125

3028 G18

Output 2 Current Limit Output 2 Current Limit

350

V

= 0V

OUT2

= 25°C

T

J

300

250

200

150

100

SHORT-CIRCUIT CURRENT (mA)

50

100

125

3028 G19

75

0

2

1

INPUT VOLTAGE (V)

4

3

5

6

7

3028 G20

350

300

250

200

150

CURRENT LIMIT (mA)

100

50

0

–50

–25

50

25

0

TEMPERATURE (°C)

V

= 7V

IN2

= 0V

V

OUT2

100

125

3028 G21

75

6

Output 1 Current Limit

1.0 V

= 0V

OUT1

0.9

= 25°C

T

J

0.8

0.7

0.6

0.5

0.4

CURRENT LIMIT (A)

0.3

0.2

0.1

0

2

1

INPUT VOLTAGE (V)

Output 1 Current Limit

1.2

1.0

0.8

0.6

0.4

CURRENT LIMIT (A)

0.2

4

3

5

6

7

3028 G22

0

–50

–25

25

0

TEMPERATURE (°C)

V

= 7V

IN1

V

= 0V

OUT1

50

75

100

125

3028 G23

3028f

UW

TEMPERATURE (°C)

–50

RIPPLE REJECTION (dB)

100

3028 G28

050

80

70

60

50

40

30

20

10

0

–25 25 75 125

V

IN2

= V

OUT2(NOMINAL)

+

1V + 0.5V

P-P

RIPPLE AT f = 120Hz I

L

= 50mA

TEMPERATURE (°C)

–50

RIPPLE REJECTION (dB)

100

3028 G31

050

68

66

64

62

60

58

56

54

52

–25 25 75 125

V

IN1

= V

OUT1(NOMINAL)

+

1V + 0.5V

P-P

RIPPLE AT f = 120Hz I

L

= 500mA

TYPICAL PERFOR A CE CHARACTERISTICS

LT3028

Output 2 Input Ripple Rejection

80

70

60

50

40

30

RIPPLE REJECTION (dB)

20

IL = 100mA

= 2.3V + 50mV

V

IN2

10

= 0

C

BYP

= 25°C

T

J

0

0.1 100

0.01 1 10 1000

C

RMS

FREQUENCY (kHz)

OUT

= 1µF

RIPPLE

C

= 10µF

OUT

Output 1

Input Ripple Rejection

80

70

60

C

= 10µF

50

40

30

IL = 500mA

RIPPLE REJECTION (dB)

20

= V

V

IN1

OUT1(NOMINAL)

1V + 50mV

10

C

BYP

= 25°C

T

J

0

10 1k 10k 1M

RIPPLE

RMS

= 0

100 100k

FREQUENCY (Hz)

OUT

+

C

= 4.7µF

OUT

3028 G26

3028 G29

Output 2 Input Ripple Rejection

80

C

70

60

50

40

30

RIPPLE REJECTION (dB)

20

10

0

0.01 1 10 1000

C

= 100pF

BYP

IL = 100mA

= 2.3V + 50mV

V

IN2

= 10µF

C

OUT

= 25°C

T

J

0.1 100 FREQUENCY (kHz)

BYP

RMS

= 0.01µF

RIPPLE

C

BYP

= 1000pF

Output 1 Input Ripple Rejection

80

C

= 0.01µF

BYP

70

60

50

C

= 1000pF

BYP

40

30

IL = 500mA

RIPPLE REJECTION (dB)

20

= V

V

IN1

1V + 50mV

10

= 10µF

C

OUT

= 25°C

T

J

0

10 1k 10k 1M

C

= 100pF

BYP

OUT1(NOMINAL)

RMS

100 100k

+

RIPPLE

FREQUENCY (Hz)

Output 2 Input Ripple Rejection

3028 G27

Output 1 Ripple Rejection

3028 G30

Output 2 Minimum Input Voltage

2.5 V

OUT2

2.0

1.5

1.0

0.5

MINIMUM INPUT VOLTAGE (V)

0

–50

= 1.22V

–25

0

IL = 100mA

IL = 50mA

50

25

TEMPERATURE (°C)

Output 1 Minimum Input Voltage

2.50 V

= 1.22V

OUT1

2.25

2.00

1.75

1.50

1.25

1.00

0.75

0.50

MINIMUM INPUT VOLTAGE (V)

0.25

0

100

125

3028 G32

75

–50

–25

0

TEMPERATURE (°C)

IL = 500mA

IL = 1mA

50

25

75

100

125

3028 G33

3028f

7

LT3028

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Channel-to-Channel Isolation Output 2 Load Regulation

100

90

80

70

60

50

40

30

20

10

CHANNEL-TO-CHANNEL ISOLATION (dB)

0

10

CHANNEL 2

CHANNEL 1

GIVEN CHANNEL IS TESTED WITH 50mVRMS SIGNAL ON OPPOSING CHANNEL, BOTH CHANNELS DELIVERING FULL CURRENT

= 25°C

T

J

100 1k 1M10k 100k

FREQUENCY (Hz)

20mV/DIV

3028 G34

Output 1 Load Regulation

5

∆IL = 1mA TO 500mA

0

–5

LOAD REGULATION (mV)

Channel-to-Channel Isolation

0

–1

V

OUT1

OUT2

C C C

∆I ∆I

V

= 22µF50µs/DIV 3028 G50

OUT1

= 10µF

OUT2

= C

BYP1

L1 L2

= 6V, V

IN

= 0.01µF

BYP2

= 50mA TO 500mA = 10mA TO 100mA

OUT1

= V

OUT2

= 5V

–2

–3

–4

–5

–6

–7

LOAD REGULATION (mV)

–8

–9

∆IL = 1mA TO 100mA

–10

–50

05075

–25 25 100 125

TEMPERATURE (°C)

Output Noise Spectral Density Output Noise Spectral Density

10

1

0.1

C

= 10µF

OUT

= 0

C

BYP

= FULL LOAD

I

L

= 25°C

T

J

V

OUT

V

SET FOR 5V

=V

OUT

ADJ

10

0.1

1

V

OUT

V

OUT

C

SET FOR 5V

=V

ADJ

= 0.01µF

BYP

C

= 10µF

OUT

= FULL LOAD

I

L

= 25°C

T

J

C

= 1000pF

BYP

C

= 100pF

BYP

3028 G35

–10

–50

RMS Output Noise vs Bypass Capacitor

140

V

= 5V

OUT

120

)

100

RMS

OUTPUT 1

80

V

= 1.22V

OUT

60

40

OUTPUT NOISE (µV

20

0

10

OUTPUT 2

OUTPUT 1

050–25 25 75 125

TEMPERATURE (°C)

C

OUT

= FULL LOAD

I

L

= 10Hz TO 100kHz

f

BW

= 25°C

T

J

OUTPUT 2

100 1000 10000

C

(pF)

BYP

100

3028 G36

= 10µF

3028 G39

OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)

0.01

0.01 1 10 100

0.1 FREQUENCY (kHz)

Output 2 RMS Output Noise vs Load Current (10Hz to 100kHz)

160

C

= 10µF

OUT2

= 25°C

T

J

)

RMS

OUTPUT NOISE (µV

140

120

100

80

60

40

20

0

0.01

= 0

C

BYP

= 0.01µF

C

BYP

V

SET FOR 5V

OUT2

0.1 1 10010

LOAD CURRENT (mA)

V

OUT2

V

OUT2

SET FOR 5V

V

OUT2

=V

3028 G37

ADJ2

3028 G40

OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)

0.01

0.01 1 10 100

0.1 FREQUENCY (kHz)

Output 1 RMS Output Noise vs Load Current (10Hz to 100kHz)

160

C

= 10µF

OUT1

= 25°C

T

140

J

C

= 0

0

0.01

BYP

= 0.01µF

C

BYP

V

SET FOR 5V

OUT1

0.1 1 LOAD CURRENT (mA)

V

OUT1

V

OUT1

V

OUT1

10 100 1000

)

RMS

OUTPUT NOISE (µV

120

100

80

60

40

20

3028 G38

= V

ADJ1

SET FOR 5V

= V

ADJ1

3028 G41

3028f

8

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LT3028

V

OUT

100µV/DIV

V

OUT

100µV/DIV

10Hz to 100kHz Output Noise

= 0pF

C

BYP

= 10µF 1ms/DIV 3028 G42

C

OUT

IL = FULL LOAD

SET FOR 5V

V

OUT

10Hz to 100kHz Output Noise C

= 0.01µF

BYP

10Hz to 100kHz Output Noise

= 100pF

C

BYP

V

OUT

100µV/DIV

= 10µF 1ms/DIV 3028 G43

C

OUT

IL = FULL LOAD

SET FOR 5V

V

OUT

Output 2 Transient Response C

= 0pF

BYP

V

= 6V, V

IN2

0.2

= 10µF

C

IN2

C

OUT2

0.1 = 25°C

T

J

0

–0.1

DEVIATION (V)

OUTPUT VOLTAGE

–0.2

= 10µF

SET FOR 5V

OUT2

10Hz to 100kHz Output Noise C

BYP

V

OUT

100µV/DIV

C

OUT

IL = FULL LOAD V

OUT

Output 2 Transient Response C

BYP

V

IN2

0.04

C

IN2

C

OUT2

0.02 = 25°C

T

J

0

–0.02

DEVIATION (V)

OUTPUT VOLTAGE

–0.04

= 1000pF

= 10µF 1ms/DIV 3028 G44

SET FOR 5V

= 0.01µF

= 6V, V = 10µF

= 10µF

SET FOR 5V

OUT2

C

= 10µF 1ms/DIV 3028 G45

OUT

IL = FULL LOAD

SET FOR 5V

V

OUT

Output 1 Transient Response C

= 0pF

BYP

V

= 6V, V

IN1

0.4

= 10µF

C

IN1

= 10µF

C

OUT1

0.2 = 25°C

T

J

0

–0.2

DEVIATION (V)

OUTPUT VOLTAGE

–0.4

600

400

(mA)

200

LOAD CURRENT

0

0 200

SET FOR 5V

OUT1

400

LOAD CURRENT

600 800 1000

TIME (µs)

100

(mA)

50

0

0 400

3028 G48

800

1200 1600 2000

TIME (µs)

100

50

(mA)

0

LOAD CURRENT

3028 G46

Output 1 Transient Response C

= 0.01µF

BYP

V

0.10

0.05

–0.05

DEVIATION (V)

OUTPUT VOLTAGE

–0.10

600

400

(mA)

200

LOAD CURRENT

0

C

IN1

C

OUT1

T

J

0203050709010

= 10µF

= 25°C

= 6V, V

IN1

= 10µF

OUT1

40

SET FOR 5V

TIME (µs)

0 40 60 10020

60 80 100

80

120 140 180160 200

TIME (µs)

3028 G49

3028 G47

3028f

9

LT3028

U

PI FU CTIO S

GND (Pins 5, 17)/(Pins 1, 5, 8, 9, 16, 17): Ground. The Exposed Pad must be soldered to PCB ground for optimum thermal performance.

ADJ1/ADJ2 (Pins 16/9)/(Pins 15/10): Adjust Pin. These are the inputs to the error amplifiers. These pins are internally clamped to ±7V. They have a bias current of 30nA which flows into the pin (see curve of ADJ1/ADJ2 Pin Bias Current vs Temperature in the Typical Performance Characteristics section). The ADJ1 and ADJ2 pin voltage is 1.22V referenced to ground and the output voltage range is 1.22V to 20V.

BYP1/BYP2 (Pins 1/8)/(Pins 2/7): Bypass. The BYP1/BYP2 pins are used to bypass the reference of the LT3028 regulator to achieve low noise performance from the regulator. The BYP1/BYP2 pins are clamped internally to ±0.6V (one V corresponding output to this pin will bypass the reference to lower the output voltage noise. A maximum value of

0.01µF can be used for reducing output voltage noise to a typical 20µV used, this pin must be left unconnected.

OUT1/OUT2 (Pins 3, 4/6, 7)/(Pins 3, 4/6): Output. The outputs supply power to the loads. A minimum output capacitor of 1µF is required to prevent oscillations on Output 2; Output 1 requires a minimum of 3.3µF. Larger output capacitors will be required for applications with large transient loads to limit peak voltage transients. See the Applications Information section for more information on output capacitance and reverse output characteristics.

) from ground. A small capacitor from the

BE

RMS

UU

(DFN Package)/(TSSOP Package)

over a 10Hz to 100kHz bandwidth. If not

SHDN1/SHDN2 (Pins 15/10)/(Pins 14/11): Shutdown. The SHDN1/SHDN2 pins are used to put the corresponding output of the LT3028 regulator into a low power shutdown state. The output will be off when the pin is pulled low. The SHDN1/SHDN2 pins can be driven either by 5V logic or open-collector logic with pull-up resistors. The pull-up resistors are required to supply the pull-up current of the open-collector gates, normally several microamperes, and the SHDN1/SHDN2 pin current, typically 1µA. If unused, the pin must be connected to VIN. The device will not function if the SHDN1/SHDN2 pins are not connected.

IN1/IN2 (Pins 13, 14/11, 12)/(Pins 13/12): Inputs. Power is supplied to the device through the IN pins. A bypass capacitor is required on these pins if the device is more than six inches away from the main input filter capacitor. In general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. A bypass capacitor in the range of 1µF to 10µF is sufficient. The LT3028 regulator is designed to withstand reverse voltages on the IN pins with respect to ground and the OUT pins. In the case of a reverse input, which can happen if a battery is plugged in backwards, the device will act as if there is a diode in series with its input. There will be no reverse current flow into the regulator and no reverse voltage will appear at the load. The device will protect both itself and the load.

WUUU

APPLICATIO S I FOR ATIO

The LT3028 is a dual 100mA/500mA low dropout regulator with independent inputs, micropower quiescent current, and shutdown. The device is capable of supplying 100mA from Output 2 at a dropout voltage of 300mV. Output 1 delivers 500mA at a dropout voltage of 320mV. The two regulators have common GND pins and are thermally coupled, however, the two inputs and outputs of the LT3028 operate independently. They can be shut down

10

independently and a fault condition on one output will not affect the other output electrically. Output voltage noise can be lowered to 20µV bandwidth with the addition of a 0.01µF reference bypass capacitor. Additionally, the reference bypass capacitor will improve transient response of the regulator, lowering the settling time for transient load conditions. The low operating quiescent current (30µA per output) drops to less

over a 10Hz to 100kHz

RMS

3028f

WUUU

APPLICATIO S I FOR ATIO

LT3028

than 1µA in shutdown. In addition to the low quiescent current, the LT3028 regulator incorporates several protection features which make it ideal for use in batterypowered systems. The device is protected against reverse input voltages. Additionally, in dual supply applications where the regulator load is returned to a negative supply, the output can be pulled below ground by as much as 20V and still allow the device to start and operate.

Adjustable Operation

The LT3028 has an output voltage range of 1.22V to 20V. The output voltage is set by the ratio of two external resistors as shown in Figure 1. The device servos the output to maintain the corresponding ADJ pin voltage at 1.22V referenced to ground. The current in R1 is then equal to

1.22V/R1 and the current in R2 is the current in R1 plus the ADJ pin bias current. The ADJ pin bias current, 30nA at 25°C, flows through R2 into the ADJ pin. The output voltage can be calculated using the formula in Figure 1. The value of R1 should be no greater than 250k to minimize errors in the output voltage caused by the ADJ pin bias current. Note that in shutdown the output is turned off and the divider current will be zero. Curves of ADJ Pin Voltage vs Temperature and ADJ Pin Bias Current vs Temperature appear in the Typical Performance Characteristics.

is –1mV typical at V

= 1.22V. At V

OUT

= 12V, load

OUT

regulation is:

(12V/1.22V)(–1mV) = –9.8mV

Bypass Capacitance and Low Noise Performance

The LT3028 regulator may be used with the addition of a bypass capacitor from V

to the corresponding BYP pin

OUT

to lower output voltage noise. A good quality low leakage capacitor is recommended. This capacitor will bypass the reference of the regulator, providing a low frequency noise pole. The noise pole provided by this bypass capacitor will lower the output voltage noise to as low as 20µV

RMS

with the addition of a 0.01µF bypass capacitor. Using a bypass capacitor has the added benefit of improving transient response. With no bypass capacitor and a 10µF output capacitor, a 10mA to 100mA load step on Output 2 will settle to within 1% of its final value in less than 100µs. With the addition of a 0.01µF bypass capacitor, the output will stay within 1% for the same load step. Both outputs exhibit this improvement in transient response (see Transient Reponse in Typical Performance Characteristics section). However, regulator start-up time is inversely proportional to the size of the bypass capacitor, slowing to 15ms with a 0.01µF bypass capacitor and 10µF output capacitor.

The device is tested and specified with the ADJ pin tied to the corresponding OUT pin for an output voltage of 1.22V. Specifications for output voltages greater than 1.22V will be proportional to the ratio of the desired output voltage to 1.22V: V

/1.22V. For example, load regulation on

OUT

Output 2 for an output current change of 1mA to 100mA

OUT1/OUT2

IN1/IN2

LT3028

V

IN

ADJ1/ADJ2

GND

Figure 1. Adjustable Operation

R1

3024 F01

V

OUT

+

VV

=+

R2

122 1

OUT ADJ

VV

=

122

ADJ

InAATC

=°

30 25

ADJ

OUTPUT RANGE V TO V

R

2

⎛

⎞

IR

+

.

⎜

⎟

⎝

⎠

R

1

.

122 20

= .

2

()()

Output Capacitance and Transient Response

The LT3028 regulator is designed to be stable with a wide range of output capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. A minimum output capacitor of 1µF with an ESR of 3Ω or less is recommended for Output 2 to prevent oscillations. A minimum output capacitor of 3.3µF with an ESR of 3Ω or less is recommended for Output 1. The LT3028 is a micropower device and output transient response will be a function of output capacitance. Larger values of output capacitance decrease the peak deviations and provide improved transient response for larger load current changes. Bypass capacitors, used to decouple individual components powered by the LT3028, will increase the effective output capacitor value. With larger capacitors

3028f

11

LT3028

WUUU

APPLICATIO S I FOR ATIO

used to bypass the reference (for low noise operation), larger values of output capacitors are needed. For 100pF of bypass capacitance on Output 2, 2.2µF of output capacitor is recommended. With a 330pF bypass capacitor or larger on this output, a 3.3µF output capacitor is recommended. For Output 1, 4.7µF of output capacitor is recommended for 100pF of bypass capacitance. With 1000pF or larger bypass capacitor on this output, a 6.8µF output capacitor is recommended. The shaded region of Figures 2 and 3 define the regions over which the LT3028 regulator is stable. The minimum ESR needed is defined by the amount of bypass capacitance used, while the maximum ESR is 3Ω.

4.0

3.5

3.0

2.5

2.0

ESR (Ω)

C

1.5

BYP

C

1.0

0.5

0

1

STABLE REGION

= 0

= 100pF

BYP

C

= 330pF

BYP

C

> 3300pF

BYP

310

245

OUTPUT CAPACITANCE (µF)

6789

3028 F02

Extra consideration must be given to the use of ceramic capacitors. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. The most common dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics are good for providing high capacitances in a small package, but exhibit strong voltage and temperature coefficients as shown in Figures 4 and 5. When used with a 5V regulator, a 10µF Y5V capacitor can exhibit an effective value as low as 1µF to 2µF over the operating temperature range. The X5R and X7R dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. The X7R type has better stability across temperature, while the X5R is less expensive and is available in higher values.

4.0

3.5

3.0

2.5

2.0

ESR (Ω)

C

BYP

1.5

1.0

0.5

0

1

STABLE REGION

= 0

C

= 100pF

BYP

OUTPUT CAPACITANCE (µF)

C

= 330pF

BYP

C

BYP

310

245

≥ 1000pF

6

78

9

3028 F03

Figure 2. Output 2 Stability

20

0

–20

–40

–60

CHANGE IN VALUE (%)

–80

–100

0

BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF

X5R

Y5V

26

4

8

DC BIAS VOLTAGE (V)

14

12

10

3028 F04

Figure 4. Ceramic Capacitor DC Bias Characteristics

12

Figure 3. Output 1 Stability

40

20

0

–20

–40

–60

CHANGE IN VALUE (%)

–80

BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF

–100

–50

16

–25 0

25 75

TEMPERATURE (°C)

X5R

Y5V

50 100 125

3028 F05

Figure 5. Ceramic Capacitor Temperature Characteristics

3028f

WUUU

APPLICATIO S I FOR ATIO

LT3028

Voltage and temperature coefficients are not the only sources of problems. Some ceramic capacitors have a piezoelectric response. A piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor the stress can be induced by vibrations in the system or thermal transients. The resulting voltages produced can cause appreciable amounts of noise, especially when a ceramic capacitor is used for noise bypassing. A ceramic capacitor produced Figure 6’s trace in response to light tapping from a pencil. Similar vibration induced behavior can masquerade as increased output voltage noise.

C

= 10µF

OUT

C

= 0.01µF

BYP

= 100mA

I

LOAD

V

OUT

500µV/DIV

100ms/DIV 3028 F05

Figure 6. Noise Resulting from Tapping on a Ceramic Capacitor

Thermal Considerations

The power handling capability of the device will be limited by the maximum rated junction temperature (125°C). The power dissipated by the device will be made up of two components for each output:

For continuous normal conditions, the maximum junction temperature rating of 125°C must not be exceeded. It is important to give careful consideration to all sources of thermal resistance from junction to ambient. Additional heat sources mounted nearby must also be considered.

For surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the PC board and its copper traces. Copper board stiffeners and plated through-holes can also be used to spread the heat generated by power devices.

The following tables list thermal resistance for several different board sizes and copper areas. All measurements were taken in still air on 3/32" FR-4 board with one ounce copper.

Table 1. FE Package, 16-Lead TSSOP

COPPER AREA THERMAL RESISTANCE

TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)

2500mm22500mm

1000mm22500mm

2

225mm

100mm

*Device is mounted on topside.

2

2500mm

2

2500mm

Table 2. DHC Package, 16-Lead DFN

COPPER AREA THERMAL RESISTANCE

TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)

2500mm22500mm

1000mm22500mm

2

225mm

100mm

*Device is mounted on topside.

2

2500mm

2

2500mm

2

38°C/W

43°C/W

48°C/W

60°C/W

40°C/W

45°C/W

50°C/W

62°C/W

1. Output current multiplied by the input/output voltage differential: (I

)(VIN – V

OUT

), and

2. GND pin current multiplied by the input voltage: (I

)(VIN).

GND

The ground pin current can be found by examining the GND Pin Current curves in the Typical Performance Characteristics section. Power dissipation will be equal to the sum of the two components listed above.

The LT3028 regulator has internal thermal limiting designed to protect the device during overload conditions.

The thermal resistance junction-to-case (θJC), measured at the Exposed Pad on the back of the die is 10°C/W for the DFN package and 8°C/W for the TSSOP package.

Calculating Junction Temperature

Example: Given Output 1 set for an output voltage of 3.3V, Output 2 set for an output voltage of 2.5V, an input voltage range of 3.8V to 5V, an output current range of 0mA to 500mA for Output 1, an output current range of 0mA to 100mA for Output 2 and a maximum ambient temperature of 50°C, what will the maximum junction temperature be?

3028f

13

LT3028

U

WUU

APPLICATIONS INFORMATION

The power dissipated by each output will be equal to:

I

OUT(MAX)(VIN(MAX)

Where for Output 1:

I

OUT(MAX)

V

IN(MAX)

I

GND

For Output 2:

I

OUT(MAX)

V

IN(MAX)

I

GND

So for Output 1:

P = 500mA (5V – 3.3V) + 9mA (5V) = 0.90W

For Output 2:

P = 100mA (5V – 2.5V) + 2mA (5V) = 0.26W

The thermal resistance will be in the range of 35°C/W to 55°C/W depending on the copper area. So the junction temperature rise above ambient will be approximately equal to:

(0.90W + 0.26W) 50°C/W = 57.8°C

The maximum junction temperature will then be equal to the maximum junction temperature rise above ambient plus the maximum ambient temperature or:

at (I

= 500mA

= 5V

OUT

= 100mA

= 5V

OUT

– V

= 500mA, VIN = 5V) = 9mA

= 100mA, VIN = 5V) = 2mA

OUT

) + I

GND(VIN(MAX)

)

Current limit protection and thermal overload protection are intended to protect the device against current overload conditions at the output of the device. For normal operation, the junction temperature should not exceed 125°C.

The input of the device will withstand reverse voltages of 20V. Current flow into the device will be limited to less than 1mA (typically less than 100µA) and no negative voltage will appear at the output. The device will protect both itself and the load. This provides protection against batteries which can be plugged in backward.

The output of the LT3028 can be pulled below ground without damaging the device. If the input is left open circuit or grounded, the output can be pulled below ground by 20V. The output will act like an open circuit; no current will flow out of the pin. If the input is powered by a voltage source, the output will source the short-circuit current of the device and will protect itself by thermal limiting. In this case, grounding the SHDN1/SHDN2 pins will turn off the device and stop the output from sourcing the short-circuit current.

The ADJ pins can be pulled above or below ground by as much as 7V without damaging the device. If the input is left open circuit or grounded, the ADJ pins will act like an open circuit when pulled below ground and like a large resistor (typically 100k) in series with a diode when pulled above ground.

T

= 50°C + 57.8°C = 107.8°C

JMAX

Protection Features

The LT3028 regulator incorporates several protection features which make it ideal for use in battery-powered circuits. In addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the device is protected against reverse input voltages and reverse voltages from output to input. The two regulators have common inputs and GND pins and are thermally coupled, however, the two outputs of the LT3028 operate independently. They can be shut down independently and a fault condition on one output will not affect the other output electrically.

14

In situations where the ADJ pins are connected to a resistor divider that would pull the pins above their 7V clamp voltage if the output is pulled high, the ADJ pin input current must be limited to less than 5mA. For example, a resistor divider is used to provide a regulated 1.5V output from the 1.22V reference when the output is forced to 20V. The top resistor of the resistor divider must be chosen to limit the current into the ADJ pin to less than 5mA when the ADJ pin is at 7V. The 13V difference between output and ADJ pin divided by the 5mA maximum current into the ADJ pin yields a minimum top resistor value of 2.6k.

3028f

LT3028

U

WUU

APPLICATIONS INFORMATION

In circuits where a backup battery is required, several different input/output conditions can occur. The output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage or is left open circuit.

When the IN pin of the LT3028 is forced below either OUT pin or either OUT pin is pulled above the IN pin, input current

U

PACKAGE DESCRIPTIO

FE Package

16-Lead Plastic TSSOP (4.4mm)

(Reference LTC DWG # 05-08-1663)

Exposed Pad Variation BB

3.58

(.141)

for the corresponding regulator will typically drop to less than 2µA. This can happen if the input of the device is connected to a discharged (low voltage) battery and the output is held up by either a backup battery or a second regulator circuit. The state of the SHDN1/SHDN2 pin will have no effect on the reverse output current when the output is pulled above the input.

4.90 – 5.10* (.193 – .201)

3.58

(.141)

16 1514 13 12 11

10 9

6.60 ±0.10

4.50 ±0.10

RECOMMENDED SOLDER PAD LAYOUT

0.09 – 0.20

(.0035 – .0079)

NOTE:

1. CONTROLLING DIMENSION: MILLIMETERS

2. DIMENSIONS ARE IN

3. DRAWING NOT TO SCALE

SEE NOTE 4

0.65 BSC

4.30 – 4.50* (.169 – .177)

0.50 – 0.75

(.020 – .030)

MILLIMETERS

(INCHES)

0.45 ±0.05

2.94

(.116)

1.05 ±0.10

1345678

2

0.25 REF

0° – 8°

0.65

(.0256)

BSC

0.195 – 0.30

(.0077 – .0118)

TYP

4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT

*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE

2.94

(.116)

1.10

(.0433)

MAX

0.05 – 0.15

(.002 – .006)

FE16 (BB) TSSOP 0204

6.40

(.252)

BSC

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

3028f

15

LT3028

PACKAGE DESCRIPTIO

3.50 ±0.05

1.65 ±0.05 (2 SIDES)

2.20 ±0.05

0.25 ± 0.05

0.50 BSC

4.40 ±0.05 (2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

NOTE:

1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

U

DHC Package

16-Lead Plastic DFN (5mm × 3mm)

(Reference LTC DWG # 05-08-1706)

5.00 ±0.10 (2 SIDES)

0.65 ±0.05

PACKAGE OUTLINE

PIN 1

TOP MARK

(SEE NOTE 6)

0.200 REF

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE

3.00 ±0.10 (2 SIDES)

0.75 ±0.05

R = 0.20

1.65 ± 0.10 (2 SIDES)

0.00 – 0.05

TYP

R = 0.115

TYP

0.25 ± 0.05

0.50 BSC

4.40 ±0.10 (2 SIDES)

BOTTOM VIEW—EXPOSED PAD

169

18

0.40 ± 0.10

PIN 1 NOTCH

(DHC16) DFN 1103

RELATED PARTS

PART NUMBER DESCRIPTION COMMENTS

LT1129 700mA, Micropower, LDO VIN: 4.2V to 30V, V

OUT(MIN) =

DD, SOT-223, S8,TO220, TSSOP20 Packages

LT1175 500mA, Micropower Negative LDO Guaranteed Voltage Tolerance and Line/Load Regulation

: –20V to –4.3V, V

V

IN

DD,SOT-223, S8 Packages

LT1185 3A, Negative LDO Accurate Programmable Current Limit, Remote Sense

: –35V to –4.2V, V

V

IN

LT1761 100mA, Low Noise Micropower, LDO Low Noise < 20µV

: 1.8V to 20V, V

V

IN

LT1762 150mA, Low Noise Micropower, LDO Low Noise < 20µV

VIN: 1.8V to 20V, V

LT1763 500mA, Low Noise Micropower, LDO Low Noise < 20µV

VIN: 1.8V to 20V, V

LT1764/LT1764A 3A, Low Noise, Fast Transient Response, LDO Low Noise < 40µV

: 2.7V to 20V, V

V

IN

LTC1844 150mA, Very Low Drop-Out LDO Low Noise < 30µV

VIN: 1.6V to 6.5V, V

LT1962 300mA, Low Noise Micropower, LDO Low Noise < 20µV

VIN: 1.8V to 20V, V

LT1963/LT1963A 1.5A, Low Noise, Fast Transient Response, LDO Low Noise < 40µV

: 2.1V to 20V, V

V

IN

RMS,

OUT(MIN) =

RMS,

OUT(MIN) =

RMS,

OUT(MIN) =

RMS,

OUT(MIN) =

RMS

OUT(MIN) =

RMS,

OUT(MIN) =

RMS,

OUT(MIN) =

DD, TO220, SOT-223, S8 Packages

LT1964 200mA, Low Noise Micropower, Negative LDO Low Noise < 30µV

: –0.9V to –20V, V

V

IN

LT3023 Dual 100mA, Low Noise, Micropower LDO Low Noise < 20µV

: 1.8V to 20V, V

V

IN

LT3024 Dual 100mA/500mA, Low Noise, Low Noise < 20µV

Micropower LDO V

: 1.8V to 20V, V

IN

RMS,

OUT(MIN) =

RMS,

OUT(MIN) =

3.75V, IQ = 50µA, I

OUT(MIN) =

–3.8V, IQ = 45µA, I

–2.40V, IQ = 2.5mA, ISD < 1µA, TO220-5 Package

SD <

16µA,

SD <

Stable with 1µF Ceramic Capacitors,

1.22V, IQ = 20µA, ISD < 1µA, ThinSOT Package

1.22V, IQ = 25µA, ISD < 1µA, MS8 Package

1.22V, IQ = 30µA, ISD < 1µA, S8 Package

"A" Version Stable with Ceramic Capacitors,

1.21V, IQ = 1mA, ISD < 1µA, DD, TO220 Packages

, Stable with 1µF Ceramic Capacitors,

1.25V, IQ = 40µA, ISD < 1µA, ThinSOT Package

1.22V, IQ = 30µA, ISD < 1µA, MS8 Package

"A" Version Stable with Ceramic Capacitors,

1.21V, IQ = 1mA, ISD < 1µA,

Stable with Ceramic Capacitors,

OUT(MIN) =

–1.21V, IQ = 30µA, I

SD <

Stable with 1µF Ceramic Capacitors,

1.22V, IQ = 40µA, ISD < 1µA, MS10E, DFN Packages

Stable with 1µF Ceramic Capacitors,

1.22V, IQ = 30µA, ISD < 1µA, DFN, TSSOP Packages

10µA,

3µA, ThinSOT Package

16

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507

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3028f

LT/TP 0904 1K • PRINTED IN USA