The LT®3021 is a very low dropout voltage (VLDOTM) linear
regulator that operates from input supplies down to 0.9V.
This device supplies 500mA of output current with a
typical dropout voltage of 160mV. The LT3021 is ideal for
low input voltage to low output voltage applications,
providing comparable electrical efficiency to that of a
switching regulator.
The LT3021 regulator optimizes stability and transient
response with low ESR, ceramic output capacitors as
small as 3.3µF. Other LT3021 features include 0.05%
typical line regulation and 0.2% typical load regulation. In
shutdown, quiescent current typically drops to 3µA.
Internal protection circuitry includes reverse-battery protection, current limiting, thermal limiting with hysteresis,
and reverse-current protection. The LT3021 is available as
an adjustable output device with an output range down to
the 200mV reference. Three fixed output voltages, 1.2V,
1.5V and 1.8V, are also available.
The LT3021 regulator is available in the low profile
(0.75mm) 16-pin (5mm × 5mm) DFN package with exposed pad and the 8-lead SO package.
, LTC and LT are registered trademarks of Linear Technology Corporation. VLDO is a
trademark of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
TYPICAL APPLICATIO
1.8V to 1.5V, 500mA VLDO Regulator
V
1.8V
IN
3.3µF
IN
LT3021-1.5
SHDN
OUT
SENSE
GND
3021 TA01
U
3.3µF
V
OUT
1.5V
500mA
Minimum Input Voltage
1.1
IL = 500mA
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
MINIMUM INPUT VOLTAGE (V)
0.2
0.1
0
–50
250–255075
TEMPERATURE (°C)
125100
3021 TA02
3021fa
1
Page 2
LT3021/LT3021-1.2/
LT3021-1.5/LT3021-1.8
WWWU
ABSOLUTE AXI U RATI GS
(Note 1)
IN Pin Voltage ........................................................ ± 10V
OUT Pin Voltage .................................................... ±10V
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LT3021 regulators are tested and specified under pulse load
conditions such that T
= 25°C. Performance at –40°C and 125°C is assured by design,
T
A
≈ TA. The LT3021 is 100% production tested at
J
characterization and correlation with statistical process controls.
Note 3: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 4: Maximum junction temperature limits operating conditions. The
regulated output voltage specification does not apply for all possible
combinations of input voltage and output current. Limit the output current
range if operating at maximum input voltage. Limit the input voltage range
if operating at maximum output current.
Note 5: Typically the LT3021 supplies 500mA output current with a 1V
input supply. The guranteed minimum input voltage for 500mA output
current is 1.10V.
Note 6: The LT3021 is tested and specified for these conditions with an
external resistor divider (20k and 30.1k) setting V
resistor divider adds 10µA of output load current. The line regulation and
load regulation specifications refer to the change in the 0.2V reference
voltage, not the 0.5V output voltage. Specifications for fixed output voltage
devices are referred to the output voltage.
= 10V, V
IN
= V
V
IN
= –10V, V
IN
= 0V1.8A
OUT
OUT(NOMINAL)
OUT
LT3021-1.5V
LT3021-1.8V
to 0.5V. The external
OUT
+ 0.5V, ∆V
OUT
= –5%
●
550mA
= 0V120µA
OUT
OUT
OUT
OUT
= 1.2V, V
= 1.2V, V
= 1.5V, V
= 1.8V, V
= 0V0.55µA
IN
= 0V1015µA
IN
= 0V1015µA
IN
= 0V1015µA
IN
Note 7: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout the
output voltage equals: (V
IN
– V
Note 8: GND pin current is tested with V
DROPOUT
).
= V
IN
OUT(NOMINAL)
+ 0.4V and a
current source load. GND pin current will increase in dropout. See GND
pin current curves in the Typical Performance Characteristics section.
Note 9: Adjust pin bias current flows out of the ADJ pin.
Note 10: Shutdown pin current flows into the SHDN pin.
Note 11: Reverse output current is tested with IN grounded and OUT
forced to the rated output voltage. This current flows into the OUT pin and
out of the GND pin. For fixed voltage devices this includes the current in
the output resistor divider.
Note 12: The LT3021 is tested and specified for these conditions with an
external resistor divider (20k and 100k) setting V
to 1.2V. The external
OUT
resistor divider adds 10µA of load current.Note 13: Reverse current is higher for the case of (rated_output) < V
because the no-load recovery circuitry is active in this region and is
V
IN,
OUT
trying to restore the output voltage to its nominal value.
Note 14: Minimum input voltage is the minimum voltage required by the
control circuit to regulate the output voltage and supply the full 500mA
rated current. This specification is tested at V
= 0.5V. At higher output
OUT
voltages the minimum input voltage required for regulation will be equal to
the regulated output voltage V
plus the dropout voltage.
OUT
<
TYPICAL PERFOR A CE CHARACTERISTICS
Dropout VoltageDropout Voltage
250
225
200
175
150
125
100
75
DROPOUT VOLTAGE (mV)
50
25
0
0
4
TJ = 125°C
TJ = 25°C
200100300
OUTPUT CURRENT (mA)
400
UW
500
3021 G01
250
V
= 1.2V
OUT
225
200
175
150
125
100
75
DROPOUT VOLTAGE (mV)
50
25
0
–50
TEMPERATURE (°C)
250–255075
Minimum Input Voltage
IL = 500mA
IL = 250mA
IL = 100mA
IL = 50mA
IL = 10mA
IL = 1mA
125100
3021 G02
3021fa
Page 5
TEMPERATURE (°C)
–50
250
225
200
150
175
125
100
75
50
25
0
250–255075
125100
QUIESCENT CURRENT (µA)
3021 G05
VIN = 6V
V
OUT
= 1.2V
I
L
= 0
V
SHDN
= V
IN
V
SHDN
= 0V
UW
TEMPERATURE (°C)
–50
OUTPUT VOLTAGE (V)
1.83
1.82
1.81
1.80
1.79
1.78
1.77
2575
3021 G22
–250
50100 125
I
LOAD
= 1mA
TYPICAL PERFOR A CE CHARACTERISTICS
LT3021/LT3021-1.2/
LT3021-1.5/LT3021-1.8
ADJ Pin Voltage
206
204
202
200
198
ADJ PIN VOLTAGE (mV)
196
194
–50
TEMPERATURE (°C)
Output Voltage
1.23
I
= 1mA
LOAD
1.22
1.21
1.20
1.19
OUTPUT VOLTAGE (V)
1.18
250–255075
3021 G04
125100
OUTPUT VOLTAGE (V)
25
20
15
10
ADJ PIN BIAS CURRENT (nA)
5
0
–50
250–255075
TEMPERATURE (°C)
Output Voltage
1.53
I
= 1mA
LOAD
1.52
1.51
1.50
1.49
1.48
Quiescent CurrentADJ Pin Bias Current
125100
3021 G11
Output Voltage
1.17
3.0
2.5
2.0
1.5
1.0
QUIESCENT CURRENT (mA)
0.5
–50
–250
TEMPERATURE (°C)
Quiescent Current
V
= 1.2V
OUT
= 0
I
L
= 25°C
T
J
V
= V
SHDN
IN
0
0
32158476
INPUT VOLTAGE (V)
50100 125
2575
V
= 0V
SHDN
3021 G28
3021 G03
1.47
–50
3.0
2.5
2.0
1.5
1.0
QUIESCENT CURRENT (mA)
0.5
109
0
50100 125
–250
2575
TEMPERATURE (°C)
Quiescent Current
V
= 1.5V
OUT
= 0
I
L
= 25°C
T
J
V
= V
SHDN
IN
V
2468
INPUT VOLTAGE (V)
SHDN
= 0V
3021 G23
3021 G26
10103579
Quiescent Current
3.0
V
= 1.8V
OUT
= 0
I
L
= 25°C
T
2.5
J
2.0
1.5
V
= V
SHDN
1.0
QUIESCENT CURRENT (mA)
0.5
0
2468
INPUT VOLTAGE (V)
IN
V
= 0V
SHDN
10103579
3021 G27
3021fa
5
Page 6
LT3021/LT3021-1.2/
TEMPERATURE (°C)
–50
0
3021 G13
250–255075
125100
VIN = 0V
V
OUT
= 1.2V
REVERSE OUTPUT CURRENT (µA)
500
450
400
300
350
250
200
150
100
50
0
SHDN PIN VOLTAGE (V)
0
SHDN PIN INPUT CURRENT (µA)
5.0
4.5
4.0
3.0
3.5
2.5
2.0
1.5
1.0
0.5
0
8
3021 G09
213579
4
6
10
LT3021-1.5/LT3021-1.8
UW
TYPICAL PERFOR A CE CHARACTERISTICS
GND Pin Current
8
7
6
5
4
3
GND PIN CURRENT (mA)
2
1
0
RL = 2.4Ω
= 500mA
I
L
RL = 4.8Ω
= 250mA
I
L
RL = 12Ω
I
= 100mA
L
RL = 1.2k, IL = 1mA
213579
0
INPUT VOLTAGE (V)
GND Pin Current vs I
10
V
= 10V
SHDN
9
8
7
6
5
4
3
GND PIN CURRENT (mA)
2
1
0
0
LOAD CURRENT (mA)
RL = 24Ω
I
= 50mA
L
4
200100300
6
LOAD
V
= 1.2V
OUT
= 25°C
T
J
RL = 120Ω
I
= 10mA
L
8
400
3021 G06
3021 G07
10
500
GND Pin Current
8
7
6
5
4
3
GND PIN CURRENT (mA)
2
1
0
RL = 3Ω
= 500mA
I
L
RL = 6Ω
= 250mA
I
L
RL = 15Ω
= 100mA
I
L
RL = 1.5k, IL = 1mA
2468
INPUT VOLTAGE (V)
RL = 30Ω
= 50mA
I
L
V
= 1.5V
OUT
= 25°C
T
J
RL = 150Ω
= 10mA
I
L
10103579
3021 G24
GND Pin Current
9
8
7
6
5
4
3
GND PIN CURRENT (mA)
2
1
0
RL = 3.6Ω
= 500mA
I
L
RL = 7.2Ω
= 250mA
I
L
RL = 18Ω
= 100mA
I
L
RL = 1.8k, IL = 1mA
2468
INPUT VOLTAGE (V)
SHDN Pin ThresholdSHDN Pin Input Current
1.0
IL = 1mA
0.9
0.8
0.7
0.6
0.5
0.4
0.3
SHDN PIN THRESHOLD (V)
0.2
0.1
0
–50
250–255075
TEMPERATURE (°C)
125100
3021 G08
RL = 36Ω
= 50mA
I
L
V
= 1.8V
OUT
= 25°C
T
J
RL = 180Ω
= 10mA
I
L
10103579
3021 G25
SHDN Pin Input Current
5
V
= 10V
SHDN
4
3
2
1
SHDN PIN INPUT CURRENT (µA)
0
0
–50
6
250–255075
TEMPERATURE (°C)
125100
3021 G10
Current Limit
2.0
1.8
1.6
1.4
1.2
1.0
0.8
CURRENT LIMIT (A)
0.6
0.4
0.2
0
0
–50
VIN = 10V
VIN = 1.7V
250–255075
TEMPERATURE (°C)
V
= 0V
OUT
125100
3021 G12
Reverse Output Current
3021fa
Page 7
UW
TEMPERATURE (°C)
–50
LOAD REGULATION (mV)
2.5
2.0
1.5
0.5
1.0
0
–0.5
–1.0
–1.5
–2.0
–2.5
3021 G17
250–255075
125100
VIN = 1.15V
V
OUT
= 0.5V
*LOAD REGULATION NUMBER REFERS
TO CHANGE IN THE 200mV REFERENCE
VOLTAGE
FREQUENCY (Hz)
10
OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)
10
1
0.1
0.01
1k100k1M10010k
3021 G18
V
OUT
= 1.2V
I
L
= 500mA
C
OUT
= 4.7µF
TYPICAL PERFOR A CE CHARACTERISTICS
LT3021/LT3021-1.2/
LT3021-1.5/LT3021-1.8
Input Ripple Rejection
70
60
50
40
30
20
INPUT RIPPLE REJECTION (dB)
VIN = 1.5V + 50mV
10
= 0.5V
V
OUT
= 500mA
I
L
0
101k10k1M
100
RMS
FREQUENCY (Hz)
RIPPLE
C
C
OUT
No-Load Recovery Threshold
18
16
14
12
10
8
6
4
OUTPUT SINK CURRENT (mA)
2
0
0
OUTPUT OVERSHOOT (%)
OUT
100k
= 22µF
= 4.7µF
3021 G14
Input Ripple Rejection
100
90
80
70
60
50
40
30
20
INPUT RIPPLE REJECTION (dB)
10
15105
VIN = 1.5V + 0.5V
= 0.5V
V
OUT
= 500mA
I
L
0
–50
20
3021 G20
P-P
250–255075
TEMPERATURE (°C)
RIPPLE AT 120Hz
Load Regulation
∆I
= 1mA to 500mA
L
125100
3021 G15
Output Noise Spectral Density
RMS Output Noise vs Load
Current (10Hz to 100kHz)
300
V
= 1.2V
OUT
= 4.7µF
C
OUT
250
)
RMS
200
150
100
OUTPUT NOISE (µV
50
0
0.01110100
0.1
LOAD CURRENT (mA)
3021 G19
V
OUT
50mV/DIV
I
OUT
500mA/DIV
Transient Response
I
= 50mA TO 500mA
OUT
= 1.5V
V
IN
= 1.2V
V
OUT
= 22µF
C
OUT
50µs/DIV
3021 G21
3021fa
7
Page 8
LT3021/LT3021-1.2/
LT3021-1.5/LT3021-1.8
U
PI FU CTIO S
UU
(DH Package/S8 Package)
OUT (Pins 3, 4/Pin 2): These pins supply power to the load.
Use a minimum output capacitor of 3.3µF to prevent oscil-
lations. Applications with large load transients require larger
output capacitors to limit peak voltage transients. See the
Applications Information section for more information on
output capacitance and reverse output characteristics.
SENSE (Pin 7/Pin 3, Fixed Voltage Device Only): This pin
is the sense point for the internal resistor divider. It should
be tied directly to the OUT pins (1, 2) for best results.
ADJ (Pin 7/Pin 3): This pin is the inverting terminal to the
error amplifier. Its typical input bias current of 20nA flows
out of the pin (see curve of ADJ Pin Bias Current vs
Temperature in the Typical Performance Characteristics).
The ADJ pin reference voltage is 200mV (referred to GND).
AGND (Pin 8/Pin 4): Ground.
PGND (Pins 10, 17/Pin 6): Ground.
SHDN (Pin 9/Pin 5): The SHDN pin puts the LT3021 into
a low power state. Pulling the SHDN pin low turns the
output off. Drive the SHDN pin with either logic or an open
collector/drain device with a pull-up resistor. The pull-up
resistor supplies the pull-up current to the open collector/
drain logic, normally several microamperes, and the SHDN
pin current, typically 2.5µA. If unused, connect the SHDN
pin to VIN. The LT3021 does not function if the SHDN pin
is not connected.
IN (Pins 12, 14/Pin 8): These pins supply power to the
device. The LT3021 requires a bypass capacitor at IN if it
is more than six inches away from the main input filter
capacitor. The output impedance of a battery rises with frequency, so include a bypass capacitor in battery-powered
circuits. A bypass capacitor in the range of 3.3µF to 10µF
suffices. The LT3021 withstands reverse voltages on the
IN pin with respect to ground and the OUT pin. In the case
of a reversed input, which occurs if a battery is plugged in
backwards, the LT3021 acts as if a diode is in series with
its input. No reverse current flows into the LT3021 and no
reverse voltage appears at the load. The device protects itself
and the load.
EXPOSED PAD (Pin 17, DH16 Package Only): Ground.
Solder Pin 17 to the PCB ground. Connect directly to Pins
5, 8, 10 for best performance.
NC (Pins 1, 2, 5, 6, 11, 15, 16/Pins 1, 7)
BLOCK DIAGRA
SHDN
(9/5)
SHUTDOWN
BIAS CURRENT
AND
REFERENCE
GENERATOR
NOTE:
FOR LT3021 ADJUST PIN (7/3) IS CONNECTED TO
THE ADJUST PIN, R1 AND R2 ARE EXTERNAL.
FOR LT3021-1.X PIN (7/3) IS CONNECTED TO THE
OUTPUT SENSE PIN, R1 AND R2 ARE INTERNAL.
W
(DH Package/S8 Package)
THERMAL
SHUTDOWN
–
ERROR AMP
200mV
212mV
+
–
NO-LOAD
RECOVERY
+
FIXED
V
OUT
1.2V
1.5V
1.8V
CURRENT
GAIN
25k
R1
20k
20k
20k
R2
100k
130k
160k
IN
(12, 14/8)
R3
D1
Q3
Q1
D2
Q2
R2
R1
3021 BD
OUT
(3,4/2)
OUT SENSE
(7/3)
ADJ
(7/3)
GND
(8,10,17/4,6)
3021fa
8
Page 9
WUUU
APPLICATIO S I FOR ATIO
LT3021/LT3021-1.2/
LT3021-1.5/LT3021-1.8
The LT3021 is a very low dropout linear regulator capable
of 1V input supply operation. Devices supply 500mA of
output current and dropout voltage is typically 155mV.
Quiescent current is typically 120µA and drops to 3µA in
shutdown. The LT3021 incorporates several protection
features, making it ideal for use in battery-powered systems. The device protects itself against reverse-input and
reverse-output voltages. In battery backup applications
where the output is held up by a backup battery when the
input is pulled to ground, the LT3021 acts as if a diode is
in series with its output which prevents reverse current
flow. In dual supply applications where the regulator load
is returned to a negative supply, the output can be pulled
below ground by as much as 10V without affecting startup or normal operation.
Adjustable Operation
The LT3021’s output voltage range is 0.2V to 9.5V. Figure
1 shows that the output voltage is set by the ratio of two
external resistors. The device regulates the output to
maintain the ADJ pin voltage at 200mV referenced to
ground. The current in R1 equals 200mV/R1 and the
current in R2 is the current in R1 minus the ADJ pin bias
current. The ADJ pin bias current of 20nA flows out of the
pin. Use the formula in Figure 1 to calculate output voltage.
An R1 value of 20k sets the resistor divider current to
10µA. Note that in shutdown the output is turned off and
the divider current is zero. Curves of ADJ Pin Voltage vs
Temperature and ADJ Pin Bias Current vs Temperature
appear in the Typical Performance Characteristics section.
IN
V
IN
SHDN
= 200mV
V
OUT
= 200mV
V
ADJ
= 20nA AT 25°C
I
ADJ
OUTPUT RANGE = 0.2V TO 9.5V
Figure 1. Adjustable Operation
OUT
LT3021
GND
1 +– I
()
R2
ADJ
R1
3021 F01
R2
(R2)
ADJ
R1
V
OUT
+
Specifications for output voltages greater than 200mV are
proportional to the ratio of desired output voltage to
200mV; (V
/200mV). For example, load regulation for
OUT
an output current change of 1mA to 500mA is typically
0.4mV at V
= 200mV. At V
ADJ
= 1.5V, load regulation is:
OUT
(1.5V/200mV) • (0.4mV) = 3mV
Output Capacitance and Transient Response
The LT3021’s design is stable with a wide range of output
capacitors, but is optimized for low ESR ceramic capacitors. The output capacitor’s ESR affects stability, most
notably with small value capacitors. Use a minimum
output capacitor of 3.3µF with an ESR of 0.2Ω or less to
prevent oscillations. The LT3021 is a low voltage device,
and output load transient response is a function of output
capacitance. Larger values of output capacitance decrease
the peak deviations and provide improved transient response for larger load current changes. For output capacitor values greater than 22µF a small feedforward capacitor
with a value of 300pF across the upper divider resistor (R2
in Figure 1) is required. Under extremely low output
current conditions (I
signal oscillation (200Hz/8mV
< 30µA) a low frequency small
LOAD
at 1.2V output) can
P-P
occur. A minimum load of 100µA is recommended to
prevent this instability.
Give extra consideration to the use of ceramic capacitors.
Manufacturers make ceramic capacitors with a variety of
dielectrics, each with a different behavior across temperature and applied voltage. The most common dielectrics are
Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics
provide high C-V products in a small package at low cost,
but exhibit strong voltage and temperature coefficients.
The X5R and X7R dielectrics yield highly stable
characterisitics and are more suitable for use as the output
capacitor at fractionally increased cost. The X5R and X7R
dielectrics both exhibit excellent voltage coefficient characteristics. The X7R type works over a larger temperature
range and exhibits better temperature stability whereas
X5R is less expensive and is available in higher values.
Figures 2 and 3 show voltage coefficient and temperature
coefficient comparisons between Y5V and X5R material.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or microphone
works. For a ceramic capacitor, the stress can be induced
by vibrations in the system or thermal transients. The resulting voltages produced can cause appreciable amounts
3021fa
9
Page 10
LT3021/LT3021-1.2/
LT3021-1.5/LT3021-1.8
WUUU
APPLICATIO S I FOR ATIO
20
0
–20
–40
–60
CHANGE IN VALUE (%)
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
X5R
Y5V
1mV/DIV
–100
0
26
8
4
DC BIAS VOLTAGE (V)
14
12
10
16
3021 F02
Figure 2. Ceramic Capacitor DC Bias Characteristics
40
20
0
–20
–40
–60
CHANGE IN VALUE (%)
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
–100
–50
–250
2575
TEMPERATURE (°C)
X5R
Y5V
50100 125
3021 F03
Figure 3. Ceramic Capacitor Temperature Characteristics
of noise. A ceramic capacitor produced Figure 4’s trace in
response to light tapping from a pencil. Similar vibration
induced behavior can masquerade as increased output
voltage noise.
No-Load/Light-Load Recovery
V
C
I
LOAD
OUT
OUT
= 1.3V
= 10µF
= 0
1ms/DIV3021 F04
Figure 4. Noise Resulting from Tapping on a Ceramic Capacitor
To eliminate this problem, the LT3021 incorporates a
no-load or light-load recovery circuit. This circuit is a
voltage-controlled current sink that significantly improves
the light load transient response time by discharging the
output capacitor quickly and then turning off. The current
sink turns on when the output voltage exceeds 6% of the
nominal output voltage. The current sink level is then
proportional to the overdrive above the threshold up to a
maximum of approximately 15mA. Consult the curve in
the Typical Performance Characteristics for the No-Load
Recovery Threshold.
If external circuitry forces the output above the no load
recovery circuit’s threshold, the current sink turns on in an
attempt to restore the output voltage to nominal. The
current sink remains on until the external circuitry releases
the output. However, if the external circuitry pulls the
output voltage above the input voltage, or the input falls
below the output, the LT3021 turns the current sink off and
shuts down the bias current/reference generator circuitry.
A transient load step occurs when the output current
changes from its maximum level to zero current or a very
small load current. The output voltage responds by overshooting until the regulator lowers the amount of current it
delivers to the new level. The regulator loop response time
and the amount of output capacitance control the amount of
overshoot. Once the regulator has decreased its output
current, the current provided by the resistor divider (which
sets V
) is the only current remaining to discharge the
OUT
output capacitor from the level to which it overshot. The
amount of time it takes for the output voltage to recover
easily extends to milliseconds with microamperes of divider
current and a few microfarads of output capacitance.
10
Thermal Considerations
The LT3021’s power handling capability is limited by its
maximum rated junction temperature of 125°C. The power
dissipated by the device is comprised of two components:
1. Output current multiplied by the input-to-output voltage differential: (I
OUT
)(V
IN
– V
OUT
) and
2. GND pin current multiplied by the input voltage:
)(VIN).
(I
GND
GND pin current is found by examining the GND pin
current curves in the Typical Performance Characteristics.
Power dissipation is equal to the sum of the two components listed above.
3021fa
Page 11
WUUU
APPLICATIO S I FOR ATIO
LT3021/LT3021-1.2/
LT3021-1.5/LT3021-1.8
The LT3021 regulator has internal thermal limiting (with
hysteresis) designed to protect the device during overload
conditions. For normal continuous conditions, do not
exceed the maximum junction temperature rating of 125°C.
Carefully consider all sources of thermal resistance from
junction to ambient including other heat sources mounted
in proximity to the LT3021.
The underside of the LT3021 DH package has exposed metal
(14mm
2
) from the lead frame to where the die is attached.
This allows heat to directly transfer from the die junction
to the printed circuit board metal to control maximum
operating junction temperature. The dual-in-line pin arrangement allows metal to extend beyond the ends of the
package on the topside (component side) of a PCB. Connect this metal to GND on the PCB. The multiple IN and OUT
pins of the LT3021 also assist in spreading heat to the PCB.
The LT3021 S8 package has pin 4 fused with the lead
frame. This also allows heat to transfer from the die to the
printed circuit board metal, therefore reducing the thermal
resistance. Copper board stiffeners and plated throughholes can also be used to spread the heat generated by
power devices.
Calculating Junction Temperature
Example: Given an output voltage of 1.2V, an input voltage
range of 1.8V ±10%, an output current range of 1mA to
500mA, and a maximum ambient temperature of 70°C,
what will the maximum junction temperature be for an
application using the DH package?
The power dissipated by the device is equal to:
I
OUT(MAX)(VIN(MAX)
OUT
) + I
GND(VIN(MAX)
)
– V
where
at (I
= 500mA
= 1.98V
= 500mA, V
OUT
= 1.98V) = 10mA
IN
I
OUT(MAX)
V
IN(MAX)
I
GND
so
P = 500mA(1.98V – 1.2V) + 10mA(1.98V) = 0.41W
The thermal resistance is in the range of 35°C/W to
70°C/W depending on the copper area. So the junction
temperature rise above ambient is approximately equal to:
0.41W(52.5°C/W) = 21.5°C
The following tables list thermal resistance for several
different board sizes and copper areas for two different
packages. Measurements were taken in still air on 3/32"
FR-4 board with one ounce copper.
Table 1. Measured Thermal Resistance For DH Package
COPPER AREATHERMAL RESISTANCE
TOPSIDE*BACKSIDEBOARD AREA (JUNCTION-TO-AMBIENT)
2500mm22500mm
2
900mm
225mm
100mm
50mm
Table 2. Measured Thermal Resistance For S8 Package
COPPER AREATHERMAL RESISTANCE
TOPSIDE*BACKSIDEBOARD AREA (JUNCTION-TO-AMBIENT)
2500mm22500mm
1000mm22500mm
225mm22500mm
100mm22500mm
50mm
*Device is mounted on topside.
2
2
2
2
2500mm
2500mm
2500mm
2500mm
2500mm
2
2500mm
2
2500mm
2
2500mm
2
2500mm
2
2500mm
2
2500mm
2
2500mm
2
2500mm
2
2500mm
2
2500mm
2
2
2
2
2
2
2
2
2
2
30°C/W
35°C/W
50°C/W
55°C/W
65°C/W
70°C/W
70°C/W
78°C/W
84°C/W
96°C/W
The maximum junction temperature equals the maximum
junction temperature rise above ambient plus the maximum ambient temperature or:
T
= 21.5°C + 70°C = 91.5°C
JMAX
Protection Features
The LT3021 incorporates several protection features that
make it ideal for use in battery-powered circuits. In addition to the normal protection features associated with
monolithic regulators, such as current limiting and thermal limiting, the device also protects against reverseinput voltages, reverse-output voltages and reverse
output-to-input voltages.
Current limit protection and thermal overload protection
protect the device against current overload conditions at
the output of the device. For normal operation, do not
exceed a junction temperature of 125°C.
The IN pins of the device withstand reverse voltages of
10V. The LT3021 limits current flow to less than 1µA and
no negative voltage appears at OUT. The device protects
both itself and the load against batteries that are plugged
in backwards.
3021fa
11
Page 12
LT3021/LT3021-1.2/
LT3021-1.5/LT3021-1.8
WUUU
APPLICATIO S I FOR ATIO
The LT3021 incurs no damage if OUT is pulled below
ground. If IN is left open circuit or grounded, OUT can be
pulled below ground by 10V. No current flows from the
pass transistor connected to OUT. However, current flows
in (but is limited by) the resistor divider that sets the output
voltage. Current flows from the bottom resistor in the
divider and from the ADJ pin’s internal clamp through the
top resistor in the divider to the external circuitry pulling
OUT below ground. If IN is powered by a voltage source,
OUT sources current equal to its current limit capability
and the LT3021 protects itself by thermal limiting. In this
case, grounding SHDN turns off the LT3021 and stops
OUT from sourcing current.
The LT3021 incurs no damage if the ADJ pin is pulled
above or below ground by 10V. If IN is left open circuit or
grounded and ADJ is pulled above ground, ADJ acts like a
25k resistor in series with a 1V clamp (one Schottky diode
in series with one diode). ADJ acts like a 25k resistor in
series with a Schottky diode if pulled below ground. If IN
is powered by a voltage source and ADJ is pulled below its
reference voltage, the LT3021 attempts to source its
current limit capability at OUT. The output voltage increases to VIN – V
load current the LT3021 supports. This condition can
potentially damage external circuitry powered by the
LT3021 if the output voltage increases to an unregulated
high voltage. If IN is powered by a voltage source and ADJ
is pulled above its reference voltage, two situations can
occur. If ADJ is pulled slightly above its reference voltage,
the LT3021 turns off the pass transistor, no output current
is sourced and the output voltage decreases to either the
voltage at ADJ or less. If ADJ is pulled above its no load
recovery threshold, the no load recovery circuitry turns on
and attempts to sink current. OUT is actively pulled low
and the output voltage clamps at a Schottky diode above
ground. Please note that the behavior described above
applies to the LT3021 only. If a resistor divider is connected under the same conditions, there will be additional
V/R current.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled to
ground, pulled to some intermediate voltage or is left open
DROPOUT
with V
DROPOUT
set by whatever
circuit. In the case where the input is grounded, there is
less than 1µA of reverse output current.
If the LT3021 IN pin is forced below the OUT pin or the OUT
pin is pulled above the IN pin, input current drops to less
than 10µA typically. This occurs if the LT3021 input is
connected to a discharged (low voltage) battery and either
a backup battery or a second regulator circuit holds up the
output. The state of the SHDN pin has no effect on the
reverse output current if OUT is pulled above IN.
Input Capacitance and Stability
The LT3021 is designed to be stable with a minimum
capacitance of 3.3µF placed at the IN pin. Ceramic capaci-
tors with very low ESR may be used. However, in cases
where a long wire is used to connect a power supply to the
input of the LT3021 (and also from the ground of the
LT3021 back to the power supply ground), use of low
value input capacitors combined with an output load
current of 20mA or greater may result in an unstable
application. This is due to the inductance of the wire
forming an LC tank circuit with the input capacitor and not
a result of the LT3021 being unstable.
The self-inductance, or isolated inductance, of a wire is
directly proportional to its length. However, the diameter
of a wire does not have a major influence on its selfinductance. For example, the self inductance of a 2-AWG
isolated wire with a diameter of 0.26 in. is about half the
inductance of a 30-AWG wire with a diameter of 0.01 in.
One foot of 30-AWG wire has 465nH of self inductance.
The overall self-inductance of a wire can be reduced in two
ways. One is to divide the current flowing towards the
LT3021 between two parallel conductors and flows in the
same direction in each. In this case, the farther the wires
are placed apart from each other, the more inductance will
be reduced, up to a 50% reduction when placed a few
inches apart. Splitting the wires basically connects two
equal inductors in parallel. However, when placed in close
proximity from each other, mutual inductance is added to
the overall self inductance of the wires. The most effective
way to reduce overall inductance is to place the forward
and return-current conductors (the wire for the input and
the wire for ground) in very close proximity. Two 30-AWG
wires separated by 0.02 in. reduce the overall self-inductance to about one-fifth of a single isolated wire.
3021fa
12
Page 13
WUUU
APPLICATIO S I FOR ATIO
LT3021/LT3021-1.2/
LT3021-1.5/LT3021-1.8
If the LT3021 is powered by a battery mounted in close
proximity on the same circuit board, a 3.3µF input capaci-
tor is sufficient for stability. However, if the LT3021 is
powered by a distant supply, use a larger value input
capacitor following the guideline of roughly 1µF (in addi-
tion to the 3.3µF minimum) per 8 inches of wire length. As
power supply output impedance may vary, the minimum
input capacitance needed to stabilize the application may
also vary. Extra capacitance may also be placed directly on
the output of the power supply; however, this will require
an order of magnitude more capacitance as opposed to
placing extra capacitance in close proximity to the LT3021.
Furthermore, series resistance may be placed between the
supply and the input of the LT3021 to stabilize the application; as little as 0.1Ω to 0.5Ω will suffice.
3021fa
13
Page 14
LT3021/LT3021-1.2/
LT3021-1.5/LT3021-1.8
PACKAGE DESCRIPTIO
5.50 ±0.05
4.10 ±0.05
3.45 ±0.05
(2 SIDES)
4.10 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
U
DH Package
16-Lead Plastic DFN (5mm × 5mm)
(Reference LTC DWG # 05-08-1709)
0.70 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
5.00 ±0.10
R = 0.20
TYP
5.00 ±0.10
0.75 ±0.05
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJJD-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3.45 ± 0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
R = 0.115
4.10 ±0.10
(2 SIDES)
TYP
0.25 ± 0.05
0.50 BSC
169
18
0.40 ± 0.05
PIN 1
NOTCH
(DH16) DFN 0204
14
3021fa
Page 15
PACKAGE DESCRIPTIO
.050 BSC
LT3021-1.5/LT3021-1.8
U
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 – .197
.045 ±.005
(4.801 – 5.004)
8
NOTE 3
7
6
LT3021/LT3021-1.2/
5
.245
MIN
.030 ±.005
TYP
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
.008 – .010
(0.203 – 0.254)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
× 45°
.016 – .050
(0.406 – 1.270)
INCHES
(MILLIMETERS)
.160 ±.005
.228 – .244
(5.791 – 6.197)
0°– 8° TYP
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.150 – .157
(3.810 – 3.988)
NOTE 3
1
3
2
4
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
SO8 0303
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
3021fa
15
Page 16
LT3021/LT3021-1.2/
LT3021-1.5/LT3021-1.8
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I
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