Datasheet LT1963ES8-1.8, LT1963ES8-1.5, LT1963EQ-2.5, LT1963EQ-1.8, LT1963EQ-1.5 Datasheet (Linear Technology)

FEATURES

■

Optimized for Fast Transient Response

■

Output Current: 1.5A

■

Dropout Voltage: 340mV

■

Low Noise: 40µV

■

1mA Quiescent Current

■

No Protection Diodes Needed

■

Controlled Quiescent Current in Dropout

■

Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V

■

Adjustable Output from 1.21V to 20V

■

<1µA Quiescent Current in Shutdown

■

Stable with 10µF Output Capacitor

■

Reverse Battery Protection

■

No Reverse Current

■

Thermal Limiting

(10Hz to 100kHz)

RMS

U

APPLICATIO S

■

3.3V to 2.5V Logic Power Supplies

■

Post Regulator for Switching Supplies

LT1963 Series

1.5A, Low Noise,

Fast Transient Response

LDO Regulators

U

DESCRIPTIO

The LT®1963 series are low dropout regulators optimized
for fast transient response. The devices are capable of
supplying 1.5A of output current with a dropout voltage of
340mV. Operating quiescent current is 1mA, dropping to
<1µA in shutdown. Quiescent current is well controlled; it
does not rise in dropout as it does with many other
regulators. In addition to fast transient response, the
LT1963 regulators have very low output noise which
makes them ideal for sensitive RF supply applications.

Output voltage range is from 1.21V to 20V. The LT1963
regulators are stable with output capacitors as low as
10µF. Internal protection circuitry includes reverse battery
protection, current limiting, thermal limiting and reverse
current protection. The devices are available in fixed
output voltages of 1.5V, 1.8V, 2.5V, 3.3V and as an
adjustable device with a 1.21V reference voltage. The
LT1963 regulators are available in 5-lead TO-220, DD,
3-lead SOT-223 and 8-lead SO packages.

, LTC and LT are registered trademarks of Linear Technology Corporation.

TYPICAL APPLICATION

3.3V to 2.5V Regulator

IN

V

> 3V

IN

10µF

SHDN

OUT

LT1963-2.5

SENSE

GND

U

Dropout Voltage

400

350

2.5V

++

1.5A

10µF

1963 TA01

300

250

200

150

DROPOUT VOLTAGE (mV)

100

50

0

0.2

0

0.4
OUTPUT CURRENT (A)

0.6

0.8

1.0

1.2

1.4

1963 TA02

1.6

1963fa

1

LT1963 Series

WWWU

ABSOLUTE AXI U RATI GS

(Note 1)

IN Pin Voltage........................................................ ±20V

OUT Pin Voltage .................................................... ±20V

Input to Output Differential Voltage (Note 2) ......... ±20V

SENSE Pin Voltage ............................................... ±20V

ADJ Pin Voltage ...................................................... ±7V

UU

W

PACKAGE/ORDER I FOR ATIO

FRONT VIEW

3

2

1

SENSE/ADJ*
OUT
GND
IN
SHDN

OUT

GND

IN

5

TAB IS

GND

5-LEAD PLASTIC DD

*PIN 5 = SENSE FOR LT1963-1.8/LT1963-2.5/LT1963-3.3

= ADJ FOR LT1963

T

JMAX

TAB IS

GND

3-LEAD PLASTIC SOT-223

T

JMAX

4
3
2
1

Q PACKAGE

= 150°C, θJA = 30°C/ W

FRONT VIEW

ST PACKAGE

= 150°C, θJA = 50°C/ W

ORDER PART

NUMBER

LT1963EQ
LT1963EQ-1.5
LT1963EQ-1.8
LT1963EQ-2.5
LT1963EQ-3.3

ORDER PART

NUMBER

LT1963EST-1.5
LT1963EST-1.8
LT1963EST-2.5
LT1963EST-3.3

ST PART

MARKING

196315
196318
196325
196333

SHDN Pin Voltage................................................. ±20V

Output Short-Circuit Duration......................... Indefinite

Operating Junction Temperature Range –45°C to 125°C

Storage Temperature Range ................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec)..................300°C

FRONT VIEW

5
4
3
2
1

TAB IS

GND

*PIN 5 = SENSE FOR LT1963-1.8/LT1963-2.5/LT1963-3.3

T PACKAGE

5-LEAD PLASTIC TO-220

= ADJ FOR LT1963

T

= 150°C, θJA = 50°C/ W

JMAX

SENSE/ADJ*
OUT
GND
IN
SHDN

ORDER PART

NUMBER

LT1963ET
LT1963ET-1.5
LT1963ET-1.8
LT1963ET-2.5
LT1963ET-3.3

ORDER PART

NUMBER

TOP VIEW

1

OUT

SENSE/ADJ*

*PIN 2 = SENSE FOR LT1963-1.8/LT1963-2.5/LT1963-3.3

= ADJ FOR LT1963

2

GND

3

NC

4

S8 PACKAGE

8-LEAD PLASTIC SO

= 150°C, θJA = 70°C/ W

T

JMAX

8

IN
GND

7

GND

6

SHDN

5

LT1963ES8
LT1963ES8-1.5
LT1963ES8-1.8
LT1963ES8-2.5
LT1963ES8-3.3

S8 PART

MARKING

1963
196315
196318
196325
196333

Consult LTC Marketing for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 3)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Minimum Input Voltage (Notes 4,12) I

Regulated Output Voltage (Note 5) LT1963-1.5 VIN = 2.21V, I

= 0.5A 1.9 V

LOAD

= 1.5A ● 2.1 2.5 V

I

LOAD

= 1mA 1.477 1.500 1.523 V

2.5V < VIN < 20V, 1mA < I

LT1963-1.8 VIN = 2.3V, I

2.8V < VIN < 20V, 1mA < I

LOAD

= 1mA 1.773 1.800 1.827 V

LOAD

< 1.5A ● 1.447 1.500 1.545 V

LOAD

< 1.5A ● 1.737 1.800 1.854 V

LOAD

1963fa

2

LT1963 Series

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2)

PARAMETER CONDITIONS MIN TYP MAX UNITS

LT1963-2.5 VIN = 3V, I

3.5V < V

LT1963-3.3 VIN = 3.8V, I

4.3V < V

ADJ Pin Voltage LT1963 VIN = 2.21V, I
(Notes 4, 5) 2.5V < V

Line Regulation LT1963-1.5 ∆VIN = 2.21V to 20V, I

LT1963-1.8 ∆VIN = 2.3V to 20V, I
LT1963-2.5 ∆V
LT1963-3.3 ∆V

= 3V to 20V, I

IN

= 3.8V to 20V, I

IN

LT1963 (Note 4) ∆VIN = 2.21V to 20V, I

Load Regulation LT1963-1.5 VIN = 2.5V, ∆I

= 2.5V, ∆I

V

IN

LT1963-1.8 VIN = 2.8V, ∆I

= 2.8V, ∆I

V

IN

LT1963-2.5 VIN = 3.5V, ∆I

= 3.5V, ∆I

V

IN

LT1963-3.3 VIN = 4.3V, ∆I

VIN = 4.3V, ∆I

LT1963 (Note 4) VIN = 2.5V, ∆I

= 2.5V, ∆I

V

IN

Dropout Voltage I

= V

V

IN

OUT(NOMINAL)

(Notes 6, 7, 12)

GND Pin Current I

= V

V

IN

OUT(NOMINAL)

+ 1V I

(Notes 6, 8)

Output Voltage Noise C

= 1mA 0.02 0.06 V

LOAD

I

= 1mA ● 0.10 V

LOAD

I

= 100mA 0.10 0.17 V

LOAD

= 100mA ● 0.22 V

I

LOAD

I

= 500mA 0.19 0.27 V

LOAD

I

= 500mA ● 0.35 V

LOAD

I

= 1.5A 0.34 0.45 V

LOAD

= 1.5A ● 0.55 V

I

LOAD

= 0mA ● 1.0 1.5 mA

LOAD

= 1mA ● 1.1 1.6 mA

LOAD

I

= 100mA ● 3.8 5.5 mA

LOAD

I

= 500mA ● 15 25 mA

LOAD

= 1.5A ● 80 120 mA

I

LOAD

= 10µF, I

OUT

= 1.5A, BW = 10Hz to 100kHz 40 µV

LOAD

ADJ Pin Bias Current (Notes 4, 9) 3 10 µA
Shutdown Threshold V

SHDN Pin Current V
(Note 10) V

Quiescent Current in Shutdown VIN = 6V, V
Ripple Rejection VIN – V

Current Limit VIN = 7V, V

= Off to On ● 0.90 2 V

OUT

V

= On to Off ● 0.25 0.75 V

OUT

= 0V 0.01 1 µA

SHDN

= 20V 3 30 µA

SHDN

= 0V 0.01 1 µA

SHDN

= 1.5V (Avg), V

OUT

f

RIPPLE

= V

V

IN

= 120Hz, I

OUT

OUT(NOMINAL)

= 0.75A

LOAD

= 0V 2 A

+ 1V, ∆V

Input Reverse Leakage Current (Note 13) Q, T, S8 Packages VIN = –20V, V

ST Package V

Reverse Output Current (Note 11) LT1963-1.5 V

LT1963-1.8 V
LT1963-2.5 V
LT1963-3.3 V
LT1963 (Note 4) V

IN

= 1.5V, VIN < 1.5V 600 1200 µA

OUT

= 1.8V, VIN < 1.8V 600 1200 µA

OUT

= 2.5V, VIN < 2.5V 600 1200 µA

OUT

= 3.3V, VIN < 3.3V 600 1200 µA

OUT

= 1.21V, VIN < 1.21V 300 600 µA

OUT

= 1mA 2.462 2.500 2.538 V

LOAD

< 20V, 1mA < I

IN

= 1mA 3.250 3.300 3.350 V

LOAD

< 20V, 1mA < I

IN

= 1mA 1.192 1.210 1.228 V

LOAD

< 20V, 1mA < I

IN

LOAD

LOAD

LOAD

= 1mA to 1.5A 2 9 mV

LOAD

= 1mA to 1.5A ● 18 mV

LOAD

= 1mA to 1.5A 2 10 mV

LOAD

= 1mA to 1.5A ● 20 mV

LOAD

= 1mA to 1.5A 2.5 15 mV

LOAD

= 1mA to 1.5A ● 30 mV

LOAD

= 1mA to 1.5A 3 20 mV

LOAD

= 1mA to 1.5A ● 35 mV

LOAD

= 1mA to 1.5A 2 8 mV

LOAD

= 1mA to 1.5A ● 15 mV

LOAD

= 0.5V

RIPPLE

= –0.1V ● 1.6 A

OUT

= 0V ● 1mA

OUT

= –20V, V

= 0V ● 2mA

OUT

< 1.5A ● 2.412 2.500 2.575 V

LOAD

< 1.5A ● 3.200 3.300 3.400 V

LOAD

< 1.5A ● 1.174 1.210 1.246 V

LOAD

= 1mA ● 2.0 10 mV

LOAD

= 1mA ● 2.5 10 mV

= 1mA ● 3.0 10 mV

= 1mA ● 3.5 10 mV

= 1mA ● 1.5 10 mV

LOAD

,5563dB

P-P

RMS

1963fa

3

LT1963 Series

ELECTRICAL CHARACTERISTICS

Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.

Note 2: Absolute maximum input to output differential voltage can not be
achieved with all combinations of rated IN pin and OUT pin voltages. With
the IN pin at 20V, the OUT pin may not be pulled below 0V. The total
measured voltage from IN to OUT can not exceed ±20V.

Note 3: The LT1963 regulators are tested and specified under pulse load
conditions such that T

≈ TA. The LT1963 is 100% tested at

J

TA = 25°C. Performance at –40°C and 125°C is assured by design,
characterization and correlation with statistical process controls.

Note 4: The LT1963 (adjustable version) is tested and specified for these
conditions with the ADJ pin connected to the OUT pin.

Note 5: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply for
all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.

Note 6: To satisfy requirements for minimum input voltage, the LT1963
(adjustable version) is tested and specified for these conditions with an

external resistor divider (two 4.12k resistors) for an output voltage of

2.4V. The external resistor divider will add a 300µA DC load on the output.
Note 7: Dropout voltage is the minimum input to output voltage differential

needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to: V

– V

IN

Note 8: GND pin current is tested with V

DROPOUT

= V

IN

.

OUT(NOMINAL)

current source load. The GND pin current will decrease at higher input
voltages.

Note 9: ADJ pin bias current flows into the ADJ pin.
Note 10: SHDN pin current flows into the SHDN pin.
Note 11: Reverse output current is tested with the IN pin grounded and the

OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.

Note 12. For the LT1963, LT1963-1.5 and LT1963-1.8 dropout voltage will
be limited by the minimum input voltage specification under some output
voltage/load conditions.

Note 13. For the ST package, the input reverse leakage current increases
due to the additional reverse leakage current for the SHDN pin, which is
tied internally to the IN pin.

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Typical Dropout Voltage

500
450
400
350
300
250
200
150

DROPOUT VOLTAGE (mV)

100

50

0

0

0.2 0.6

TJ = 125°C

TJ = 25°C

0.4

0.8

OUTPUT CURRENT (A)

1.0

1.2

1.4

1963 • G01

1.6

Quiescent Current LT1963-1.8 Output Voltage LT1963-2.5 Output Voltage

1.4

1.2

1.0

0.8

0.6

0.4

QUIESCENT CURRENT (mA)

0.2

0

–50

LT1963-1.8/-2.5/-3.3

VIN = 6V

= ∞, IL = 0

R

L

= V

V

SHDN

–25 0

IN

50 100 125

25 75

TEMPERATURE (°C)

LT1963

1963 G04

Guaranteed Dropout Voltage Dropout Voltage

600

TEST POINTS

500

400

300

200

100

GUARANTEED DROPOUT VOLTAGE (mV)

0

0

0.2 0.6

1.84
IL = 1mA

1.83

1.82

1.81

1.80

1.79

OUTPUT VOLTAGE (V)

1.78

1.77

1.76

–25 25 75 125

–50

TJ ≤ 125°C

0.4

0.8

OUTPUT CURRENT (A)

050

TEMPERATURE (°C)

1.0

TJ ≤ 25°C

1.2

1.4

100

1.6

1963 • G02

1963 G05

500
450
400
350
300
250
200
150

DROPOUT VOLTAGE (mV)

100

2.58

2.56

2.54

2.52

2.50

2.48

OUTPUT VOLTAGE (V)

2.46

2.44

2.42

IL = 1.5A

50

0

–50

–25

IL = 1mA

–25 25 75 125

–50

IL = 0.5A

0

TEMPERATURE (°C)

050

TEMPERATURE (°C)

25

+ 1V and a

IL = 100mA

50

IL = 1mA

75

100

100

1963 G03

1963 G06

1963fa

125

4

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LT1963 Series

LT1963-3.3 Output Voltage

3.38
IL = 1mA

3.36

3.34

3.32

3.30

3.28

OUTPUT VOLTAGE (V)

3.26

3.24

3.22

–25 25 75 125

–50

050

TEMPERATURE (°C)

LT1963-2.5 Quiescent Current

14

12

10

8

6

100

TJ = 25°C

= ∞

R

L

= V

V

SHDN

1963 G07

IN

LT1963 ADJ Pin Voltage

1.230
IL = 1mA

1.225

1.220

1.215

1.210

1.205

ADJ PIN VOLTAGE (V)

1.200

1.195

1.190

–25 25 75 125

–50

050

TEMPERATURE (°C)

100

1963 G08

LT1963-1.8 Quiescent Current

14

12

10

8

6

4

QUIESCENT CURRENT (mA)

2

0

0

2

1

34
INPUT VOLTAGE (V)

LT1963-3.3 Quiescent Current LT1963 Quiescent Current

14

12

10

8

6

TJ = 25°C

= ∞

R

L

= V

V

SHDN

IN

14

12

10

8

6

TJ = 25°C

= ∞

R

L

= V

V

SHDN

IN

5678910

1963 G09

TJ = 25°C

= 4.3k

R

L

= V

V

SHDN

IN

4

QUIESCENT CURRENT (mA)

2

0

0

2

1

34
INPUT VOLTAGE (V)

LT1963-1.8 GND Pin Current

25

TJ = 25°C

= V

V

SHDN

IN

*FOR V

20

15

10

GND PIN CURRENT (mA)

5

0

0

= 1.18V

OUT

RL = 18, IL = 100mA*

RL = 180, IL = 10mA*

1

3

2

INPUT VOLTAGE (V)

RL = 6, IL = 300mA*

4

1963 G10

1963 G13

4

QUIESCENT CURRENT (mA)

2

0

1056789

0

2

1

34
INPUT VOLTAGE (V)

1056789

1963 G11

4

QUIESCENT CURRENT (mA)

2

0

0

4

2

68
INPUT VOLTAGE (V)

2010 12 14 16 18

1963 G12

LT1963-2.5 GND Pin Current LT1963-3.3 GND Pin Current

25

20

15

10

GND PIN CURRENT (mA)

5

0

1098765

0

RL = 8.33, IL = 300mA*

RL = 25, IL = 100mA*

RL = 250, IL = 10mA*

1

3

2

INPUT VOLTAGE (V)

TJ = 25°C

= V

V

SHDN

IN

OUT

= 2.5V

1963 G14

1098765

*FOR V

4

25

20

15

10

GND PIN CURRENT (mA)

5

0

0

RL = 330, IL = 100mA*

1

3

2

INPUT VOLTAGE (V)

TJ = 25°C

= V

V

SHDN

*FOR V

OUT

RL = 11, IL = 300mA*

RL = 33, IL = 100mA*

4

IN

= 3.3V

1098765

1963 G15

1963fa

5

LT1963 Series

OUTPUT CURRENT (A)

100

90
80
70
60
50
40
30
20
10

0

GND PIN CURRENT (mA)

1963 G21

0 0.2 0.4 0.6

0.8

1.0

1.2 1.4 1.6

V

IN = VOUT (NOMINAL)

+1V

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LT1963 GND Pin Current

10

8

6

4

GND PIN CURRENT (mA)

2

0

0

RL = 4.33, IL = 300mA*

RL = 12.1, IL = 100mA*

RL = 121, IL = 10mA*

1

3

4

2

INPUT VOLTAGE (V)

LT1963-3.3 GND Pin Current

100

90
80
70
60
50
40
30

GND PIN CURRENT (mA)

20
10

0

0123

RL = 2.2, IL = 1.5A*

RL = 3.3, I

RL = 6.6, IL = 500mA*

4

INPUT VOLTAGE (V)

TJ = 25°C

= V

V

SHDN

IN

*FOR V

5

= 1.21V

OUT

TJ = 25°C

= V

V

SHDN

IN

*FOR V

L

678910

= 1A*

OUT

1963 G16

= 3.3V

1963 G19

LT1963-1.8 GND Pin Current LT1963-2.5 GND Pin Current

100

90
80
70
60
50
40
30

GND PIN CURRENT (mA)

20
10

0

1098765

0123

RL = 1.2, IL = 1.5A*

RL = 1.8, IL = 1A*

RL = 3.6, IL = 500mA*

INPUT VOLTAGE (V)

TJ = 25°C
V

SHDN

*FOR V

4

678910

5

= V

OUT

IN

= 1.8V

1963 G17

LT1963 GND Pin Current GND Pin Current vs I

100

90
80
70
60
50
40
30

GND PIN CURRENT (mA)

20
10

0

0123

RL = 0.81, IL = 1.5A*

RL = 1.21, IL = 1A*

RL = 2.42, IL = 500mA*

INPUT VOLTAGE (V)

TJ = 25°C
V

SHDN

*FOR V

4

678910

5

= V

OUT

IN

= 1.21V

1963 G20

100

90
80
70
60
50
40
30

GND PIN CURRENT (mA)

20
10

0

0123

RL = 1.67, IL = 1.5A*

RL = 2.5, IL = 1A*

RL = 5, IL = 500mA*

INPUT VOLTAGE (V)

TJ = 25°C
V

SHDN

*FOR V

4

678910

5

LOAD

= V

OUT

IN

= 2.5V

1963 G18

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

SHDN PIN THRESHOLD (V)

0.2

0.1
0

–50

6

SHDN Pin Threshold (On-to-Off)

IL = 1mA

–25

0

TEMPERATURE (°C)

50

25

75

100

1963 G22

125

SHDN Pin Threshold (Off-to-On)

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

SHDN PIN THRESHOLD (V)

0.2

0.1
0

–50

–25

IL = 1.5A

0

TEMPERATURE (°C)

50

25

IL = 1mA

75

100

1963 G23

125

SHDN Pin Input Current

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

SHDN PIN INPUT CURRENT (µA)

0.5
0

0246

SHDN PIN VOLTAGE (V)

8

12 14 16 18 20

10

1963 G24

1963fa

UW

TEMPERATURE (°C)

–50

76

74

72

70

68

66

64

62

25 75

1963 G32

–25 0

50 100 125

RIPPLE REJECTION (dB)

IL = 0.75A
V

IN

= V

OUT(NOMINAL)

+1V + 0.5V

P-P

RIPPLE AT f = 120Hz

TYPICAL PERFOR A CE CHARACTERISTICS

LT1963 Series

SHDN Pin Input Current

7

6

5

4

3

2

SHDN PIN INPUT CURRENT (µA)

1

0

–50

–25 0

TEMPERATURE (°C)

V

SHDN

50 100 125

25 75

Current Limit

4.0
VIN = 7V

V

= 0V

OUT

3.5

3.0

2.5

2.0

1.5

CURRENT LIMIT (A)

1.0

0.5

0

–50

–25

= 20V

1963 G25

0

TEMPERATURE (°C)

50

25

ADJ Pin Bias Current

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

ADJ PIN BIAS CURRENT (µA)

1.0

0.5
0

–50

75

100

0

–25

TEMPERATURE (°C)

125

1963 G28

50

25

75

100

125

1963 G26

Reverse Output Current

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

REVERSE OUTPUT CURRENT (mA)

0.5

LT1963

0

0123

OUTPUT VOLTAGE (V)

CURRENT LIMIT (A)

LT1963-1.8

LT1963-2.5

4

678910

5

Current Limit

3.0

2.5
TJ = 25°C

2.0

TJ = 125°C

1.5

1.0

0.5

∆V

= 100mV

OUT

0

4 8 12 16

02 6 10 14 18

INPUT/OUTPUT DIFFERENTIAL (V)

LT1963-3.3

TJ = 25°C

= 0V

V

IN

CURRENT FLOWS INTO
OUTPUT PIN

= V

V

OUT

= V

V

OUT

1963 G29

TJ = –50°C

(LT1963)

ADJ

(LT1963-1.8/-2.5/-3.3)

FB

20

1963 G27

Reverse Output Current

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

REVERSE OUTPUT CURRENT (mA)

0.1
0

–50

VIN = 0V

= 1.21V (LT1963)

V

OUT

= 1.8V (LT1963-1.8)

V

OUT

V

= 2.5V (LT1963-2.5)

OUT

= 3.3V (LT1963-3.3)

V

OUT

0

–25

TEMPERATURE (°C)

LT1963-1.8/-2.5/-3.3

LT1963

50

25

75

100

1963 G30

125

Ripple Rejection

80

70

60

50

40

30

RIPPLE REJECTION (dB)

20

10

0

C

= 100µF TANTALUM

OUT

+10 × 1µF CERAMIC

C

= 10µF TANTALUM

OUT

IL = 0.75A

= V

V

IN

OUT(NOMINAL)

10 1k 10k 1M

100 100k

+1V + 50mV

FREQUENCY (Hz)

RMS

Ripple Rejection

RIPPLE

1963 G31

1963fa

7

LT1963 Series

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LT1963 Minimum Input Voltage Load Regulation

3.0

2.5

2.0

1.5

1.0

MINIMUM INPUT VOLTAGE (V)

0.5

0

–50

IL = 1.5A

–25 0

IL = 100mA

25 75

TEMPERATURE (°C)

IL = 500mA

50 100 125

1963 G33

10

5

0

–5

–10

LOAD REGULATION (mV)

VIN = V

(LT1963-1.8/-2.5/-3.3)

–15

= 2.7V (LT1963)

V

IN

= 1mA TO 1.5A

∆I

L

–20

–50

–25 0

RMS Output Noise vs Load
Current (10Hz to 100kHz)

50

C

= 10µF

OUT

45

)

40

RMS

35
30
25
20
15
10

OUTPUT NOISE VOLTAGE (µV

5
0

0.001 1

0.0001 0.01 0.1 10
LOAD CURRENT (A)

LT1963-3.3

LT1963-2.5

LT1963-1.8

LT1963

1063 G36

LT1963-2.5

OUT(NOMINAL)

25 75

TEMPERATURE (°C)

100µV/DIV

Output Noise Spectral Density

1.0
C

= 10µF

OUT

=1.5A

I

OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)

0.1

0.01

L

LT1963-3.3

LT1963-1.8

10

LT1963-1.8

LT1963

LT1963-3.3

+1V

50 100 125

1963 G34

LT1963-3.3 10Hz to 100kHz Output Noise

V

OUT

= 10µF

C
I

LOAD

OUT

= 1.5A

1ms/DIV

LT1963-2.5

LT1963

100 10k

1k 100k

FREQUENCY (Hz)

1963 G37

1963 G35

8

LT1963-3.3 Transient Response

200

VIN = 4.3V

= 3.3µF TANTALUM

C

150

IN

C

= 10µF TANTALUM

OUT

100

50

0

DEVIATION (mV)

OUTPUT VOLTAGE

–50

–100

0.6

0.4

LOAD

0.2

CURRENT (A)

0

0246

8

10

TIME (µs)

12 14 16 18 20

1963 G38

LT1963-3.3 Transient Response

150
100

50

0

–50

DEVIATION (mV)

OUTPUT VOLTAGE

–100
–150

1.5

1.0

0.5

LOAD

CURRENT (A)

0

0 50 100 150

VIN = 4.3V

= 33µF TANTALUM

C

IN

C

= 100µF TANTALUM

OUT

+10 × 1µF CERAMIC

250

TIME (µs)

300

350 400 450 500200

1963 G39

1963fa

LT1963 Series

U

UU

PI FU CTIO S

OUT: Output. The output supplies power to the load. A
minimum output capacitor of 10µF is required to prevent
oscillations. Larger output capacitors will be
required for applications with large transient loads to limit
peak voltage transients. See the Applications Information
section for more information on output capacitance and
reverse output characteristics.

SENSE: Sense. For fixed voltage versions of the LT1963
(LT1963-1.8/LT1963-2.5/LT1963-3.3), the SENSE pin is
the input to the error amplifier. Optimum regulation will be
obtained at the point where the SENSE pin is connected to
the OUT pin of the regulator. In critical applications, small
voltage drops are caused by the resistance (RP) of PC traces
between the regulator and the load. These may be elimi­nated by connecting the SENSE pin to the output at the
load as shown in Figure 1 (Kelvin Sense Connection). Note
that the voltage drop across the external PC traces will add
to the dropout voltage of the regulator. The SENSE pin bias
current is 600µA at the nominal rated output voltage. The
SENSE pin can be pulled below ground (as in a dual supply
system where the regulator load is returned to a negative
supply) and still allow the device to start and operate.

will be off when the SHDN pin is pulled low. The SHDN pin
can be driven either by 5V logic or open-collector logic
with a pull-up resistor. The pull-up resistor is required to
supply the pull-up current of the open-collector gate,
normally several microamperes, and the SHDN pin cur­rent, typically 3µA. If unused, the SHDN pin must be
connected to VIN. The device will be in the low power
shutdown state if the SHDN pin is not connected.

IN: Input. Power is supplied to the device through the IN
pin. A bypass capacitor is required on this pin if the device
is more than six inches away from the main input filter
capacitor. In general, the output impedance of a battery
rises with frequency, so it is advisable to include a bypass
capacitor in battery-powered circuits. A bypass capacitor
in the range of 1µF to 10µF is sufficient. The LT1963 regu-
lators are designed to withstand reverse voltages on the IN
pin with respect to ground and the OUT pin. In the case of
a reverse input, which can happen if a battery is plugged
in backwards, the device will act as if there is a diode in
series with its input. There will be no reverse current flow
into the regulator and no reverse voltage will appear at the
load. The device will protect both itself and the load.

ADJ: Adjust. For the adjustable LT1963, this is the input to
the error amplifier. This pin is internally clamped to ±7V.
It has a bias current of 3µA which flows into the pin. The
ADJ pin voltage is 1.21V referenced to ground and the
output voltage range is 1.21V to 20V.

SHDN: Shutdown. The SHDN pin is used to put the LT1963
regulators into a low power shutdown state. The output

IN

V

+

IN

Figure 1. Kelvin Sense Connection

SHDN

LT1963

GND

OUT

SENSE

R

P

+

LOAD

R

P

1963 F01

1963fa

9

LT1963 Series

WUUU

APPLICATIO S I FOR ATIO

The LT1963 series are 1.5A low dropout regulators opti­mized for fast transient response. The devices are capable
of supplying 1.5A at a dropout voltage of 350mV. The low
operating quiescent current (1mA) drops to less than 1µA
in shutdown. In addition to the low quiescent current, the
LT1963 regulators incorporate several protection features
which make them ideal for use in battery-powered sys­tems. The devices are protected against both reverse input
and reverse output voltages. In battery backup applica­tions where the output can be held up by a backup battery
when the input is pulled to ground, the LT1963-X acts like
it has a diode in series with its output and prevents reverse
current flow. Additionally, in dual supply applications
where the regulator load is returned to a negative supply,
the output can be pulled below ground by as much as 20V
and still allow the device to start and operate.

Adjustable Operation

The adjustable version of the LT1963 has an output
voltage range of 1.21V to 20V. The output voltage is set by
the ratio of two external resistors as shown in Figure 2. The
device servos the output to maintain the voltage at the ADJ
pin at 1.21V referenced to ground. The current in R1 is
then equal to 1.21V/R1 and the current in R2 is the current
in R1 plus the ADJ pin bias current. The ADJ pin bias
current, 3µA at 25°C, flows through R2 into the ADJ pin.
The output voltage can be calculated using the formula in
Figure 2. The value of R1 should be less than 4.17k to
minimize errors in the output voltage caused by the ADJ
pin bias current. Note that in shutdown the output is turned
off and the divider current will be zero.

IN

V

IN

VV

OUT ADJ

VV

ADJ

IA

ADJ

OUTPUT RANGE = 1.21V TO 20V

Figure 2. Adjustable Operation

OUT

LT1963

ADJ

GND



=+

121 1

.




=

121

.

=°

3

µ AT 25 C

R2

R1

R

2



IR

+

()()




R

1

V

OUT

+

1963 F02

2

The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.21V.
Specifications for output voltages greater than 1.21V will
be proportional to the ratio of the desired output voltage to

1.21V: V

/1.21V. For example, load regulation for an

OUT

output current change of 1mA to 1.5A is –3mV typical at
V

= 1.21V. At V

OUT

= 5V, load regulation is:

OUT

(5V/1.21V)(–3mV) = –12.4mV

Output Capacitance and Transient Response

The LT1963 regulators are designed to be stable with a
wide range of output capacitors. The ESR of the output
capacitor affects stability, most notably with small capaci­tors. A minimum output capacitor of 10µF with an ESR in
the range of 50mΩ to 3Ω is recommended to prevent
oscillations. Larger values of output capacitance can de­crease the peak deviations and provide improved transient
response for larger load current changes. Bypass capaci­tors, used to decouple individual components powered by
the LT1963, will increase the effective output capacitor
value.

Extra consideration must be given to the use of ceramic
capacitors. In some applications, the use of ceramic
capacitors with an ESR below 50mΩ can cause oscilla­tions. Please consult our Applications Engineering depart­ment for help with any issues concerning the use of
ceramic output capacitors. Ceramic capacitors are manu­factured with a variety of dielectrics, each with different
behavior over temperature and applied voltage. The most
common dielectrics used are Z5U, Y5V, X5R and X7R. The
Z5U and Y5V dielectrics are good for providing high
capacitances in a small package, but exhibit strong voltage
and temperature coefficients as shown in Figures 3 and 4.
When used with a 5V regulator, a 10µF Y5V capacitor can
exhibit an effective value as low as 1µF to 2µF over the
operating temperature range. The X5R and X7R dielectrics
result in more stable characteristics and are more suitable
for use as the output capacitor. The X7R type has better
stability across temperature, while the X5R is less expen­sive and is available in higher values.

Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates

1963fa

10

WUUU

APPLICATIO S I FOR ATIO

LT1963 Series

20

0

–20

–40

–60

CHANGE IN VALUE (%)

–80

–100

0

Figure 3. Ceramic Capacitor DC Bias Characteristics

40

20

0

–20

–40

–60

CHANGE IN VALUE (%)

–80

BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF

–100

–50

Figure 4. Ceramic Capacitor Temperature Characteristics

BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF

4

DC BIAS VOLTAGE (V)

–25 0

25 75

TEMPERATURE (°C)

X5R

Y5V

Y5V

14

12

X5R

8

1026

50 100 125

16

1963 F03

1963 F04

voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or micro­phone works. For a ceramic capacitor the stress can be
induced by vibrations in the system or thermal transients.

When power is first turned on, as the input voltage rises,
the output follows the input, allowing the regulator to start
up into very heavy loads. During the start-up, as the input
voltage is rising, the input-to-output voltage differential is
small, allowing the regulator to supply large output
currents. With a high input voltage, a problem can occur
wherein removal of an output short will not allow the
output voltage to recover. Other regulators, such as the
LT1085, also exhibit this phenomenon, so it is not unique
to the LT1963-X.

The problem occurs with a heavy output load when the
input voltage is high and the output voltage is low. Com­mon situations are immediately after the removal of a
short-circuit or when the shutdown pin is pulled high after
the input voltage has already been turned on. The load line
for such a load may intersect the output current curve at
two points. If this happens, there are two stable output
operating points for the regulator. With this double inter­section, the input power supply may need to be cycled
down to zero and brought up again to make the output
recover.

Output Voltage Noise

The LT1963 regulators have been designed to provide low
output voltage noise over the 10Hz to 100kHz bandwidth
while operating at full load. Output voltage noise is typi­cally 40nV/√Hz over this frequency bandwidth for the
LT1963 (adjustable version). For higher output voltages
(generated by using a resistor divider), the output voltage
noise will be gained up accordingly. This results in RMS
noise over the 10Hz to 100kHz bandwidth of 14µV
the LT1963 increasing to 38µV

for the LT1963-3.3.

RMS

RMS

for

Overload Recovery

Like many IC power regulators, the LT1963-X has safe
operating area protection. The safe area protection de­creases the current limit as input-to-output voltage in­creases and keeps the power transistor inside a safe
operating region for all values of input-to-output voltage.
The protection is designed to provide some output current
at all values of input-to-output voltage up to the device
breakdown.

Higher values of output voltage noise may be measured
when care is not exercised with regards to circuit layout
and testing. Crosstalk from nearby traces can induce
unwanted noise onto the output of the LT1963-X. Power
supply ripple rejection must also be considered; the LT1963
regulators do not have unlimited power supply rejection
and will pass a small portion of the input noise through to
the output.

1963fa

11

LT1963 Series

WUUU

APPLICATIO S I FOR ATIO

Thermal Considerations

The power handling capability of the device is limited by the
maximum rated junction temperature (125°C). The power
dissipated by the device is made up of two components:

1. Output current multiplied by the input/output voltage
differential: (I

)(VIN – V

OUT

OUT

), and

2. GND pin current multiplied by the input voltage:
(I

)(VIN).

GND

The GND pin current can be found using the GND Pin
Current curves in the Typical Performance Characteris­tics. Power dissipation will be equal to the sum of the two
components listed above.

The LT1963 series regulators have internal thermal lim­iting designed to protect the device during overload
conditions. For continuous normal conditions, the maxi­mum junction temperature rating of 125°C must not be
exceeded. It is important to give careful consideration to
all sources of thermal resistance from junction to ambi­ent. Additional heat sources mounted nearby must also
be considered.

For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener­ated by power devices.

The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 1/16" FR-4 board with one ounce
copper.

Table 1. Q Package, 5-Lead DD

COPPER AREA

TOPSIDE* BACKSIDE

2500mm22500mm22500mm
1000mm22500mm22500mm

2

125mm

*Device is mounted on topside

2500mm22500mm

BOARD AREA (JUNCTION-TO-AMBIENT)

THERMAL RESISTANCE

2

2

2

23°C/W
25°C/W
33°C/W

Table 2. SO-8 Package, 8-Lead SO

COPPER AREA

TOPSIDE* BACKSIDE

2500mm22500mm22500mm
1000mm22500mm22500mm

2

225mm
100mm

*Device is mounted on topside.

Table 3. SOT-223 Package, 3-Lead SOT-223

COPPER AREA

TOPSIDE* BACKSIDE

2500mm22500mm22500mm
1000mm22500mm22500mm

225mm

100mm
1000mm21000mm21000mm
1000mm

*Device is mounted on topside.

T Package, 5-Lead TO-220

Thermal Resistance (Junction-to-Case) = 4°C/W

2500mm22500mm

2

2500mm22500mm

2

2500mm22500mm

2

2500mm22500mm

2

0mm

BOARD AREA (JUNCTION-TO-AMBIENT)

BOARD AREA (JUNCTION-TO-AMBIENT)

2

1000mm

THERMAL RESISTANCE

2

2

2

2

2

2

2

2

2

2

55°C/W
55°C/W
63°C/W
69°C/W

THERMAL RESISTANCE

42°C/W
42°C/W
50°C/W
56°C/W
49°C/W
52°C/W

Calculating Junction Temperature

Example: Given an output voltage of 3.3V, an input voltage
range of 4V to 6V, an output current range of 0mA to
500mA and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?

The power dissipated by the device will be equal to:

I

OUT(MAX)(VIN(MAX)

– V

OUT

) + I

GND(VIN(MAX)

)

where,

I

OUT(MAX)

V

IN(MAX)

I

GND

at (I

= 500mA

= 6V

= 500mA, VIN = 6V) = 10mA

OUT

So,

P = 500mA(6V – 3.3V) + 10mA(6V) = 1.41W

Using a DD package, the thermal resistance will be in the
range of 23°C/W to 33°C/W depending on the copper
area. So the junction temperature rise above ambient will
be approximately equal to:

12

1.41W(28°C/W) = 39.5°C

1963fa

WUUU

APPLICATIO S I FOR ATIO

LT1963 Series

The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:

T

= 50°C + 39.5°C = 89.5°C

JMAX

Protection Features

The LT1963 regulators incorporate several protection
features which make them ideal for use in battery-powered
circuits. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices are protected
against reverse input voltages, reverse output voltages
and reverse voltages from output to input.

Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal opera­tion, the junction temperature should not exceed 125°C.

The input of the device will withstand reverse voltages of
20V. Current flow into the device will be limited to less than
1mA (typically less than 100µA) and no negative voltage
will appear at the output. The device will protect both itself
and the load. This provides protection against batteries
that can be plugged in backward.

The output of the LT1963 can be pulled below ground
without damaging the device. If the input is left open circuit
or grounded, the output can be pulled below ground by
20V. For fixed voltage versions, the output will act like a
large resistor, typically 5k or higher, limiting current flow
to typically less than 600µA. For adjustable versions, the
output will act like an open circuit; no current will flow out
of the pin. If the input is powered by a voltage source, the
output will source the short-circuit current of the device
and will protect itself by thermal limiting. In this case,
grounding the SHDN pin will turn off the device and stop
the output from sourcing the short-circuit current.

The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
device. If the input is left open circuit or grounded, the ADJ
pin will act like an open circuit when pulled below ground
and like a large resistor (typically 5k) in series with a diode
when pulled above ground.

In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp
voltage if the output is pulled high, the ADJ pin input
current must be limited to less than 5mA. For example, a
resistor divider is used to provide a regulated 1.5V output
from the 1.21V reference when the output is forced to 20V.
The top resistor of the resistor divider must be chosen to
limit the current into the ADJ pin to less than 5mA when the
ADJ pin is at 7V. The 13V difference between OUT and ADJ
pins divided by the 5mA maximum current into the ADJ pin
yields a minimum top resistor value of 2.6k.

In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled to
ground, pulled to some intermediate voltage, or is left
open circuit. Current flow back into the output will follow
the curve shown in Figure 5.

When the IN pin of the LT1963 is forced below the OUT pin
or the OUT pin is pulled above the IN pin, input current will
typically drop to less than 2µA. This can happen if the
input of the device is connected to a discharged (low
voltage) battery and the output is held up by either a
backup battery or a second regulator circuit. The state of
the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.

5.0

V

LT1963-2.5

V

OUT

LT1963-3.3

V

OUT

0

OUT

= V

LT1963
= V

= V

FB

213

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

REVERSE OUTPUT CURRENT (mA)

0.5
0

Figure 5. Reverse Output Current

LT1963-1.8

= V

V

ADJ

OUT

FB

FB

TJ = 25°C
V

= 0V

IN

CURRENT FLOWS
INTO OUTPUT PIN

697

4

5

OUTPUT VOLTAGE (V)

8

10

1963 F05

1963fa

13

LT1963 Series

TYPICAL APPLICATIO S

SCR Pre-Regulator Provides Efficiency Over Line Variations

L2

10VAC AT

115V

90-140

VAC

IN

10VAC AT

115V

IN

U

1N4148

1k

L1

500µH

LT1963-3.3

IN

+

10000µF

34k*

SHDN

GND

OUT

FB

3.3V

OUT

1.5A

+

22µF

1N4002 1N4002

“SYNC”

2.4k

+

750Ω

TO ALL “+V”

POINTS

1N4002

22µF

PACKAGE DESCRIPTIO

0.256

(6.502)

0.060

(1.524)

0.300

(7.620)

BOTTOM VIEW OF DD PAK

HATCHED AREA IS SOLDER PLATED

COPPER HEAT SINK

0.060

(1.524)

0.075

(1.905)

0.183

(4.648)

12.1k*

0.1µF

+V

A1

LT1006

1µF

C1A

+

LT1018

1/2

1N4148

–

+V

C1B

750Ω

0.033µF

L1 = COILTRONICS CTX500-2-52
L2 = STANCOR P-8559
* = 1% FILM RESISTOR
= NTE5437

1/2

LT1018

+V

200k

+

1N4148

–

10k

+V

U

Q Package

5-Lead Plastic DD Pak

(LTC DWG # 05-08-1461)

0.060

(1.524)

TYP

0.330 – 0.370

(8.382 – 9.398)

+0.012

0.143
–0.020

+0.305

3.632

()

–0.508

0.028 – 0.038

(0.711 – 0.965)

0.390 – 0.415

(9.906 – 10.541)

0.067
(1.70)

BSC

15° TYP

+

–

10k

0.165 – 0.180

(4.191 – 4.572)

10k

+V

LT1004

1.2V

1963 TA03

0.059

(1.499)

TYP

0.013 – 0.023

(0.330 – 0.584)

0.045 – 0.055

(1.143 – 1.397)

+0.008

0.004
–0.004

+0.203

0.102

()

–0.102

0.095 – 0.115

(2.413 – 2.921)

0.050 ± 0.012

(1.270 ± 0.305)

Q(DD5) 1098

14

1963fa

PACKAGE DESCRIPTIO

0.010 – 0.020

(0.254 – 0.508)

0.008 – 0.010

(0.203 – 0.254)

*

DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**

DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

× 45°

0.016 – 0.050

(0.406 – 1.270)

0.248 – 0.264
(6.30 – 6.71)

0.114 – 0.124
(2.90 – 3.15)

U

Dimensions in inches (millimeters) unless otherwise noted.

S8 Package

8-Lead Plastic Small Outline (Narrow 0.150)

(LTC DWG # 05-08-1610)

8

1

0°– 8° TYP

0.053 – 0.069

(1.346 – 1.752)

0.014 – 0.019

(0.355 – 0.483)

TYP

ST Package

3-Lead Plastic SOT-223

(LTC DWG # 05-08-1630)

0.004 – 0.010

(0.101 – 0.254)

0.050

(1.270)

BSC

0.228 – 0.244

(5.791 – 6.197)

0.189 – 0.197*
(4.801 – 5.004)

7

6

3

2

LT1963 Series

5

0.150 – 0.157**
(3.810 – 3.988)

4

SO8 1298

0.264 – 0.287
(6.70 – 7.30)

0.130 – 0.146
(3.30 – 3.71)

0.390 – 0.415

(9.906 – 10.541)

0.460 – 0.500

(11.684 – 12.700)

BSC

0.067

(1.70)

0.0905
(2.30)

NOM

0.147 – 0.155

(3.734 – 3.937)

0.230 – 0.270

(5.842 – 6.858)

0.330 – 0.370

(8.382 – 9.398)

0.028 – 0.038

(0.711 – 0.965)

0.071
(1.80)

MAX

0.033 – 0.041
(0.84 – 1.04)

0.024 – 0.033
(0.60 – 0.84)

0.181
(4.60)

NOM

0.012
(0.31)

T Package

5-Lead Plastic TO-220 (Standard)

(LTC DWG # 05-08-1421)

0.165 – 0.180

DIA

0.570 – 0.620

(14.478 – 15.748)

0.260 – 0.320
(6.60 – 8.13)

SEATING PLANE

0.152 – 0.202

(3.861 – 5.131)

(4.191 – 4.572)

0.700 – 0.728

(17.78 – 18.491)

0.135 – 0.165

(3.429 – 4.191)

MIN

10°

MAX

(15.75)

10° – 16°

0.620

TYP

0.0008 – 0.0040

(0.0203 – 0.1016)

0.045 – 0.055

(1.143 – 1.397)

0.095 – 0.115

(2.413 – 2.921)

0.155 – 0.195*
(3.937 – 4.953)

0.013 – 0.023

(0.330 – 0.584)

* MEASURED AT THE SEATING PLANE

10° – 16°

T5 (TO-220) 0399

0.010 – 0.014
(0.25 – 0.36)

ST3 (SOT-233) 1298

1963fa

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

15

LT1963 Series

TYPICAL APPLICATIO S

U

+

V

> 2.7V

IN

NOTE: ADJUST R1 FOR
0A TO 1.5A CONSTANT CURRENT

10µF

C1

Adjustable Current Source

R5

0.01Ω

R1

1k

LT1004-1.2

80.6k

R3

2k

R2

3.3µF

R4

R6

2.2k

2.2k

2

+

1/2

LT1366

3

C2

–

LT1963-1.8

IN

SHDN

GND

C3

1µF

8

4

OUT

1

LOAD

FB

R8
100k

R7
470Ω

1963 TA04

Paralleling of Regulators for Higher Output Current

R1

V

> 3.7V

IN

+

SHDN

C1
100µF

0.01Ω

R2

0.01Ω

R3

2.2kR42.2k
3

2

LT1963-3.3

IN

SHDN

GND

LT1963

IN

SHDN

GND

+

1/2

LT1366

–

8

4

OUT

OUT

+

FB

R6

FB

6.65k

R7

4.12k

R5

1k

1

C3

0.01µF

1963 TA05

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PART NUMBER DESCRIPTION COMMENTS

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Q

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Burst Mode is a trademark of Linear Technology Corporation.

Includes 2.5V Reference and Comparator

500mV Dropout Voltage

Noise, SOT-23 Package

RMS

Noise, MSOP Package

RMS

Noise, SO-8 Package

RMS

Noise

RMS

Noise, MSOP Package

RMS

3.3V
3A

C2
22µF

16

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

[phone] ● FAX: [phone]

●

www.linear.com

1963fa

LT/TP 0602 1.5K REV A • PRINTED IN USA

 LINEAR TECHNO LOGY CORPORATION 2000